diff --git a/headers/private/graphics/intel_extreme/intel_extreme.h b/headers/private/graphics/intel_extreme/intel_extreme.h
index 8de668ca68..731b052a73 100644
--- a/headers/private/graphics/intel_extreme/intel_extreme.h
+++ b/headers/private/graphics/intel_extreme/intel_extreme.h
@@ -225,7 +225,8 @@ enum port_index {
 	INTEL_PORT_B,
 	INTEL_PORT_C,
 	INTEL_PORT_D,
-	INTEL_PORT_E
+	INTEL_PORT_E,
+	INTEL_PORT_F
 };
 
 enum pch_info {
@@ -726,6 +727,7 @@ struct intel_free_graphics_memory {
 #define DDI_BUF_CTL_C					(0x4200 | REGS_NORTH_PIPE_AND_PORT)
 #define DDI_BUF_CTL_D					(0x4300 | REGS_NORTH_PIPE_AND_PORT)
 #define DDI_BUF_CTL_E					(0x4400 | REGS_NORTH_PIPE_AND_PORT)
+#define DDI_BUF_CTL_F					(0x4500 | REGS_NORTH_PIPE_AND_PORT)
 #define DDI_BUF_CTL_ENABLE				(1 << 31)
 #define DDI_BUF_TRANS_SELECT(n)			((n) << 24)
 #define DDI_BUF_EMP_MASK				(0xf << 24)
@@ -748,6 +750,7 @@ struct intel_free_graphics_memory {
 #define PIPE_DDI_PORT_C					2
 #define PIPE_DDI_PORT_D					3
 #define PIPE_DDI_PORT_E					4
+#define PIPE_DDI_PORT_F					5
 #define PIPE_DDI_MODESEL_SHIFT			24
 #define PIPE_DDI_MODESEL_MODE(x)		((x) << PIPE_DDI_MODESEL_SHIFT)
 #define PIPE_DDI_MODESEL_MASK			(7 << PIPE_DDI_MODESEL_SHIFT)
diff --git a/src/add-ons/accelerants/intel_extreme/Ports.cpp b/src/add-ons/accelerants/intel_extreme/Ports.cpp
index aa3f034700..2863ff6706 100644
--- a/src/add-ons/accelerants/intel_extreme/Ports.cpp
+++ b/src/add-ons/accelerants/intel_extreme/Ports.cpp
@@ -1295,6 +1295,11 @@ DigitalDisplayInterface::_PortRegister()
 			return DDI_BUF_CTL_D;
 		case INTEL_PORT_E:
 			return DDI_BUF_CTL_E;
+		case INTEL_PORT_F:
+			if ((gInfo->shared_info->device_type.Generation() > 8) &&
+				!gInfo->shared_info->device_type.InGroup(INTEL_GROUP_SKY))
+				return DDI_BUF_CTL_F;
+			return 0;
 		default:
 			return 0;
 	}
@@ -1353,9 +1358,11 @@ DigitalDisplayInterface::IsConnected()
 	TRACE("%s: %s PortRegister: 0x%" B_PRIxADDR "\n", __func__, PortName(),
 		portRegister);
 
-	// Please note: Skylake and up (Desktop) use eDP for a seperate active VGA converter chip.
-	if ((portRegister == 0) && (PortIndex() != INTEL_PORT_E)) //DP protocol has no register
+	// Please note: Skylake and up (Desktop) might use eDP for a seperate active VGA converter chip.
+	if (portRegister == 0) {
+		TRACE("%s: Port not implemented\n", __func__);
 		return false;
+	}
 
 	// Probe a little port info.
 	if ((read32(DDI_BUF_CTL_A) & DDI_A_4_LANES) != 0) {
diff --git a/src/add-ons/accelerants/intel_extreme/accelerant.cpp b/src/add-ons/accelerants/intel_extreme/accelerant.cpp
index ec10f2630c..967e185e40 100644
--- a/src/add-ons/accelerants/intel_extreme/accelerant.cpp
+++ b/src/add-ons/accelerants/intel_extreme/accelerant.cpp
@@ -289,7 +289,7 @@ probe_ports()
 
 	// Digital Display Interface (for DP, HDMI, DVI and eDP)
 	if (gInfo->shared_info->device_type.HasDDI()) {
-		for (int i = INTEL_PORT_B; i <= INTEL_PORT_E; i++) {
+		for (int i = INTEL_PORT_B; i <= INTEL_PORT_F; i++) {
 			TRACE("Probing DDI %d\n", i);
 
 			Port* ddiPort
diff --git a/src/add-ons/kernel/drivers/graphics/intel_extreme/driver.cpp b/src/add-ons/kernel/drivers/graphics/intel_extreme/driver.cpp
index 4bb745d887..8198e470bd 100644
--- a/src/add-ons/kernel/drivers/graphics/intel_extreme/driver.cpp
+++ b/src/add-ons/kernel/drivers/graphics/intel_extreme/driver.cpp
@@ -190,6 +190,7 @@ get_next_intel_extreme(int32* _cookie, pci_info &info, uint32 &type)
 			if (info.device_id == kSupportedDevices[i].device_id) {
 				type = i;
 				*_cookie = index + 1;
+				ERROR("%s: Intel gfx deviceID: 0x%04x\n", __func__, info.device_id);
 				return B_OK;
 			}
 		}
@@ -215,6 +216,7 @@ detect_intel_pch()
 
 		// check device
 		unsigned short id = info.device_id & INTEL_PCH_DEVICE_ID_MASK;
+		ERROR("%s: Intel PCH deviceID: 0x%04x\n", __func__, info.device_id);
 		switch(id) {
 			case INTEL_PCH_IBX_DEVICE_ID:
 				ERROR("%s: Found Ibex Peak PCH\n", __func__);