diff --git a/src/add-ons/accelerants/nvidia/Overlay.c b/src/add-ons/accelerants/nvidia/Overlay.c index c7287a866d..35cafa89c5 100644 --- a/src/add-ons/accelerants/nvidia/Overlay.c +++ b/src/add-ons/accelerants/nvidia/Overlay.c @@ -60,7 +60,7 @@ uint32 OVERLAY_SUPPORTED_FEATURES(uint32 a_color_space) switch (a_color_space) { default: - return + return ( B_OVERLAY_KEYING_USES_ALPHA | B_OVERLAY_COLOR_KEY | B_OVERLAY_HORIZONTAL_FILTERING | @@ -68,19 +68,21 @@ uint32 OVERLAY_SUPPORTED_FEATURES(uint32 a_color_space) } } -const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint16 height) + +const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, + uint16 height) { int offset = 0; /* used to determine next buffer to create */ - uint32 adress, adress2, temp32; /* used to calculate buffer adresses */ + uintptr_t adress, adress2, temp32; /* used to calculate buffer adresses */ uint32 oldsize = 0; /* used to 'squeeze' new buffers between already existing ones */ int cnt; /* loopcounter */ /* acquire the shared benaphore */ AQUIRE_BEN(si->overlay.lock) - LOG(4,("Overlay: cardRAM_start = $%08x\n",(uint32)((uint8*)si->framebuffer))); - LOG(4,("Overlay: cardRAM_start_DMA = $%08x\n",(uint32)((uint8*)si->framebuffer_pci))); - LOG(4,("Overlay: cardRAM_size = %3.3fMb\n",(si->ps.memory_size / (1024.0 * 1024.0)))); + LOG(4, ("Overlay: cardRAM_start = $%p\n", (uint8*)si->framebuffer)); + LOG(4, ("Overlay: cardRAM_start_DMA = $%p\n", (uint8*)si->framebuffer_pci)); + LOG(4, ("Overlay: cardRAM_size = %3.3fMb\n", (si->ps.memory_size / (1024.0 * 1024.0)))); /* find first empty slot (room for another buffer?) */ for (offset = 0; offset < MAXBUFFERS; offset++) @@ -88,7 +90,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint if (si->overlay.myBuffer[offset].buffer == NULL) break; } - LOG(4,("Overlay: Allocate_buffer offset = %d\n",offset)); + LOG(4, ("Overlay: Allocate_buffer offset = %d\n", offset)); if (offset < MAXBUFFERS) /* setup new scaler input buffer */ @@ -100,9 +102,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint { /* check if slopspace is needed: RIVA128 and TNT need ~0x000f. */ si->overlay.myBuffer[offset].width = ((width + 0x000f) & ~0x000f); - } - else - { + } else { /* check if slopspace is needed: GeForce need ~0x001f. */ /* fixme: * update needed for GF DVDmax support to adhere to CRTC2 constraints?? */ @@ -114,7 +114,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint //fixme: tune for GF and TNT... if (si->overlay.myBuffer[offset].width > 4088) { - LOG(4,("Overlay: Sorry, requested buffer pitch not supported, aborted\n")); + LOG(4, ("Overlay: Sorry, requested buffer pitch not supported, aborted\n")); /* release the shared benaphore */ RELEASE_BEN(si->overlay.lock) @@ -124,7 +124,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint break; default: /* unsupported colorspace! */ - LOG(4,("Overlay: Sorry, colorspace $%08x not supported, aborted\n",cs)); + LOG(4, ("Overlay: Sorry, colorspace $%08x not supported, aborted\n",cs)); /* release the shared benaphore */ RELEASE_BEN(si->overlay.lock) @@ -141,7 +141,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint /* check if the requested buffer width is supported */ if (si->overlay.myBuffer[offset].width > 1024) { - LOG(4,("Overlay: Sorry, requested buffer width not supported, aborted\n")); + LOG(4, ("Overlay: Sorry, requested buffer width not supported, aborted\n")); /* release the shared benaphore */ RELEASE_BEN(si->overlay.lock) @@ -149,7 +149,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint } /* check if the requested buffer height is supported */ if (height > 1024) { - LOG(4,("Overlay: Sorry, requested buffer height not supported, aborted\n")); + LOG(4, ("Overlay: Sorry, requested buffer height not supported, aborted\n")); /* release the shared benaphore */ RELEASE_BEN(si->overlay.lock) @@ -161,7 +161,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint /* check if the requested buffer width is supported */ if (si->overlay.myBuffer[offset].width > 1920) { - LOG(4,("Overlay: Sorry, requested buffer width not supported, aborted\n")); + LOG(4, ("Overlay: Sorry, requested buffer width not supported, aborted\n")); /* release the shared benaphore */ RELEASE_BEN(si->overlay.lock) @@ -169,7 +169,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint } /* check if the requested buffer height is supported */ if (height > 1080) { - LOG(4,("Overlay: Sorry, requested buffer height not supported, aborted\n")); + LOG(4, ("Overlay: Sorry, requested buffer height not supported, aborted\n")); /* release the shared benaphore */ RELEASE_BEN(si->overlay.lock) @@ -183,7 +183,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint si->overlay.myBuffer[offset].space = cs; si->overlay.myBuffer[offset].height = height; - + /* we define the overlay buffers to reside 'in the back' of the cards RAM */ /* NOTE to app programmers: * Beware that an app using overlay needs to track workspace switches and screenprefs @@ -200,22 +200,22 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint /* Another NOTE for app programmers: * A *positive* side-effect of assigning the first overlay buffer exactly at the end of the * cardRAM is that apps that try to write beyond the buffer's space get a segfault immediately. - * This *greatly* simplifies tracking such errors! + * This *greatly* simplifies tracking such errors! * Of course such errors may lead to strange effects in the app or driver behaviour if they are * not hunted down and removed.. */ /* calculate first free RAM adress in card: - * Driver setup is as follows: + * Driver setup is as follows: * card base: - hardware cursor bitmap (if used), * directly above - screen memory for both heads */ - adress2 = (((uint32)((uint8*)si->fbc.frame_buffer)) + /* cursor already included here */ + adress2 = (((uintptr_t)((uint8*)si->fbc.frame_buffer)) + /* cursor already included here */ (si->fbc.bytes_per_row * si->dm.virtual_height)); /* size in bytes of screen(s) */ - LOG(4,("Overlay: first free cardRAM virtual adress $%08x\n", adress2)); + LOG(4, ("Overlay: first free cardRAM virtual adress $%08x\n", adress2)); /* calculate 'preliminary' buffer size including slopspace */ oldsize = si->overlay.myBufInfo[offset].size; - si->overlay.myBufInfo[offset].size = - si->overlay.myBuffer[offset].bytes_per_row * si->overlay.myBuffer[offset].height; + si->overlay.myBufInfo[offset].size + = si->overlay.myBuffer[offset].bytes_per_row * si->overlay.myBuffer[offset].height; /* calculate virtual memory adress that would be needed for a new bitmap */ /* NOTE to app programmers: @@ -228,7 +228,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint * If you switch now to settings: 1600x1200x32bit (single head) the app needs to fallback to * bitmap output or maybe single buffered overlay output if small bitmaps are used. */ - adress = (((uint32)((uint8*)si->framebuffer)) + si->ps.memory_size); + adress = (((uintptr_t)((uint8*)si->framebuffer)) + si->ps.memory_size); /* Keep some extra distance as a workaround for certain bugs (see * DriverInterface.h for an explanation). */ if (si->ps.card_arch < NV40A) @@ -246,7 +246,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint /* Check if we need to modify the buffers starting adress and thus the size */ /* calculate 'would be' cardRAM offset */ - temp32 = (adress - ((uint32)((vuint32 *)si->framebuffer))); + temp32 = (adress - ((uintptr_t)((vuint32 *)si->framebuffer))); /* check if it is aligned */ if (temp32 != (temp32 & 0xfffffff0)) { @@ -255,19 +255,19 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint /* update the (already calculated) adress to get it aligned */ adress -= (temp32 - (temp32 & 0xfffffff0)); } - LOG(4,("Overlay: new buffer needs virtual adress $%08x\n", adress)); + LOG(4, ("Overlay: new buffer needs virtual adress $%08x\n", adress)); /* First check now if buffer to be defined is 'last one' in memory (speaking backwards): * this is done to prevent a large buffer getting created in the space a small buffer * occupied earlier, if not all buffers created were deleted. * Note also that the app can delete the buffers in any order desired. */ - /* NOTE to app programmers: + /* NOTE to app programmers: * If you are going to delete a overlay buffer you created, you should delete them *all* and * then re-create only the new ones needed. This way you are sure not to get unused memory- * space in between your overlay buffers for instance, so cardRAM is used 'to the max'. * If you don't, you might not get a buffer at all if you are trying to set up a larger one - * than before. + * than before. * (Indeed: not all buffers *have* to be of the same type and size...) */ for (cnt = offset; cnt < MAXBUFFERS; cnt++) @@ -285,12 +285,10 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint "Overlay: resetting it to virtual adress $%08x and size $%08x\n", adress,oldsize)); /* force exiting the FOR loop */ cnt = MAXBUFFERS; - } - else - { + } else { /* nogo, sorry */ - LOG(4,("Overlay: Other buffer(s) exist after this one:\n" - "Overlay: not enough space to 'squeeze' this one in, aborted\n")); + LOG(4, ("Overlay: Other buffer(s) exist after this one:\n" + "Overlay: not enough space to 'squeeze' this one in, aborted\n")); /* Reset to the old size to prevent the space from 'growing' if we get here again... */ si->overlay.myBufInfo[offset].size = oldsize; @@ -303,23 +301,23 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint } } - /* check if we have enough space to setup this new bitmap + /* check if we have enough space to setup this new bitmap * (preventing overlap of desktop RAMspace & overlay bitmap RAMspace here) */ if (adress < adress2) /* nope, sorry */ { - LOG(4,("Overlay: Sorry, no more space for buffers: aborted\n")); + LOG(4, ("Overlay: Sorry, no more space for buffers: aborted\n")); /* release the shared benaphore */ RELEASE_BEN(si->overlay.lock) return NULL; } - /* continue buffer setup */ + /* continue buffer setup */ si->overlay.myBuffer[offset].buffer = (void *) adress; /* calculate physical memory adress (for dma use) */ - adress = (((uint32)((uint8*)si->framebuffer_pci)) + si->ps.memory_size); + adress = (((uintptr_t)((uint8*)si->framebuffer_pci)) + si->ps.memory_size); /* Keep some extra distance as a workaround for certain bugs (see * DriverInterface.h for an explanation). */ if (si->ps.card_arch < NV40A) @@ -334,20 +332,18 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint /* this adress is already aligned to the scaler's requirements (via the already modified sizes) */ si->overlay.myBuffer[offset].buffer_dma = (void *) adress; - LOG(4,("Overlay: New buffer: addr $%08x, dma_addr $%08x, color space $%08x\n", - (uint32)((uint8*)si->overlay.myBuffer[offset].buffer), - (uint32)((uint8*)si->overlay.myBuffer[offset].buffer_dma), cs)); - LOG(4,("Overlay: New buffer's size is $%08x\n", si->overlay.myBufInfo[offset].size)); - + LOG(4, ("Overlay: New buffer: addr $%p, dma_addr $%p, color space $%08x\n", + (uint8*)si->overlay.myBuffer[offset].buffer, + (uint8*)si->overlay.myBuffer[offset].buffer_dma, cs)); + LOG(4, ("Overlay: New buffer's size is $%08x\n", si->overlay.myBufInfo[offset].size)); + /* release the shared benaphore */ RELEASE_BEN(si->overlay.lock) return &si->overlay.myBuffer[offset]; - } - else - /* sorry, no more room for buffers */ - { - LOG(4,("Overlay: Sorry, no more space for buffers: aborted\n")); + } else { + /* sorry, no more room for buffers */ + LOG(4, ("Overlay: Sorry, no more space for buffers: aborted\n")); /* release the shared benaphore */ RELEASE_BEN(si->overlay.lock) @@ -356,6 +352,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint } } + status_t RELEASE_OVERLAY_BUFFER(const overlay_buffer *ob) /* Note that the user can delete the buffers in any order desired! */ { diff --git a/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c b/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c index 7985cd4de6..ff694ff991 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c @@ -513,7 +513,7 @@ status_t nv_acc_init_dma() ACCW(PR_CTX0_C, 0x00023002); } ACCW(PR_CTX1_C, 0x000fffff); /* DMA limit: tablesize is 1M bytes */ - ACCW(PR_CTX2_C, (((uint32)((uint8 *)(si->dma_buffer_pci))) | 0x00000002)); + ACCW(PR_CTX2_C, (((uintptr_t)((uint8 *)(si->dma_buffer_pci))) | 0x00000002)); /* DMA access type is READ_AND_WRITE; * table is located in main system RAM (b12-31): * It's adress needs to be at a 4kb boundary! */ @@ -1042,18 +1042,17 @@ status_t nv_acc_init_dma() * b0-1 aren't used as adressbits. Using b0 to indicate a valid pointer. */ for (cnt = 0; cnt < 0x08; cnt++) { - si->engine.fifo.ch_ptr[(si->engine.fifo.handle[cnt])] = - (0x00000001 + (cnt * 0x00002000)); + si->engine.fifo.ch_ptr[(si->engine.fifo.handle[cnt])] + = (0x00000001 + (cnt * 0x00002000)); } /*** init DMA command buffer info ***/ if (si->ps.card_arch >= NV40A) //main mem DMA buf on pre-NV40 { - si->dma_buffer = (void *)((char *)si->framebuffer + - ((si->ps.memory_size - 1) & 0xffff8000)); + si->dma_buffer = (void *)((char *)si->framebuffer + + ((si->ps.memory_size - 1) & 0xffff8000)); } - LOG(4,("ACC_DMA: command buffer is at adress $%08x\n", - ((uint32)(si->dma_buffer)))); + LOG(4, ("ACC_DMA: command buffer is at adress $%p\n", si->dma_buffer)); /* we have issued no DMA cmd's to the engine yet */ si->engine.dma.put = 0; /* the current first free adress in the DMA buffer is at offset 0 */ @@ -1076,9 +1075,7 @@ status_t nv_acc_init_dma() if (si->ps.card_arch >= NV40A) { if (nv_acc_fifofree_dma(12) != B_OK) return B_ERROR; - } - else - { + } else { if (nv_acc_fifofree_dma(16) != B_OK) return B_ERROR; } @@ -1888,9 +1885,10 @@ void SCREEN_TO_SCREEN_SCALED_FILTERED_BLIT_DMA(engine_token *et, scaled_blit_par si->engine.threeD.reload = 0xffffffff; } + /* scaled and filtered screen to screen blit - i.e. video playback without overlay */ /* note: source and destination may not overlap. */ -//fixme? checkout NV5 and NV10 version of cmd: faster?? (or is 0x77 a 'autoselect' version?) +// FIXME? checkout NV5 and NV10 version of cmd: faster?? (or is 0x77 a 'autoselect' version?) void OFFSCREEN_TO_SCREEN_SCALED_FILTERED_BLIT_DMA( engine_token *et, offscreen_buffer_config *config, clipped_scaled_blit_params *list, uint32 count) { @@ -1898,11 +1896,12 @@ void OFFSCREEN_TO_SCREEN_SCALED_FILTERED_BLIT_DMA( uint32 cmd_depth; uint8 bpp; - LOG(4,("ACC_DMA: offscreen src buffer location $%08x\n", (uint32)((uint8*)(config->buffer)))); + LOG(4, ("ACC_DMA: offscreen src buffer location $%p\n", + (uint8*)(config->buffer))); /*** init acc engine for scaled filtered blit function ***/ /* Set pixel width */ - switch(config->space) + switch (config->space) { case B_RGB15_LITTLE: cmd_depth = 0x00000002; diff --git a/src/add-ons/accelerants/nvidia/engine/nv_agp.c b/src/add-ons/accelerants/nvidia/engine/nv_agp.c index 3f6d0abd92..8edb45393b 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_agp.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_agp.c @@ -17,7 +17,7 @@ nv_agp_setup(bool enable_agp) nv_nth_agp_info nai; nv_cmd_agp nca; uint8 index; - agp_info nv_ai; + agp_info nv_ai = {0}; bool agp = false; /* preset we are running in PCI mode: so acc engine may not use AGP transfers */ diff --git a/src/add-ons/accelerants/nvidia/engine/nv_bes.c b/src/add-ons/accelerants/nvidia/engine/nv_bes.c index 44c16a6d7e..8703bf2db3 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_bes.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_bes.c @@ -13,7 +13,7 @@ struct move_overlay_info uint32 vcoordv; /* top and bottom edges of video output window */ uint32 hsrcstv; /* horizontal source start in source buffer (clipping) */ uint32 v1srcstv; /* vertical source start in source buffer (clipping) */ - uint32 a1orgv; /* alternate source clipping via startadress of source buffer */ + uintptr_t a1orgv; /* alternate source clipping via startadress of source buffer */ }; static void nv_bes_calc_move_overlay(move_overlay_info *moi); @@ -235,9 +235,9 @@ static void nv_bes_calc_move_overlay(move_overlay_info *moi) *******************************/ /* calculate inputbitmap origin adress */ - moi->a1orgv = (uint32)((vuint32 *)si->overlay.ob.buffer); - moi->a1orgv -= (uint32)((vuint32 *)si->framebuffer); - LOG(4,("Overlay: topleft corner of input bitmap (cardRAM offset) $%08x\n", moi->a1orgv)); + moi->a1orgv = (uintptr_t)((vuint32 *)si->overlay.ob.buffer); + moi->a1orgv -= (uintptr_t)((vuint32 *)si->framebuffer); + LOG(4, ("Overlay: topleft corner of input bitmap (cardRAM offset) $%08x\n", moi->a1orgv)); /* Setup vertical source start: first (sub)pixel contributing to output picture. */ /* Note: diff --git a/src/add-ons/accelerants/nvidia/engine/nv_dac.c b/src/add-ons/accelerants/nvidia/engine/nv_dac.c index 7c4673d44b..2b1decda52 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_dac.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_dac.c @@ -312,6 +312,7 @@ static void nv_dac_dump_pix_pll(void) DACW(PLLSEL, 0x10000700); } + /* find nearest valid pix pll */ status_t nv_dac_pix_pll_find (display_mode target,float * calc_pclk,uint8 * m_result,uint8 * n_result,uint8 * p_result, uint8 test) @@ -322,17 +323,19 @@ status_t nv_dac_pix_pll_find return B_ERROR; } + /* find nearest valid pixel PLL setting */ static status_t nv4_nv10_nv20_dac_pix_pll_find( - display_mode target,float * calc_pclk,uint8 * m_result,uint8 * n_result,uint8 * p_result, uint8 test) + display_mode target, float* calc_pclk, uint8* m_result, uint8* n_result, + uint8* p_result, uint8 test) { int m = 0, n = 0, p = 0/*, m_max*/; - float error, error_best = 999999999; - int best[3]; + float error, error_best = INFINITY; + int best[3] = {0, 0, 0}; float f_vco, max_pclk; float req_pclk = target.timing.pixel_clock/1000.0; - LOG(4,("DAC: NV4/NV10/NV20 restrictions apply\n")); + LOG(4, ("DAC: NV4/NV10/NV20 restrictions apply\n")); /* determine the max. pixelclock for the current videomode */ switch (target.space) @@ -473,19 +476,20 @@ static status_t nv4_nv10_nv20_dac_pix_pll_find( /* find nearest valid system PLL setting */ status_t nv_dac_sys_pll_find( - float req_sclk, float* calc_sclk, uint8* m_result, uint8* n_result, uint8* p_result, uint8 test) + float req_sclk, float* calc_sclk, uint8* m_result, uint8* n_result, + uint8* p_result, uint8 test) { int m = 0, n = 0, p = 0, m_max, p_max; - float error, error_best = 999999999; - int best[3]; + float error, error_best = INFINITY; + int best[3] = {0, 0, 0}; float f_vco, discr_low, discr_high; - /* determine the max. reference-frequency postscaler setting for the + /* determine the max. reference-frequency postscaler setting for the * current requested clock */ switch (si->ps.card_arch) { case NV04A: - LOG(4,("DAC: NV04 restrictions apply\n")); + LOG(4, ("DAC: NV04 restrictions apply\n")); /* set phase-discriminator frequency range (Mhz) (verified) */ discr_low = 1.0; discr_high = 2.0; @@ -499,7 +503,7 @@ status_t nv_dac_sys_pll_find( { case NV28: //fixme: how about some other cards??? - LOG(4,("DAC: NV28 restrictions apply\n")); + LOG(4, ("DAC: NV28 restrictions apply\n")); /* set max. useable reference frequency postscaler divider factor; * apparantly we would get distortions on high PLL output frequencies if * we use the phase-discriminator at low frequencies */ @@ -515,7 +519,7 @@ status_t nv_dac_sys_pll_find( discr_high = 27.0; break; default: - LOG(4,("DAC: NV10/NV20/NV30 restrictions apply\n")); + LOG(4, ("DAC: NV10/NV20/NV30 restrictions apply\n")); /* set max. useable reference frequency postscaler divider factor; * apparantly we would get distortions on high PLL output frequencies if * we use the phase-discriminator at low frequencies */ @@ -535,23 +539,23 @@ status_t nv_dac_sys_pll_find( break; } - LOG(4,("DAC: PLL reference frequency postscaler divider range is 1 - %d\n", m_max)); - LOG(4,("DAC: PLL VCO output postscaler divider range is 1 - %d\n", p_max)); - LOG(4,("DAC: PLL discriminator input frequency range is %2.2fMhz - %2.2fMhz\n", + LOG(4, ("DAC: PLL reference frequency postscaler divider range is 1 - %d\n", m_max)); + LOG(4, ("DAC: PLL VCO output postscaler divider range is 1 - %d\n", p_max)); + LOG(4, ("DAC: PLL discriminator input frequency range is %2.2fMhz - %2.2fMhz\n", discr_low, discr_high)); /* Make sure the requested clock is within the PLL's operational limits */ /* lower limit is min_system_vco divided by highest postscaler-factor */ if (req_sclk < (si->ps.min_system_vco / ((float)p_max))) { - LOG(4,("DAC: clamping sysclock: requested %fMHz, set to %fMHz\n", + LOG(4, ("DAC: clamping sysclock: requested %fMHz, set to %fMHz\n", req_sclk, (si->ps.min_system_vco / ((float)p_max)))); req_sclk = (si->ps.min_system_vco / ((float)p_max)); } /* upper limit is given by pins */ if (req_sclk > si->ps.max_system_vco) { - LOG(4,("DAC: clamping sysclock: requested %fMHz, set to %fMHz\n", + LOG(4, ("DAC: clamping sysclock: requested %fMHz, set to %fMHz\n", req_sclk, (float)si->ps.max_system_vco)); req_sclk = si->ps.max_system_vco; } diff --git a/src/add-ons/accelerants/nvidia/engine/nv_dac2.c b/src/add-ons/accelerants/nvidia/engine/nv_dac2.c index 35c6e863c1..ac8567bc72 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_dac2.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_dac2.c @@ -280,17 +280,19 @@ status_t nv_dac2_pix_pll_find return B_ERROR; } + /* find nearest valid pixel PLL setting */ static status_t nv10_nv20_dac2_pix_pll_find( - display_mode target,float * calc_pclk,uint8 * m_result,uint8 * n_result,uint8 * p_result, uint8 test) + display_mode target, float* calc_pclk, uint8* m_result, uint8* n_result, + uint8* p_result, uint8 test) { int m = 0, n = 0, p = 0/*, m_max*/; - float error, error_best = 999999999; - int best[3]; + float error, error_best = INFINITY; + int best[3] = {0, 0, 0}; float f_vco, max_pclk; float req_pclk = target.timing.pixel_clock/1000.0; - LOG(4,("DAC2: NV10/NV20 restrictions apply\n")); + LOG(4, ("DAC2: NV10/NV20 restrictions apply\n")); /* determine the max. pixelclock for the current videomode */ switch (target.space) diff --git a/src/add-ons/accelerants/nvidia/engine/nv_info.c b/src/add-ons/accelerants/nvidia/engine/nv_info.c index 5fbd52bd35..d18cd97265 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_info.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_info.c @@ -133,6 +133,7 @@ status_t parse_pins () return B_OK; } + static status_t pins2_read(uint8 *rom, uint32 offset) { uint16 init1 = rom[offset + 18] + (rom[offset + 19] * 256); @@ -141,20 +142,26 @@ static status_t pins2_read(uint8 *rom, uint32 offset) /* confirmed by comparing cards */ uint16 ram_tab = init1 - 0x0010; /* fixme: PPC BIOSes (might) return NULL pointers for messages here */ - char* signon_msg = &(rom[(rom[offset + 24] + (rom[offset + 25] * 256))]); - char* vendor_name = &(rom[(rom[offset + 40] + (rom[offset + 41] * 256))]); - char* product_name = &(rom[(rom[offset + 42] + (rom[offset + 43] * 256))]); - char* product_rev = &(rom[(rom[offset + 44] + (rom[offset + 45] * 256))]); + unsigned char* signon_msg + = &(rom[(rom[offset + 24] + (rom[offset + 25] * 256))]); + unsigned char* vendor_name + = &(rom[(rom[offset + 40] + (rom[offset + 41] * 256))]); + unsigned char* product_name + = &(rom[(rom[offset + 42] + (rom[offset + 43] * 256))]); + unsigned char* product_rev + = &(rom[(rom[offset + 44] + (rom[offset + 45] * 256))]); - LOG(8,("INFO: cmdlist 1: $%04x, 2: $%04x, max. size $%04x\n", init1, init2, init_size)); - LOG(8,("INFO: signon msg:\n%s\n", signon_msg)); - LOG(8,("INFO: vendor name: %s\n", vendor_name)); - LOG(8,("INFO: product name: %s\n", product_name)); - LOG(8,("INFO: product rev: %s\n", product_rev)); + LOG(8, ("INFO: cmdlist 1: $%04x, 2: $%04x, max. size $%04x\n", init1, init2, + init_size)); + LOG(8, ("INFO: signon msg:\n%s\n", signon_msg)); + LOG(8, ("INFO: vendor name: %s\n", vendor_name)); + LOG(8, ("INFO: product name: %s\n", product_name)); + LOG(8, ("INFO: product rev: %s\n", product_rev)); return coldstart_card(rom, init1, init2, init_size, ram_tab); } + static status_t pins3_5_read(uint8 *rom, uint32 offset) { uint16 init1 = rom[offset + 18] + (rom[offset + 19] * 256); @@ -163,16 +170,21 @@ static status_t pins3_5_read(uint8 *rom, uint32 offset) /* confirmed on a TNT2-M64 with pins V5.1 */ uint16 ram_tab = rom[offset + 24] + (rom[offset + 25] * 256); /* fixme: PPC BIOSes (might) return NULL pointers for messages here */ - char* signon_msg = &(rom[(rom[offset + 30] + (rom[offset + 31] * 256))]); - char* vendor_name = &(rom[(rom[offset + 46] + (rom[offset + 47] * 256))]); - char* product_name = &(rom[(rom[offset + 48] + (rom[offset + 49] * 256))]); - char* product_rev = &(rom[(rom[offset + 50] + (rom[offset + 51] * 256))]); + unsigned char* signon_msg + = &(rom[(rom[offset + 30] + (rom[offset + 31] * 256))]); + unsigned char* vendor_name + = &(rom[(rom[offset + 46] + (rom[offset + 47] * 256))]); + unsigned char* product_name + = &(rom[(rom[offset + 48] + (rom[offset + 49] * 256))]); + unsigned char* product_rev + = &(rom[(rom[offset + 50] + (rom[offset + 51] * 256))]); - LOG(8,("INFO: pre PINS 5.16 cmdlist 1: $%04x, 2: $%04x, max. size $%04x\n", init1, init2, init_size)); - LOG(8,("INFO: signon msg:\n%s\n", signon_msg)); - LOG(8,("INFO: vendor name: %s\n", vendor_name)); - LOG(8,("INFO: product name: %s\n", product_name)); - LOG(8,("INFO: product rev: %s\n", product_rev)); + LOG(8, ("INFO: pre PINS 5.16 cmdlist 1: $%04x, 2: $%04x, max. size $%04x\n", + init1, init2, init_size)); + LOG(8, ("INFO: signon msg:\n%s\n", signon_msg)); + LOG(8, ("INFO: vendor name: %s\n", vendor_name)); + LOG(8, ("INFO: product name: %s\n", product_name)); + LOG(8, ("INFO: product rev: %s\n", product_rev)); /* pins 5.06 and higher has VCO range info */ if (((rom[offset + 5]) == 5) && ((rom[offset + 6]) >= 0x06))