pulled over some stuff from newos:

at boot, per cpu, detect the cpu, pull down all the relevant cpuid bits and
save them into the per-cpu structure. Changed most of the code scattered here
and there that reads the cpuid to use a new api, x86_check_feature, which looks
at the saved bits.
Also changed the system_info stuff to read from these bits.
While i was at it, refreshed all the bits to be current.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@20072 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Travis Geiselbrecht
2007-02-05 01:46:28 +00:00
parent 5c3d21086c
commit dcdc4f4b43
12 changed files with 373 additions and 52 deletions
+1
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@@ -21,6 +21,7 @@ extern "C" {
status_t arch_cpu_preboot_init(kernel_args *args);
status_t arch_cpu_init(kernel_args *args);
status_t arch_cpu_init_percpu(kernel_args *args, int curr_cpu);
status_t arch_cpu_init_post_vm(kernel_args *args);
status_t arch_cpu_init_post_modules(kernel_args *args);
status_t arch_cpu_shutdown(bool reboot);
@@ -101,6 +101,11 @@ enum machine_state {
struct block_address_translation;
typedef struct arch_cpu_info {
int null;
} arch_cpu_info;
#ifdef __cplusplus
extern "C" {
#endif
+86 -6
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@@ -21,12 +21,55 @@
#define IA32_MSR_MTRR_PHYSICAL_BASE_0 0x200
#define IA32_MSR_MTRR_PHYSICAL_MASK_0 0x201
// cpuid eax 1 features
#define IA32_FEATURE_MSR (1UL << 5)
#define IA32_FEATURE_MTRR (1UL << 12)
#define IA32_FEATURE_GLOBAL_PAGES (1UL << 13)
#define IA32_FEATURE_SSE (1UL << 25)
#define IA32_FEATURE_FXSR (1UL << 24)
// x86 features from cpuid eax 1, edx register
#define IA32_FEATURE_FPU 0x00000001 // x87 fpu
#define IA32_FEATURE_VME 0x00000002 // virtual 8086
#define IA32_FEATURE_DE 0x00000004 // debugging extensions
#define IA32_FEATURE_PSE 0x00000008 // page size extensions
#define IA32_FEATURE_TSC 0x00000010 // rdtsc instruction
#define IA32_FEATURE_MSR 0x00000020 // rdmsr/wrmsr instruction
#define IA32_FEATURE_PAE 0x00000040 // extended 3 level page table addressing
#define IA32_FEATURE_MCE 0x00000080 // machine check exception
#define IA32_FEATURE_CX8 0x00000100 // cmpxchg8b instruction
#define IA32_FEATURE_APIC 0x00000200 // local apic on chip
#define IA32_FEATURE_SEP 0x00000800 // SYSENTER/SYSEXIT
#define IA32_FEATURE_MTRR 0x00001000 // MTRR
#define IA32_FEATURE_PGE 0x00002000 // paging global bit
#define IA32_FEATURE_MCA 0x00004000 // machine check architecture
#define IA32_FEATURE_CMOV 0x00008000 // cmov instruction
#define IA32_FEATURE_PAT 0x00010000 // page attribute table
#define IA32_FEATURE_PSE36 0x00020000 // page size extensions with 4MB pages
#define IA32_FEATURE_PSN 0x00040000 // processor serial number
#define IA32_FEATURE_CLFSH 0x00080000 // cflush instruction
#define IA32_FEATURE_DS 0x00200000 // debug store
#define IA32_FEATURE_ACPI 0x00400000 // thermal monitor and clock ctrl
#define IA32_FEATURE_MMX 0x00800000 // mmx instructions
#define IA32_FEATURE_FXSR 0x01000000 // FXSAVE/FXRSTOR instruction
#define IA32_FEATURE_SSE 0x02000000 // SSE
#define IA32_FEATURE_SSE2 0x04000000 // SSE2
#define IA32_FEATURE_SS 0x08000000 // self snoop
#define IA32_FEATURE_HTT 0x10000000 // hyperthreading
#define IA32_FEATURE_TM 0x20000000 // thermal monitor
#define IA32_FEATURE_PBE 0x80000000 // pending break enable
// x86 features from cpuid eax 1, ecx register
#define IA32_FEATURE_EXT_SSE3 0x00000001 // SSE3
#define IA32_FEATURE_EXT_MONITOR 0x00000008 // MONITOR/MWAIT
#define IA32_FEATURE_EXT_DSCPL 0x00000010 // CPL qualified debug store
#define IA32_FEATURE_EXT_EST 0x00000080 // speedstep
#define IA32_FEATURE_EXT_TM2 0x00000100 // thermal monitor 2
#define IA32_FEATURE_EXT_CNXTID 0x00000400 // L1 context ID
// x86 features from cpuid eax 0x80000001, edx register (AMD)
// only care about the ones that are unique to this register
#define IA32_FEATURE_AMD_EXT_SYSCALL (1<<11) // SYSCALL/SYSRET
#define IA32_FEATURE_AMD_EXT_NX (1<<20) // no execute bit
#define IA32_FEATURE_AMD_EXT_MMXEXT (1<<22) // mmx extensions
#define IA32_FEATURE_AMD_EXT_FFXSR (1<<25) // fast FXSAVE/FXRSTOR
#define IA32_FEATURE_AMD_EXT_RDTSCP (1<<27) // rdtscp instruction
#define IA32_FEATURE_AMD_EXT_LONG (1<<29) // long mode
#define IA32_FEATURE_AMD_EXT_3DNOWEXT (1<<30) // 3DNow! extensions
#define IA32_FEATURE_AMD_EXT_3DNOW (1<<31) // 3DNow!
// cr4 flags
#define IA32_CR4_GLOBAL_PAGES (1UL << 7)
@@ -90,6 +133,41 @@ struct iframe {
uint32 user_ss;
};
// features
enum x86_feature_type {
FEATURE_COMMON = 0, // cpuid eax=1, ecx register
FEATURE_EXT, // cpuid eax=1, edx register
FEATURE_EXT_AMD, // cpuid eax=0x80000001, edx register (AMD)
FEATURE_NUM
};
enum x86_vendors {
VENDOR_INTEL = 0,
VENDOR_AMD,
VENDOR_CYRIX,
VENDOR_UMC,
VENDOR_NEXGEN,
VENDOR_CENTAUR,
VENDOR_RISE,
VENDOR_TRANSMETA,
VENDOR_NSC,
VENDOR_NUM,
VENDOR_UNKNOWN,
};
typedef struct arch_cpu_info {
enum x86_vendors vendor;
enum x86_feature_type feature[FEATURE_NUM];
char model_name[49];
const char *vendor_name;
int type;
int family;
int stepping;
int model;
char feature_string[256];
} arch_cpu_info;
#ifdef __cplusplus
extern "C" {
@@ -124,8 +202,10 @@ void x86_set_task_gate(int32 n, int32 segment);
uint32 x86_count_mtrrs(void);
void x86_set_mtrr(uint32 index, uint64 base, uint64 length, uint8 type);
status_t x86_get_mtrr(uint32 index, uint64 *_base, uint64 *_length, uint8 *_type);
bool x86_check_feature(uint32 feature, enum x86_feature_type type);
struct tss *x86_get_main_tss(void);
#define read_cr3(value) \
__asm__("movl %%cr3,%0" : "=r" (value))
@@ -8,7 +8,6 @@
#include <OS.h>
#ifdef __cplusplus
extern "C" {
#endif
+5
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@@ -12,6 +12,7 @@
#include <smp.h>
#include <timer.h>
#include <boot/kernel_args.h>
#include <arch/cpu.h>
/* CPU local data structure */
@@ -29,6 +30,9 @@ typedef struct cpu_ent {
bigtime_t last_user_time;
bool disabled;
// arch-specific stuff
arch_cpu_info arch;
} cpu_ent __attribute__((aligned(64)));
@@ -41,6 +45,7 @@ extern "C" {
status_t cpu_preboot_init(struct kernel_args *args);
status_t cpu_init(struct kernel_args *args);
status_t cpu_init_percpu(kernel_args *ka, int curr_cpu);
status_t cpu_init_post_vm(struct kernel_args *args);
status_t cpu_init_post_modules(struct kernel_args *args);
bigtime_t cpu_get_active_time(int32 cpu);