diff --git a/headers/private/graphics/nvidia/nv_macros.h b/headers/private/graphics/nvidia/nv_macros.h
index 8e93afdecf..b5bc4450e3 100644
--- a/headers/private/graphics/nvidia/nv_macros.h
+++ b/headers/private/graphics/nvidia/nv_macros.h
@@ -759,6 +759,9 @@
 #define NVCRTCX_WR_I2CBUS_0	0x3f
 #define NVCRTCX_EXTRA		0x41
 #define NVCRTCX_OWNER		0x44
+#define NVCRTCX_I2C_LOCK	0x49
+#define NVCRTCX_RD_I2CBUS_2	0x50
+#define NVCRTCX_WR_I2CBUS_2	0x51
 #define NVCRTCX_FP_HTIMING	0x53
 #define NVCRTCX_FP_VTIMING	0x54
 #define NVCRTCX_0x59		0x59
diff --git a/src/add-ons/accelerants/nvidia/engine/nv_i2c.c b/src/add-ons/accelerants/nvidia/engine/nv_i2c.c
index 18036c8fb9..7106f9d8f7 100644
--- a/src/add-ons/accelerants/nvidia/engine/nv_i2c.c
+++ b/src/add-ons/accelerants/nvidia/engine/nv_i2c.c
@@ -2,7 +2,7 @@
  * i2c interface.
  * Bus should be run at max. 100kHz: see original Philips I2C specification
  *	
- * Rudolf Cornelissen 12/2002-5/2009
+ * Rudolf Cornelissen 12/2002-6/2009
  */
 
 #define MODULE_BIT 0x00004000
@@ -296,6 +296,10 @@ status_t i2c_init(void)
 	/* enable access to primary head */
 	set_crtc_owner(0);
 
+	/* on some NV40 architecture cards the i2c busses can be disabled: enable them */
+	if (si->ps.card_arch == NV40A)
+		CRTCW(I2C_LOCK ,(CRTCR(I2C_LOCK) | 0x04));
+
 	/* preset no board wired buses */
 	si->ps.i2c_bus0 = false;
 	si->ps.i2c_bus1 = false;