incorporated savage driver sources from Gerald Zajac. I hope it's the good place for this.
fixed warnings and code style. Please, from now on, provide *patches* to this version. git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@21421 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
@@ -1,192 +1,239 @@
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/*
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Copyright 1999, Be Incorporated. All Rights Reserved.
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This file may be used under the terms of the Be Sample Code License.
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Copyright 1999, Be Incorporated. All Rights Reserved.
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This file may be used under the terms of the Be Sample Code License.
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Other authors:
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Gerald Zajac 2006-2007
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*/
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#ifndef DRIVERINTERFACE_H
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#define DRIVERINTERFACE_H
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#include <Accelerant.h>
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#include <GraphicsDefs.h>
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#include <Drivers.h>
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#include <PCI.h>
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#include <OS.h>
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/*
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This is the info that needs to be shared between the kernel driver and
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the accelerant for the sample driver.
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This is the info that needs to be shared between the kernel driver and
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the accelerant for the sample driver.
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*/
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#if defined(__cplusplus)
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extern "C" {
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#endif
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#define NUM_ELEMENTS(a) ((int)(sizeof(a) / sizeof(a[0]))) // for computing number of elements in an array
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typedef struct
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{
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sem_id sem;
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int32 ben;
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sem_id sem;
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int32 ben;
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} benaphore;
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#define INIT_BEN(x) x.sem = create_sem(0, "SAVAGE "#x" benaphore"); x.ben = 0;
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#define AQUIRE_BEN(x) if((atomic_add(&(x.ben), 1)) >= 1) acquire_sem(x.sem);
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#define RELEASE_BEN(x) if((atomic_add(&(x.ben), -1)) > 1) release_sem(x.sem);
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#define DELETE_BEN(x) delete_sem(x.sem);
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#define INIT_BEN(x) x.sem = create_sem(0, "SAVAGE "#x" benaphore"); x.ben = 0;
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#define AQUIRE_BEN(x) if((atomic_add(&(x.ben), 1)) >= 1) acquire_sem(x.sem);
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#define RELEASE_BEN(x) if((atomic_add(&(x.ben), -1)) > 1) release_sem(x.sem);
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#define DELETE_BEN(x) delete_sem(x.sem);
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#define SAVAGE_PRIVATE_DATA_MAGIC 0x1234 /* a private driver rev, of sorts */
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#define SAVAGE_PRIVATE_DATA_MAGIC 0x5791 // a private driver rev, of sorts
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#define MAX_SAVAGE_DEVICE_NAME_LENGTH 32
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#define SKD_MOVE_CURSOR 0x00000001
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#define SKD_PROGRAM_CLUT 0x00000002
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#define SKD_SET_START_ADDR 0x00000004
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#define SKD_SET_CURSOR 0x00000008
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#define SKD_HANDLER_INSTALLED 0x80000000
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enum
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{
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SAVAGE_GET_PRIVATE_DATA = B_DEVICE_OP_CODES_END + 1,
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SAVAGE_GET_PCI,
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SAVAGE_SET_PCI,
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SAVAGE_DEVICE_NAME,
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SAVAGE_RUN_INTERRUPTS,
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SAVAGE_DPRINTF
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SAVAGE_GET_PRIVATE_DATA = B_DEVICE_OP_CODES_END + 1,
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SAVAGE_GET_PCI,
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SAVAGE_SET_PCI,
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SAVAGE_DEVICE_NAME,
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SAVAGE_RUN_INTERRUPTS,
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};
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typedef struct
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// Chip tags. These are used to group the adapters into related
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// families. See table SavageChipsetTable in driver.c
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enum S3ChipTags
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{
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uint16 vendor_id; /* PCI vendor ID, from pci_info */
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uint16 device_id; /* PCI device ID, from pci_info */
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uint8 revision; /* PCI device revsion, from pci_info */
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area_id regs_area; /* Kernel's area_id for the memory mapped registers.
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It will be cloned into the accelerant's address
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space. */
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area_id fb_area; /* Frame buffer's area_id. The addresses are shared
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with all teams. */
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void *framebuffer; /* As viewed from virtual memory */
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void *framebuffer_pci; /* As viewed from the PCI bus (for DMA) */
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area_id rom_area; /* Mapped ROM's area_id */
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void *rom; /* As viewed from virtual memory. Shared by all teams */
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area_id mode_area; /* Contains the list of display modes the driver supports */
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uint32 mode_count; /* Number of display modes in the list */
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sem_id vblank; /* The vertical blank semaphore. Ownership will be
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transfered to the team opening the device first */
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int32 flags;
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int32 start_addr;
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struct
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{
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uint8* data; /* Pointer into the frame buffer to where the
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cursor data starts */
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uint16 hot_x; /* Cursor hot spot. The top left corner of the cursor */
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uint16 hot_y; /* is 0,0 */
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uint16 x; /* The location of the cursor hot spot on the */
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uint16 y; /* display (or desktop?) */
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uint16 width; /* Width and height of the cursor shape */
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uint16 height;
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bool is_visible; /* Is the cursor currently displayed? */
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} cursor;
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uint16 first_color;
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uint16 color_count;
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bigtime_t refresh_period; /* Duration of one frame (ie 1/refresh rate) */
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bigtime_t blank_period; /* Duration of the blanking period. These are
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usefull when faking vertical blanking
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interrupts. */
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uint8 color_data[3 * 256]; /* */
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uint8 cursor0[64*64/8]; /* AND mask for a 64x64 cursor */
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uint8 cursor1[512]; /* XOR mask for a 64x64 cursor */
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display_mode dm; /* current display mode configuration */
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frame_buffer_config
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fbc; /* bytes_per_row and start of frame buffer */
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struct
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{
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uint64 count; /* last fifo slot used */
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uint64 last_idle; /* last fifo slot we *know* the engine was idle after */
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benaphore lock; /* for serializing access to the acceleration engine */
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} engine;
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uint32 pix_clk_max8; /* The maximum speed the pixel clock should run */
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uint32 pix_clk_max16; /* at for a given pixel width. Usually a function */
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uint32 pix_clk_max32; /* of memory and DAC bandwidths. */
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uint32 mem_size; /* Frame buffer memory, in bytes. */
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} shared_info;
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/* Read or write a value in PCI configuration space */
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typedef struct
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{
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uint32 magic; /* magic number to make sure the caller groks us */
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uint32 offset; /* Offset to read/write */
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uint32 size; /* Number of bytes to transfer */
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uint32 value; /* The value read or written */
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} savage_get_set_pci;
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/* Set some boolean condition (like enabling or disabling interrupts) */
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typedef struct
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{
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uint32 magic; /* magic number to make sure the caller groks us */
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bool do_it; /* state to set */
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} savage_set_bool_state;
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/* Retrieve the area_id of the kernel/accelerant shared info */
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typedef struct
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{
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uint32 magic; /* magic number to make sure the caller groks us */
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area_id shared_info_area; /* area_id containing the shared information */
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} savage_get_private_data;
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/* Retrieve the device name. Usefull for when we have a file handle, but want
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to know the device name (like when we are cloning the accelerant) */
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typedef struct
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{
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uint32 magic; /* magic number to make sure the caller groks us */
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char *name; /* The name of the device, less the /dev root */
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} savage_device_name;
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enum
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{
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SAVAGE_WAIT_FOR_VBLANK = (0 << 0)
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S3_UNKNOWN = 0,
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S3_SAVAGE3D,
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S3_SAVAGE_MX,
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S3_SAVAGE4,
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S3_PROSAVAGE,
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S3_TWISTER,
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S3_PROSAVAGEDDR,
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S3_SUPERSAVAGE,
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S3_SAVAGE2000,
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};
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enum
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#define S3_SAVAGE3D_SERIES(chip) ((chip==S3_SAVAGE3D) || (chip==S3_SAVAGE_MX))
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#define S3_SAVAGE4_SERIES(chip) ((chip==S3_SAVAGE4) \
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|| (chip==S3_PROSAVAGE) \
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|| (chip==S3_TWISTER) \
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|| (chip==S3_PROSAVAGEDDR))
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#define S3_SAVAGE_MOBILE_SERIES(chip) ((chip==S3_SAVAGE_MX) || (chip==S3_SUPERSAVAGE))
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#define S3_MOBILE_TWISTER_SERIES(chip) ((chip==S3_TWISTER) || (chip==S3_PROSAVAGEDDR))
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typedef enum {
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MT_NONE,
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MT_CRT,
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MT_LCD,
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MT_DFP,
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MT_TV
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} SavageMonitorType;
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// Bitmap descriptor structures for BCI
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typedef struct _HIGH {
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unsigned short Stride;
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unsigned char Bpp;
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unsigned char ResBWTile;
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} HIGH;
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typedef struct _BMPDESC1 {
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unsigned long Offset;
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HIGH HighPart;
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} BMPDESC1;
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typedef struct _BMPDESC2 {
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unsigned long LoPart;
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unsigned long HiPart;
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} BMPDESC2;
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typedef union _BMPDESC {
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BMPDESC1 bd1;
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BMPDESC2 bd2;
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} BMPDESC;
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typedef struct
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{
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/* Savage3D series */
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PCI_PID_SAVAGE3D = 0x8a20, /* Savage3D */
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PCI_PID_SAVAGE3DMV = 0x8a21, /* Savage3D/MV */
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PCI_PID_SAVAGEMXMV = 0x8c10, /* Savage/MX-MV */
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PCI_PID_SAVAGEMX = 0x8c11, /* Savage/MX */
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PCI_PID_SAVAGEIXMV = 0x8c12, /* Savage/IX-MV */
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PCI_PID_SAVAGEIX = 0x8c13, /* Savage/IX */
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// Device ID info.
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uint16 vendorID; // PCI vendor ID, from pci_info
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uint16 deviceID; // PCI device ID, from pci_info
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uint8 revision; // PCI device revsion, from pci_info
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uint32 chipset; // indicates family in which chipset belongs (a family has similar functionality)
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char chipsetName[32]; // user recognizable name of chipset
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/* Savage4 series */
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PCI_PID_SAVAGE4_2 = 0x8a22, /* Savage4 */
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PCI_PID_SAVAGE4_3 = 0x8a23, /* Savage4 */
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PCI_PID_SAVAGE2000 = 0x9102, /* Savage2000 */
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PCI_PID_PM133 = 0x8a25, /* ProSavage PM133 */
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PCI_PID_KM133 = 0x8a26, /* ProSavage KM133 */
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PCI_PID_PN133 = 0x8d01, /* ProSavage PN133, 86C380 [ProSavageDDR K4M266] */
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PCI_PID_KN133 = 0x8d02, /* ProSavage KN133/TwisterK AGP4X VT8636A */
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PCI_PID_KM266 = 0x8d04, /* ProSavage8 KM266/KL266 VT8375 */
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PCI_PID_PN266 = 0x8d03, /* VT8751 [ProSavageDDR P4M266] */
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bool bAccelerantInUse; // true = accelerant has been initialized
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bool bInterruptAssigned; // card has a useable interrupt assigned to it
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/* SuperSavage series (unsupported) */
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PCI_PID_SUPERSAVAGE_MX128 = 0x8c22, /* SuperSavage MX/128 */
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PCI_PID_SUPERSAVAGE_MX64 = 0x8c24, /* SuperSavage MX/64 */
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PCI_PID_SUPERSAVAGE_MX64C = 0x8c26, /* SuperSavage MX/64C */
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PCI_PID_SUPERSAVAGE_IX128_SDR = 0x8c2a, /* SuperSavage IX/128 SDR */
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PCI_PID_SUPERSAVAGE_IX128_DDR = 0x8c2b, /* SuperSavage IX/128 DDR */
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PCI_PID_SUPERSAVAGE_IX64_SDR = 0x8c2c, /* SuperSavage IX/64 SDR */
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PCI_PID_SUPERSAVAGE_IX64_DDR = 0x8c2d, /* SuperSavage IX/64 DDR */
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PCI_PID_SUPERSAVAGE_IXC_SDR = 0x8c2e, /* SuperSavage IX/C SDR */
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PCI_PID_SUPERSAVAGE_IXC_DDR = 0x8c2f, /* SuperSavage IX/C DDR */
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};
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// Memory mappings.
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area_id regsArea; // area_id for the memory mapped registers. It will
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// be cloned into accelerant's address space.
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area_id videoMemArea; // video memory area_id. The addresses are shared with all teams.
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void* videoMemAddr; // video memory addr as viewed from virtual memory
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void* videoMemPCI; // video memory addr as viewed from the PCI bus (for DMA)
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uint32 videoMemSize; // video memory size in bytes.
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#define isSavage4Family(p) \
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((p) == PCI_PID_SAVAGE4_2 || \
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(p) == PCI_PID_SAVAGE4_3 || \
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(p) == PCI_PID_SAVAGE2000 || \
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(p) == PCI_PID_PM133 || \
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(p) == PCI_PID_KM133 || \
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(p) == PCI_PID_PN133 || \
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(p) == PCI_PID_KN133 || \
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(p) == PCI_PID_KM266)
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uint32 cursorOffset; // offset of cursor in video memory
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uint32 frameBufferOffset; // offset of frame buffer in video memory
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uint32 maxFrameBufferSize; // max available video memory for frame buffer
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// List of screen modes.
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area_id modeArea; // Contains the list of display modes the driver supports
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uint32 modeCount; // Number of display modes in the list
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// Vertical blank semaphore.
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sem_id vblank; // vertical blank semaphore; if < 0, there is no semaphore
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// Ownership will be transfered to team opening device first
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// Flags used by driver.
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int32 flags;
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// Cursor info.
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struct
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{
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uint16 hot_x; // Cursor hot spot. The top left corner of the cursor
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uint16 hot_y; // is 0,0
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uint16 x; // The location of the cursor hot spot on the
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uint16 y; // display (or desktop?)
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uint16 width; // Width and height of the cursor shape
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uint16 height;
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bool bIsVisible; // Is the cursor currently displayed?
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} cursor;
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display_mode dm; // current display mode configuration
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int bitsPerPixel; // bits per pixel of current display mode
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frame_buffer_config fbc; // frame buffer addresses and bytes_per_row
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// Acceleration engine.
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struct
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{
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uint64 count; // last fifo slot used
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uint64 lastIdle; // last fifo slot we *know* the engine was idle after
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benaphore lock; // for serializing access to the acceleration engine
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} engine;
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int mclk;
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uint32 pix_clk_max8; // The maximum speed the pixel clock should run
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uint32 pix_clk_max16; // at for a given pixel width. Usually a function
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uint32 pix_clk_max32; // of memory and DAC bandwidths.
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// Command Overflow Buffer (COB) parameters.
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bool bDisableCOB; // enable/disable COB for Savage 4 & ProSavage
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uint32 cobIndex; // size index
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uint32 cobSize; // size in bytes
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uint32 cobOffset; // offset in video memory
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uint32 bciThresholdLo; // low and high thresholds for
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uint32 bciThresholdHi; // shadow status update (32bit words)
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BMPDESC GlobalBD; // Bitmap Descriptor for BCI
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int panelX; // LCD panel width
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int panelY; // LCD panel height
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int frameX0; // viewport position
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int frameY0;
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// The various Savage wait handlers.
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bool (*WaitQueue)(int);
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bool (*WaitIdleEmpty)();
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SavageMonitorType displayType;
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} SharedInfo;
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// Read or write a value in PCI configuration space
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typedef struct
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{
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uint32 magic; // magic number to make sure the caller groks us
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uint32 offset; // Offset to read/write
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uint32 size; // Number of bytes to transfer
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uint32 value; // The value read or written
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} SavageGetSetPci;
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// Set some boolean condition (like enabling or disabling interrupts)
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typedef struct
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{
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uint32 magic; // magic number to make sure the caller groks us
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bool bEnable; // state to set
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} SavageSetBoolState;
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// Retrieve the area_id of the kernel/accelerant shared info
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typedef struct
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{
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uint32 magic; // magic number to make sure the caller groks us
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area_id sharedInfoArea; // ID of area containing shared information
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} SavageGetPrivateData;
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// Retrieve the device name. Usefull for when we have a file handle, but want
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// to know the device name (like when we are cloning the accelerant)
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typedef struct
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{
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uint32 magic; // magic number to make sure the caller groks us
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char *name; // The name of the device, less the /dev root
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} SavageDeviceName;
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#if defined(__cplusplus)
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Reference in New Issue
Block a user