From e09808e0d4ae7e09417fc0fe7ff96f47873eb0ec Mon Sep 17 00:00:00 2001 From: Rudolf Cornelissen Date: Sat, 28 May 2005 11:35:42 +0000 Subject: [PATCH] added some register info I found out concerning 2D and 3D surfaces, useable as backup if programming doesn't work via the FIFO (PIO mode) or cmd buffer (DMA mode). git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@12862 a95241bf-73f2-0310-859d-f6bbb57e9c96 --- src/add-ons/accelerants/nvidia/engine/nv_acc.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/src/add-ons/accelerants/nvidia/engine/nv_acc.c b/src/add-ons/accelerants/nvidia/engine/nv_acc.c index 2b5d0f4891..8d6a641a67 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_acc.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_acc.c @@ -777,17 +777,25 @@ status_t nv_acc_init() case NV04A: case NV10A: /* location of active screen in framebuffer */ + /* (confirmed NV05: OFFSET0 is 2D destination buffer offset) */ ACCW(OFFSET0, ((uint8*)si->fbc.frame_buffer - (uint8*)si->framebuffer)); + /* (confirmed NV05: OFFSET1 is 2D source buffer offset) */ ACCW(OFFSET1, ((uint8*)si->fbc.frame_buffer - (uint8*)si->framebuffer)); + /* (confirmed NV05: OFFSET2 is 3D color buffer offset) */ ACCW(OFFSET2, ((uint8*)si->fbc.frame_buffer - (uint8*)si->framebuffer)); + /* (confirmed NV05: OFFSET3 is 3D depth buffer offset) */ ACCW(OFFSET3, ((uint8*)si->fbc.frame_buffer - (uint8*)si->framebuffer)); ACCW(OFFSET4, ((uint8*)si->fbc.frame_buffer - (uint8*)si->framebuffer)); ACCW(OFFSET5, ((uint8*)si->fbc.frame_buffer - (uint8*)si->framebuffer)); /* setup buffer pitch */ + /* (confirmed NV05: PITCH0 is 2D destination buffer pitch) */ ACCW(PITCH0, (si->fbc.bytes_per_row & 0x0000ffff)); + /* (confirmed NV05: PITCH1 is 2D source buffer pitch) */ ACCW(PITCH1, (si->fbc.bytes_per_row & 0x0000ffff)); + /* (confirmed NV05: PITCH2 is 3D color buffer pitch) */ ACCW(PITCH2, (si->fbc.bytes_per_row & 0x0000ffff)); + /* (confirmed NV05: PITCH3 is 3D depth buffer pitch) */ ACCW(PITCH3, (si->fbc.bytes_per_row & 0x0000ffff)); ACCW(PITCH4, (si->fbc.bytes_per_row & 0x0000ffff)); break;