i2p/haiku-beta6
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

added exec of another scriptcmd (indirect PLL)

Browse Source 
git-svn-id: file:///srv/svn/repos/haiku/trunk/current@8688 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Rudolf Cornelissen
2004-08-28 19:22:10 +00:00
parent 12d8196092
commit e21f481ff3
1 changed files with 63 additions and 36 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/add-ons/accelerants/nvidia/engine/nv_info.c
+59 -32
View File
@@ -22,6 +22,7 @@ static status_t pins2_read(uint8 *rom, uint32 offset, uint8 ram_cfg);
static status_t pins3_6_read(uint8 *rom, uint32 offset, uint8 ram_cfg);
static status_t coldstart_card(uint8* rom, uint16 init1, uint16 init2, uint16 init_size);
static status_t exec_type1_script(uint8* rom, uint16 adress, int16* size);
static void log_pll(uint32 reg);
/* Parse the BIOS PINS structure if there */
status_t parse_pins ()
@@ -223,8 +224,6 @@ static status_t exec_type1_script(uint8* rom, uint16 adress, int16* size)
switch (rom[adress])
{
case 0x59:
LOG(8,("xxx cmd, skipping...\n"));
*size -= 7;
if (*size < 0)
{
@@ -234,7 +233,30 @@ static status_t exec_type1_script(uint8* rom, uint16 adress, int16* size)
break;
}
adress += 7;
/* execute */
adress += 1;
reg = *((uint32*)(&(rom[adress])));
adress += 4;
data = *((uint16*)(&(rom[adress])));
adress += 2;
data2 = *((uint16*)(&(rom[data])));
LOG(8,("cmd 'calculate indirect and set PLL 32bit REG $%08x for %fMHz'\n",
reg, ((float)data2)));
if (exec)
{
//fixme: setup core and RAM PLL calc routine(s), now (mis)using DAC's...
display_mode target;
float calced_clk;
uint8 m, n, p;
target.timing.pixel_clock = (data2 * 1000);
nv_dac_pix_pll_find(target, &calced_clk, &m, &n, &p, 0);
NV_REG32(reg) = ((p << 16) | (n << 8) | m);
//fixme?
/* program 2nd set N and M scalers if they exist (b31=1 enables them) */
// if ((si->ps.card_type == NV31) || (si->ps.card_type == NV36))
// DACW(PIXPLLC2, 0x80000401);
}
log_pll(reg);
break;
case 0x5a:
LOG(8,("xxx cmd, skipping...\n"));
@@ -476,6 +498,40 @@ static status_t exec_type1_script(uint8* rom, uint16 adress, int16* size)
// if ((si->ps.card_type == NV31) || (si->ps.card_type == NV36))
// DACW(PIXPLLC2, 0x80000401);
}
log_pll(reg);
break;
case 0x7a:
*size -= 9;
if (*size < 0)
{
LOG(8,("script size error, aborting!\n\n"));
end = true;
result = B_ERROR;
break;
}
/* execute */
adress += 1;
reg = *((uint32*)(&(rom[adress])));
adress += 4;
data = *((uint32*)(&(rom[adress])));
adress += 4;
LOG(8,("cmd 'WR 32bit REG' $%08x = $%08x\n", reg, data));
if (exec) NV_REG32(reg) = data;
break;
default:
LOG(8,("unknown cmd, aborting!\n\n"));
end = true;
result = B_ERROR;
break;
}
}
return result;
}
static void log_pll(uint32 reg)
{
if ((si->ps.card_type == NV31) || (si->ps.card_type == NV36))
LOG(8,("\nINFO: ---WARNING: check/update PLL programming script code!!!"));
switch (reg)
@@ -509,35 +565,6 @@ static status_t exec_type1_script(uint8* rom, uint16 adress, int16* size)
LOG(8,("\nINFO: ---Unknown PLL accessed!\n\n"));
break;
}
break;
case 0x7a:
*size -= 9;
if (*size < 0)
{
LOG(8,("script size error, aborting!\n\n"));
end = true;
result = B_ERROR;
break;
}
/* execute */
adress += 1;
reg = *((uint32*)(&(rom[adress])));
adress += 4;
data = *((uint32*)(&(rom[adress])));
adress += 4;
LOG(8,("cmd 'WR 32bit REG' $%08x = $%08x\n", reg, data));
if (exec) NV_REG32(reg) = data;
break;
default:
LOG(8,("unknown cmd, aborting!\n\n"));
end = true;
result = B_ERROR;
break;
}
}
return result;
}
/* fake_pins presumes the card was coldstarted by it's BIOS */