* now init SSE on all CPUs, as I noted cr4 wasn't set correctly
* this fixes the use of SSE instructions here on a dual core. git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@29051 a95241bf-73f2-0310-859d-f6bbb57e9c96
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@@ -213,7 +213,7 @@ x86_get_mtrr(uint32 index, uint64 *_base, uint64 *_length, uint8 *_type)
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}
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}
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static void
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extern "C" void
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init_sse(void)
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init_sse(void)
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{
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{
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if (!x86_check_feature(IA32_FEATURE_SSE, FEATURE_COMMON)
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if (!x86_check_feature(IA32_FEATURE_SSE, FEATURE_COMMON)
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@@ -42,6 +42,7 @@ static uint32 sCPUOSIds[B_MAX_CPU_COUNT];
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static uint32 sAPICVersions[B_MAX_CPU_COUNT];
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static uint32 sAPICVersions[B_MAX_CPU_COUNT];
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extern bool gUsingIOAPIC;
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extern bool gUsingIOAPIC;
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extern void init_sse(void);
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static uint32
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static uint32
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apic_read(uint32 offset)
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apic_read(uint32 offset)
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@@ -196,6 +197,8 @@ arch_smp_per_cpu_init(kernel_args *args, int32 cpu)
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TRACE(("arch_smp_init_percpu: setting up the apic on cpu %ld\n", cpu));
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TRACE(("arch_smp_init_percpu: setting up the apic on cpu %ld\n", cpu));
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setup_apic(args, cpu);
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setup_apic(args, cpu);
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init_sse();
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return B_OK;
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return B_OK;
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}
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}
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