From e2e0a5e1771ae6880ae13cbb863583f8bc042b46 Mon Sep 17 00:00:00 2001 From: Rudolf Cornelissen Date: Mon, 24 Jan 2005 11:33:13 +0000 Subject: [PATCH] shut-down that dumb ISA access for DMA. Acc speed just went through the roof! (testing with BeRoMeter). I'll now compare DMA and non-DMA speed on NV11 8-) git-svn-id: file:///srv/svn/repos/haiku/trunk/current@11003 a95241bf-73f2-0310-859d-f6bbb57e9c96 --- .../accelerants/nvidia/engine/nv_acc_dma.c | 18 +----------------- 1 file changed, 1 insertion(+), 17 deletions(-) diff --git a/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c b/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c index a7860d6fe0..358d449b65 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c @@ -792,7 +792,7 @@ static void nv_start_dma(void) { si->engine.dma.put = si->engine.dma.current; /* fixme: is this actually needed? (force some flush somewhere) */ - ISAWB(0x03d0, 0x00); +// ISAWB(0x03d0, 0x00); /* dummy read the first adress of the framebuffer: flushes MTRR-WC buffers so * we know for sure the DMA command buffer received all data. */ dummy = *((char *)(si->framebuffer)); @@ -813,20 +813,12 @@ static void nv_start_dma(void) * The hardware FIFO state is checked by the DMA hardware automatically. */ static status_t nv_acc_fifofree_dma(uint16 cmd_size) { - //test: - uint32 dummy; - /* check if the DMA buffer has enough room for the command */ if (si->engine.dma.free < cmd_size) { - //test: - LOG(4,("ACC_FIFOFREE: free $%08x, max $%08x, current $%08x\n", - si->engine.dma.free, si->engine.dma.max, si->engine.dma.current )); - /* not enough room left, so instruct DMA engine to reset the buffer when * it's done */ si->engine.dma.cmdbuffer[si->engine.dma.current++] = 0x20000000; - /* reset our buffer pointer, so new commands will be placed at the * beginning of the buffer. */ si->engine.dma.current = 0; @@ -838,14 +830,6 @@ static status_t nv_acc_fifofree_dma(uint16 cmd_size) * cmd buffer is already processed. If this is not true, we need to wait * here until the engine becomes idle or so... */ -//test: -for (dummy = 0; dummy < 2; dummy++) -{ - LOG(4,("ACC_DMA_WRAP: get $%08x\n", NV_REG32(NVACC_FIFO + NV_GENERAL_DMAGET + - si->engine.fifo.handle[(si->engine.fifo.ch_ptr[NV_ROP5_SOLID])]))); - LOG(4,("ACC_DMA_WRAP: put $%08x\n", (si->engine.dma.put << 2))); -} - /* update the current free space we have left in the DMA buffer */ si->engine.dma.free = si->engine.dma.max - si->engine.dma.current; }