added PCI-to-PCI bridge cache flush
added 36898 clock rate git-svn-id: file:///srv/svn/repos/haiku/trunk/current@4538 a95241bf-73f2-0310-859d-f6bbb57e9c96
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@@ -141,6 +141,7 @@ void start_chan(ich_chan *chan)
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void stop_chan(ich_chan *chan)
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void stop_chan(ich_chan *chan)
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{
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{
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ich_reg_write_8(chan->regbase + ICH_REG_X_CR, ich_reg_read_8(chan->regbase + ICH_REG_X_CR) & ~CR_RPBM);
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ich_reg_write_8(chan->regbase + ICH_REG_X_CR, ich_reg_read_8(chan->regbase + ICH_REG_X_CR) & ~CR_RPBM);
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ich_reg_read_8(chan->regbase + ICH_REG_X_CR); // force PCI-to-PCI bridge cache flush
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chan->running = false;
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chan->running = false;
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snooze(10000); // 10 ms
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snooze(10000); // 10 ms
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}
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}
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@@ -149,6 +150,7 @@ void reset_chan(ich_chan *chan)
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{
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{
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int i, cr;
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int i, cr;
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ich_reg_write_8(chan->regbase + ICH_REG_X_CR, 0);
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ich_reg_write_8(chan->regbase + ICH_REG_X_CR, 0);
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ich_reg_read_8(chan->regbase + ICH_REG_X_CR); // force PCI-to-PCI bridge cache flush
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snooze(10000); // 10 ms
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snooze(10000); // 10 ms
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chan->running = false;
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chan->running = false;
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@@ -200,6 +202,7 @@ bool interrupt_test(void)
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// disable interrupts & busmaster transfer
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// disable interrupts & busmaster transfer
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ich_reg_write_8(chan_po->regbase + ICH_REG_X_CR, 0);
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ich_reg_write_8(chan_po->regbase + ICH_REG_X_CR, 0);
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ich_reg_read_8(chan_po->regbase + ICH_REG_X_CR); // force PCI-to-PCI bridge cache flush
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snooze(25000);
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snooze(25000);
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@@ -414,15 +417,24 @@ ich_clock_calibrate()
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#if DEBUG > 0
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#if DEBUG > 0
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{
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{
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int i;
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int i;
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for (i = 0; i < 20; i++)
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uint32 r = 0;
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LOG(("ich_clock_calibrate: rate %ld\n", ich_clock_get()));
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for (i = 0; i < 20; i++) {
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uint32 c = ich_clock_get();
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LOG(("ich_clock_calibrate: rate %ld\n", c));
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r += c;
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}
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r /= 20;
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LOG(("ich_clock_calibrate: mean rate %ld\n", r));
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}
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}
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#endif
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#endif
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rate = ich_clock_get();
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rate = ich_clock_get();
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LOG(("ich_clock_calibrate: rate %ld\n", rate));
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LOG(("ich_clock_calibrate: rate %ld\n", rate));
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if (rate > (44100 - 1000) && rate < (44100 + 1000)) {
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if (rate > (36898 - 1000) && rate < (36898 + 1000)) {
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LOG(("ich_clock_calibrate: setting clock 36898\n"));
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ac97_set_clock(config->ac97, 36898);
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} else if (rate > (44100 - 1000) && rate < (44100 + 1000)) {
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LOG(("ich_clock_calibrate: setting clock 44100\n"));
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LOG(("ich_clock_calibrate: setting clock 44100\n"));
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ac97_set_clock(config->ac97, 44100);
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ac97_set_clock(config->ac97, 44100);
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} else if (rate > (48000 - 1000) && rate < (48000 + 1000)) {
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} else if (rate > (48000 - 1000) && rate < (48000 + 1000)) {
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@@ -481,6 +493,7 @@ init_driver(void)
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/* do a cold reset */
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/* do a cold reset */
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LOG(("cold reset\n"));
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LOG(("cold reset\n"));
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ich_reg_write_32(ICH_REG_GLOB_CNT, 0);
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ich_reg_write_32(ICH_REG_GLOB_CNT, 0);
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ich_reg_read_32(ICH_REG_GLOB_CNT); // force PCI-to-PCI bridge cache flush
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snooze(50000); // 50 ms
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snooze(50000); // 50 ms
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ich_reg_write_32(ICH_REG_GLOB_CNT, CNT_COLD | CNT_PRIE);
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ich_reg_write_32(ICH_REG_GLOB_CNT, CNT_COLD | CNT_PRIE);
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LOG(("cold reset finished\n"));
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LOG(("cold reset finished\n"));
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@@ -31,7 +31,7 @@
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#include "debug.h"
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#include "debug.h"
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#include "hardware.h"
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#include "hardware.h"
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#define VERSION_NUMBER "1.6a"
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#define VERSION_NUMBER "1.6b"
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#if DEBUG
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#if DEBUG
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#define VERSION_DEBUG " (DEBUG)"
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#define VERSION_DEBUG " (DEBUG)"
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