Add some missing defines to the PCI file to bring us more up to
date than the Be file we started from. Also add the type 2 header and start adding it to the pci_info structure. git-svn-id: file:///srv/svn/repos/haiku/trunk/current@397 a95241bf-73f2-0310-859d-f6bbb57e9c96
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@@ -84,7 +84,13 @@ typedef struct pci_info {
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uchar interrupt_line; /* interrupt line */
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uchar interrupt_line; /* interrupt line */
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uchar interrupt_pin; /* interrupt pin */
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uchar interrupt_pin; /* interrupt pin */
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ushort bridge_control;
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ushort bridge_control;
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} h1;
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ushort subsystem_id; /* subsystem (add-in card) id */
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ushort subsystem_vendor_id; /* subsystem (add-in card) vendor id */
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} h1;
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struct {
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ushort subsystem_id; /* subsystem (add-in card) id */
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ushort subsystem_vendor_id; /* subsystem (add-in card) vendor id */
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} h2;
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} u;
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} u;
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} pci_info;
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} pci_info;
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@@ -187,10 +193,33 @@ struct pci_module_info {
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#define PCI_prefetchable_memory_limit_upper32 0x2C
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#define PCI_prefetchable_memory_limit_upper32 0x2C
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#define PCI_io_base_upper16 0x30 /* (2 bytes) */
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#define PCI_io_base_upper16 0x30 /* (2 bytes) */
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#define PCI_io_limit_upper16 0x32 /* (2 bytes) */
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#define PCI_io_limit_upper16 0x32 /* (2 bytes) */
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#define PCI_sub_vendor_id_1 0x34 /* (2 bytes) */
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#define PCI_sub_device_id_1 0x36 /* (2 bytes) */
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#define PCI_bridge_rom_base 0x38
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#define PCI_bridge_rom_base 0x38
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#define PCI_bridge_control 0x3E /* (1 byte) */
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#define PCI_bridge_control 0x3E /* (1 byte) */
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/* PCI type 2 header offsets */
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#define PCI_secondary_status_2 0x16
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#define PCI_primary_bus_2 0x18 /* (1 byte) */
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#define PCI_secondary_bus_2 0x19 /* (1 byte) */
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#define PCI_subordinate_bus_2 0x1A /* (1 byte) */
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#define PCI_secondary_latency_2 0x1B /* (1 byte) latency of secondary bus */
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#define PCI_memory_base0_2 0x1C /* (4 bytes) */
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#define PCI_memory_limit0_2 0x20 /* (4 bytes) */
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#define PCI_memory_base1_2 0x24 /* (4 bytes) */
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#define PCI_memory_limit1_2 0x28 /* (4 bytes) */
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#define PCI_io_base0_2 0x2c /* (4 bytes) */
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#define PCI_io_limit0_2 0x30 /* (4 bytes) */
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#define PCI_io_base1_2 0x34 /* (4 bytes) */
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#define PCI_io_limit1_2 0x38 /* (4 bytes) */
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#define PCI_bridge_control_2 0x3E /* (1 byte) */
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#define PCI_sub_vendor_id_2 0x40 /* (2 bytes) */
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#define PCI_sub_device_id_2 0x42 /* (2 bytes) */
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#define PCI_card_interface_2 0x44 /* ?? */
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/* ---
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/* ---
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values for the class_base field in the common header
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values for the class_base field in the common header
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@@ -230,7 +259,7 @@ struct pci_module_info {
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#define PCI_ide 0x01 /* IDE controller */
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#define PCI_ide 0x01 /* IDE controller */
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#define PCI_floppy 0x02 /* floppy disk controller */
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#define PCI_floppy 0x02 /* floppy disk controller */
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#define PCI_ipi 0x03 /* IPI bus controller */
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#define PCI_ipi 0x03 /* IPI bus controller */
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#define PCI_raid 0x03 /* RAID controller */
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#define PCI_raid 0x04 /* RAID controller */
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#define PCI_mass_storage_other 0x80 /* other mass storage controller */
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#define PCI_mass_storage_other 0x80 /* other mass storage controller */
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@@ -242,6 +271,7 @@ struct pci_module_info {
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#define PCI_token_ring 0x01 /* Token Ring controller */
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#define PCI_token_ring 0x01 /* Token Ring controller */
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#define PCI_fddi 0x02 /* FDDI controller */
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#define PCI_fddi 0x02 /* FDDI controller */
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#define PCI_atm 0x03 /* ATM controller */
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#define PCI_atm 0x03 /* ATM controller */
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#define PCI_isdn 0x04 /* ISDN controller */
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#define PCI_network_other 0x80 /* other network controller */
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#define PCI_network_other 0x80 /* other network controller */
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@@ -251,6 +281,7 @@ struct pci_module_info {
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#define PCI_vga 0x00 /* VGA controller */
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#define PCI_vga 0x00 /* VGA controller */
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#define PCI_xga 0x01 /* XGA controller */
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#define PCI_xga 0x01 /* XGA controller */
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#define PCI_3d 0x02 /* £d controller */
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#define PCI_display_other 0x80 /* other display controller */
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#define PCI_display_other 0x80 /* other display controller */
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@@ -258,8 +289,9 @@ struct pci_module_info {
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values for the class_sub field for class_base = 0x04 (multimedia device)
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values for the class_sub field for class_base = 0x04 (multimedia device)
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--- */
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--- */
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#define PCI_video 0x00 /* video */
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#define PCI_video 0x00 /* video */
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#define PCI_audio 0x01 /* audio */
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#define PCI_audio 0x01 /* audio */
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#define PCI_telephony 0x02 /* computer telephony device */
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#define PCI_multimedia_other 0x80 /* other multimedia device */
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#define PCI_multimedia_other 0x80 /* other multimedia device */
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@@ -284,6 +316,7 @@ struct pci_module_info {
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#define PCI_pcmcia 0x05 /* PCMCIA bridge */
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#define PCI_pcmcia 0x05 /* PCMCIA bridge */
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#define PCI_nubus 0x06 /* NuBus bridge */
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#define PCI_nubus 0x06 /* NuBus bridge */
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#define PCI_cardbus 0x07 /* CardBus bridge */
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#define PCI_cardbus 0x07 /* CardBus bridge */
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#define PCI_raceway 0x08 /* RACEway bridge */
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#define PCI_bridge_other 0x80 /* other bridge device */
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#define PCI_bridge_other 0x80 /* other bridge device */
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@@ -294,6 +327,8 @@ struct pci_module_info {
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#define PCI_serial 0x00 /* serial port controller */
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#define PCI_serial 0x00 /* serial port controller */
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#define PCI_parallel 0x01 /* parallel port */
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#define PCI_parallel 0x01 /* parallel port */
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#define PCI_multiport_serial 0x02 /* multiport serial controller */
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#define PCI_modem 0x03 /* modem */
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#define PCI_simple_communications_other 0x80 /* other communications device */
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#define PCI_simple_communications_other 0x80 /* other communications device */
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/* ---
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/* ---
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@@ -327,6 +362,7 @@ struct pci_module_info {
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#define PCI_dma 0x01 /* dma controller */
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#define PCI_dma 0x01 /* dma controller */
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#define PCI_timer 0x02 /* timers */
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#define PCI_timer 0x02 /* timers */
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#define PCI_rtc 0x03 /* real time clock */
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#define PCI_rtc 0x03 /* real time clock */
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#define PCI_generic_hot_plug 0x04 /* generic PCI hot-plug controller */
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#define PCI_system_peripheral_other 0x80 /* other generic system peripheral */
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#define PCI_system_peripheral_other 0x80 /* other generic system peripheral */
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/* ---
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/* ---
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@@ -377,6 +413,8 @@ struct pci_module_info {
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#define PCI_keyboard 0x00 /* keyboard controller */
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#define PCI_keyboard 0x00 /* keyboard controller */
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#define PCI_pen 0x01 /* pen */
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#define PCI_pen 0x01 /* pen */
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#define PCI_mouse 0x02 /* mouse controller */
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#define PCI_mouse 0x02 /* mouse controller */
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#define PCI_scanner 0x03 /* scanner controller */
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#define PCI_gameport 0x04 /* gameport controller */
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#define PCI_input_other 0x80 /* other input controller */
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#define PCI_input_other 0x80 /* other input controller */
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@@ -395,6 +433,7 @@ struct pci_module_info {
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#define PCI_pentium 0x02 /* Pentium */
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#define PCI_pentium 0x02 /* Pentium */
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#define PCI_alpha 0x10 /* Alpha */
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#define PCI_alpha 0x10 /* Alpha */
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#define PCI_PowerPC 0x20 /* PowerPC */
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#define PCI_PowerPC 0x20 /* PowerPC */
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#define PCI_mips 0x30 /* MIPS */
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#define PCI_coprocessor 0x40 /* co-processor */
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#define PCI_coprocessor 0x40 /* co-processor */
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/* ---
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/* ---
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@@ -472,8 +511,8 @@ struct pci_module_info {
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--- */
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--- */
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#define PCI_header_type_generic 0x00
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#define PCI_header_type_generic 0x00
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#define PCI_header_type_PCI_to_PCI_bridge 0x01
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#define PCI_header_type_PCI_to_PCI_bridge 0x01
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#define PCI_header_type_cardbus 0x02
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/* ---
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/* ---
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@@ -490,7 +529,10 @@ struct pci_module_info {
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--- */
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--- */
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#define PCI_address_space 0x01 /* 0 = memory space, 1 = i/o space */
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#define PCI_address_space 0x01 /* 0 = memory space, 1 = i/o space */
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#define PCI_register_start 0x10
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#define PCI_register_end 0x24
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#define PCI_register_ppb_end 0x18
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#define PCI_register_pcb_end 0x14
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/* ---
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/* ---
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masks for flags in memory space base address registers
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masks for flags in memory space base address registers
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@@ -520,6 +562,16 @@ struct pci_module_info {
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#define PCI_rom_enable 0x00000001 /* 1 = expansion rom decode enabled */
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#define PCI_rom_enable 0x00000001 /* 1 = expansion rom decode enabled */
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#define PCI_rom_address_mask 0xFFFFF800 /* mask to get expansion rom addr */
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#define PCI_rom_address_mask 0xFFFFF800 /* mask to get expansion rom addr */
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/* PCI interrupt pin values */
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#define PCI_pin_mask 0x07
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#define PCI_pin_none 0x00
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#define PCI_pin_a 0x01
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#define PCI_pin_b 0x02
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#define PCI_pin_c 0x03
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#define PCI_pin_d 0x04
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#define PCI_pin_max 0x04
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#ifdef __cplusplus
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#ifdef __cplusplus
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}
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}
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#endif
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#endif
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