Implemented long mode setup/switch code, the bootloader can now start the 64-bit kernel!
The setup procedure is fairly simple: create a 64-bit GDT and 64-bit page tables that include all kernel mappings from the 32-bit address space, but at the correct 64-bit address, then go through kernel_args and changes all virtual addresses to 64-bit addresses, and finally switch to long mode and jump to the kernel.
This commit is contained in:
Alex Smith
@@ -26,15 +26,15 @@ typedef struct {
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uint32 system_time_cv_factor;
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uint64 cpu_clock_speed;
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uint32 phys_pgdir;
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uint32 vir_pgdir;
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uint64 vir_pgdir;
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uint32 num_pgtables;
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uint32 pgtables[MAX_BOOT_PTABLES];
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uint32 virtual_end;
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uint64 virtual_end;
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uint32 phys_idt;
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uint32 vir_idt;
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uint64 vir_idt;
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uint32 phys_gdt;
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uint32 vir_gdt;
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uint32 page_hole;
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uint64 vir_gdt;
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uint64 page_hole;
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// smp stuff
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uint32 apic_time_cv_factor; // apic ticks per second
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uint32 apic_phys;
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@@ -0,0 +1,149 @@
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/*
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* Copyright 2012, Alex Smith, [email protected].
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* Distributed under the terms of the MIT License.
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*/
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#ifndef _KERNEL_ARCH_X86_64_DESCRIPTORS_H
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#define _KERNEL_ARCH_X86_64_DESCRIPTORS_H
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// Segment definitions.
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// Note that the ordering of these is important to SYSCALL/SYSRET.
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#define KERNEL_CODE_SEG 0x08
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#define KERNEL_DATA_SEG 0x10
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#define USER_DATA_SEG 0x18
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#define USER_CODE_SEG 0x20
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#ifndef _ASSEMBLER
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#define TSS_BASE_SEGMENT 5
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#define TLS_BASE_SEGMENT (TSS_BASE_SEGMENT + smp_get_num_cpus())
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// Structure of a segment descriptor.
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struct segment_descriptor {
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uint32 limit0 : 16;
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uint32 base0 : 24;
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uint32 type : 4;
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uint32 desc_type : 1;
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uint32 dpl : 2;
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uint32 present : 1;
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uint32 limit1 : 4;
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uint32 available : 1;
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uint32 long_mode : 1;
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uint32 d_b : 1;
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uint32 granularity : 1;
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uint32 base1 : 8;
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} _PACKED;
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// Structure of a TSS segment descriptor.
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struct tss_descriptor {
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uint32 limit0 : 16;
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uint32 base0 : 24;
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uint32 type : 4;
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uint32 desc_type : 1;
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uint32 dpl : 2;
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uint32 present : 1;
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uint32 limit1 : 4;
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uint32 available : 1;
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uint32 unused1 : 2;
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uint32 granularity : 1;
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uint32 base1 : 8;
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uint32 base2 : 32;
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uint32 unused2 : 32;
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} _PACKED;
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// Structure of an interrupt descriptor.
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struct interrupt_descriptor {
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uint32 base0 : 16;
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uint32 sel : 16;
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uint32 ist : 3;
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uint32 unused : 5;
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uint32 flags : 8;
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uint32 base1 : 16;
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uint32 base2 : 32;
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uint32 reserved : 32;
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} _PACKED;
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enum descriptor_privilege_levels {
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DPL_KERNEL = 0,
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DPL_USER = 3,
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};
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enum descriptor_types {
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// Code/data descriptor types.
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DT_CODE_EXECUTE_ONLY = 0x8,
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DT_CODE_ACCESSED = 0x9,
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DT_CODE_READABLE = 0xa,
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DT_CODE_CONFORM = 0xc,
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DT_DATA_READ_ONLY = 0x0,
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DT_DATA_ACCESSED = 0x1,
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DT_DATA_WRITEABLE = 0x2,
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DT_DATA_EXPANSION_DOWN = 0x4,
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// System descriptor types.
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DT_TSS = 9,
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// Descriptor types
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DT_SYSTEM_SEGMENT = 0,
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DT_CODE_DATA_SEGMENT = 1,
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};
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static inline void
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clear_segment_descriptor(segment_descriptor* desc)
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{
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*(uint64*)desc = 0;
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}
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static inline void
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set_segment_descriptor(segment_descriptor* desc, uint8 type, uint8 dpl)
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{
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clear_segment_descriptor(desc);
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// In 64-bit mode the CPU ignores the base/limit of code/data segments,
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// it always treats base as 0 and does no limit checks.
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desc->base0 = 0;
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desc->base1 = 0;
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desc->limit0 = 0xFFFF;
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desc->limit1 = 0xF;
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desc->granularity = 1;
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desc->type = type;
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desc->desc_type = DT_CODE_DATA_SEGMENT;
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desc->dpl = dpl;
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desc->present = 1;
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desc->long_mode = (type & DT_CODE_EXECUTE_ONLY) ? 1 : 0;
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// Must be set to 1 for code segments only.
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}
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static inline void
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set_tss_descriptor(segment_descriptor* _desc, uint64 base, uint32 limit)
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{
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clear_segment_descriptor(_desc);
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clear_segment_descriptor(&_desc[1]);
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// The TSS descriptor is a special format in 64-bit mode, it is 16 bytes
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// instead of 8.
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tss_descriptor* desc = (tss_descriptor*)_desc;
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desc->base0 = base & 0xffffff;
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desc->base1 = ((base) >> 24) & 0xff;
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desc->base2 = ((base) >> 32);
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desc->limit0 = limit & 0xffff;
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desc->limit1 = (limit >> 16) & 0xf;
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desc->present = 1;
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desc->type = DT_TSS;
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desc->desc_type = DT_SYSTEM_SEGMENT;
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desc->dpl = DPL_KERNEL;
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}
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#endif /* _ASSEMBLER */
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#endif /* _KERNEL_ARCH_X86_64_DESCRIPTORS_H */
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