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kernel/x86: Make x2APIC CPU topology detection more future proof

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The main reason for this patch is to fix gcc 4.8.2 warning about
hierarchyLevels possibly being used not initialized. Such thing
actually can not happen since all x2APIC CPUs are aware of at least
3 topology levels. However, once more topology levels are introduced
we will have to deal with CPUs that do not report information about all
of them.
This commit is contained in:
Pawel Dziepak
2014-02-03 04:55:09 +01:00
parent 4d449fccfe
commit e6cfae450e
1 changed files with 13 additions and 5 deletions
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src/system/kernel/arch/x86/arch_cpu.cpp
+13 -5
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@@ -622,11 +622,11 @@ detect_intel_cpu_topology_x2apic(uint32 maxBasicLeaf)
if (maxBasicLeaf < 11) if (maxBasicLeaf < 11)
return B_UNSUPPORTED; return B_UNSUPPORTED;
uint8 hierarchyLevels[CPU_TOPOLOGY_LEVELS]; uint8 hierarchyLevels[CPU_TOPOLOGY_LEVELS] = { 0 };
int currentLevel = 0; int currentLevel = 0;
int levelType; int levelType;
int levelsSet = 0; unsigned int levelsSet = 0;
do { do {
cpuid_info cpuid; cpuid_info cpuid;
@@ -635,13 +635,15 @@ detect_intel_cpu_topology_x2apic(uint32 maxBasicLeaf)
return B_UNSUPPORTED; return B_UNSUPPORTED;
levelType = (cpuid.regs.ecx >> 8) & 0xff; levelType = (cpuid.regs.ecx >> 8) & 0xff;
int levelValue = cpuid.regs.eax & 0x1f;
switch (levelType) { switch (levelType) {
case 1: // SMT case 1: // SMT
hierarchyLevels[CPU_TOPOLOGY_SMT] = cpuid.regs.eax & 0x1f; hierarchyLevels[CPU_TOPOLOGY_SMT] = levelValue;
levelsSet |= 1; levelsSet |= 1;
break; break;
case 2: // core case 2: // core
hierarchyLevels[CPU_TOPOLOGY_CORE] = cpuid.regs.eax & 0x1f; hierarchyLevels[CPU_TOPOLOGY_CORE] = levelValue;
levelsSet |= 2; levelsSet |= 2;
break; break;
} }
@@ -651,10 +653,16 @@ detect_intel_cpu_topology_x2apic(uint32 maxBasicLeaf)
sGetCPUTopologyID = get_intel_cpu_initial_x2apic_id; sGetCPUTopologyID = get_intel_cpu_initial_x2apic_id;
for (int i = 1; i < CPU_TOPOLOGY_LEVELS; i++) {
if ((levelsSet & (1u << i)) != 0)
continue;
hierarchyLevels[i] = hierarchyLevels[i - 1];
}
for (int i = 0; i < CPU_TOPOLOGY_LEVELS; i++) { for (int i = 0; i < CPU_TOPOLOGY_LEVELS; i++) {
uint32 mask = ~uint32(0); uint32 mask = ~uint32(0);
if (i < CPU_TOPOLOGY_LEVELS - 1) if (i < CPU_TOPOLOGY_LEVELS - 1)
mask = (1 << hierarchyLevels[i]) - 1; mask = (1u << hierarchyLevels[i]) - 1;
if (i > 0) if (i > 0)
mask &= ~sHierarchyMask[i - 1]; mask &= ~sHierarchyMask[i - 1];
sHierarchyMask[i] = mask; sHierarchyMask[i] = mask;