From e703f31b4f058d3ab746f2859a2165d4f6637fe7 Mon Sep 17 00:00:00 2001 From: Rudolf Cornelissen Date: Thu, 23 Sep 2004 19:45:30 +0000 Subject: [PATCH] agp logging update; new cards update for Xtal det, dualhead det. git-svn-id: file:///srv/svn/repos/haiku/trunk/current@9047 a95241bf-73f2-0310-859d-f6bbb57e9c96 --- src/add-ons/accelerants/nvidia/engine/nv_agp.c | 12 +++++++----- src/add-ons/accelerants/nvidia/engine/nv_info.c | 14 +++++++++++--- 2 files changed, 18 insertions(+), 8 deletions(-) diff --git a/src/add-ons/accelerants/nvidia/engine/nv_agp.c b/src/add-ons/accelerants/nvidia/engine/nv_agp.c index b25a2bd714..d3ab459784 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_agp.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_agp.c @@ -1,5 +1,5 @@ /* Author: - Rudolf Cornelissen 6/2004-7/2004 + Rudolf Cornelissen 6/2004-9/2004 */ #define MODULE_BIT 0x00000100 @@ -124,8 +124,9 @@ status_t nv_agp_setup(void) ioctl(fd, NV_ENABLE_AGP, &nca, sizeof(nca)); } - /* list mode now activated */ - nv_agp_list_active(nca.cmd); + /* list mode now activated, + * make sure we have the correct speed scheme for logging */ + nv_agp_list_active(nca.cmd | (nv_ai.interface.agp_stat & AGP_rate_rev)); /* extra check */ LOG(4,("AGP: graphics card AGPCMD register readback $%08x\n", CFGR(AGPCMD))); @@ -177,9 +178,10 @@ static void nv_agp_list_info(agp_info ai) (((ai.interface.agp_stat & AGP_RQ) >> AGP_RQ_shift) + 1))); /* - list current settings + list current settings, + make sure we have the correct speed scheme for logging */ - nv_agp_list_active(ai.interface.agp_cmd); + nv_agp_list_active(ai.interface.agp_cmd | (ai.interface.agp_stat & AGP_rate_rev)); } static void nv_agp_list_active(uint32 cmd) diff --git a/src/add-ons/accelerants/nvidia/engine/nv_info.c b/src/add-ons/accelerants/nvidia/engine/nv_info.c index 95f82720f1..e540339623 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_info.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_info.c @@ -28,7 +28,7 @@ static void pinsnv10_arch_fake(void); static void pinsnv20_arch_fake(void); static void pinsnv30_arch_fake(void); static void getstrap_arch_nv4(void); -static void getstrap_arch_nv10_20_30(void); +static void getstrap_arch_nv10_20_30_40(void); static status_t pins2_read(uint8 *rom, uint32 offset); static status_t pins3_6_read(uint8 *rom, uint32 offset); static status_t coldstart_card(uint8* rom, uint16 init1, uint16 init2, uint16 init_size, uint16 ram_tab); @@ -1498,7 +1498,7 @@ void fake_pins(void) getstrap_arch_nv4(); break; default: - getstrap_arch_nv10_20_30(); + getstrap_arch_nv10_20_30_40(); break; } @@ -2345,7 +2345,7 @@ static void getstrap_arch_nv4(void) si->ps.secondary_head = false; } -static void getstrap_arch_nv10_20_30(void) +static void getstrap_arch_nv10_20_30_40(void) { uint32 dev_manID = CFGR(DEVID); uint32 strapinfo = NV_REG32(NV32_NV10STRAPINFO); @@ -2407,6 +2407,10 @@ static void getstrap_arch_nv10_20_30(void) switch (dev_manID & 0xfff0ffff) { /* Nvidia cards: */ + case 0x004010de: + case 0x00c010de: + case 0x00f010de: + case 0x014010de: case 0x017010de: case 0x018010de: case 0x01f010de: @@ -2429,7 +2433,11 @@ static void getstrap_arch_nv10_20_30(void) switch (dev_manID & 0xfff0ffff) { /* Nvidia cards: */ + case 0x004010de: + case 0x00c010de: + case 0x00f010de: case 0x011010de: + case 0x014010de: case 0x017010de: case 0x018010de: case 0x01f010de: