From ec4e9ea8bc93071057ff685e136c63e37e29a3f1 Mon Sep 17 00:00:00 2001 From: Adrien Destugues Date: Mon, 27 Jan 2020 13:56:57 +0100 Subject: [PATCH] intel_extreme: remove unhandled generation defines - 7xx (1st gen) has no driver in Haiku or is handled by the intel_810 driver - PowerVR has no driver in Haiku So there is no point in having those in the intel_extreme driver. While I'm at it, fix the video timing/resolution constraints for sanitize_video_mode. --- .../private/graphics/intel_extreme/intel_extreme.h | 10 +++------- src/add-ons/accelerants/intel_extreme/accelerant.cpp | 4 +--- src/add-ons/accelerants/intel_extreme/hooks.cpp | 1 - src/add-ons/accelerants/intel_extreme/mode.cpp | 12 ++++-------- src/add-ons/kernel/busses/agp_gart/intel_gart.cpp | 5 ++--- 5 files changed, 10 insertions(+), 22 deletions(-) diff --git a/headers/private/graphics/intel_extreme/intel_extreme.h b/headers/private/graphics/intel_extreme/intel_extreme.h index b6c34e1946..bce272292d 100644 --- a/headers/private/graphics/intel_extreme/intel_extreme.h +++ b/headers/private/graphics/intel_extreme/intel_extreme.h @@ -25,14 +25,14 @@ #define INTEL_GROUP_MASK 0x00fffff0 #define INTEL_MODEL_MASK 0x00ffffff #define INTEL_TYPE_MASK 0x0000000f + // families -#define INTEL_FAMILY_7xx 0x00010000 // First Gen #define INTEL_FAMILY_8xx 0x00020000 // Second Gen #define INTEL_FAMILY_9xx 0x00040000 // Third Gen + #define INTEL_FAMILY_SER5 0x00080000 // Intel5 Series -#define INTEL_FAMILY_POVR 0x00100000 // PowerVR (uugh) #define INTEL_FAMILY_SOC0 0x00200000 // Atom SOC #define INTEL_FAMILY_LAKE 0x00400000 // Intel Lakes + // groups #define INTEL_GROUP_83x (INTEL_FAMILY_8xx | 0x0010) #define INTEL_GROUP_85x (INTEL_FAMILY_8xx | 0x0020) @@ -46,8 +46,6 @@ #define INTEL_GROUP_SNB (INTEL_FAMILY_SER5 | 0x0020) // SandyBridge #define INTEL_GROUP_IVB (INTEL_FAMILY_SER5 | 0x0040) // IvyBridge #define INTEL_GROUP_HAS (INTEL_FAMILY_SER5 | 0x0080) // Haswell -#define INTEL_GROUP_SLT (INTEL_FAMILY_POVR | 0x0010) // Saltwell -#define INTEL_GROUP_FSM (INTEL_FAMILY_POVR | 0x0020) // Fu.Silvermont #define INTEL_GROUP_VLV (INTEL_FAMILY_SOC0 | 0x0010) // ValleyView #define INTEL_GROUP_CHV (INTEL_FAMILY_SOC0 | 0x0020) // CherryView #define INTEL_GROUP_BDW (INTEL_FAMILY_SOC0 | 0x0040) // Broadwell @@ -191,8 +189,6 @@ struct DeviceType { int Generation() const { - if (InFamily(INTEL_FAMILY_7xx)) - return 1; if (InFamily(INTEL_FAMILY_8xx)) return 2; if (InGroup(INTEL_GROUP_91x) || InGroup(INTEL_GROUP_94x) @@ -211,7 +207,7 @@ struct DeviceType { if (InFamily(INTEL_FAMILY_LAKE)) return 9; - // Generation 0 means somethins is wrong :-) + // Generation 0 means something is wrong :-) return 0; } }; diff --git a/src/add-ons/accelerants/intel_extreme/accelerant.cpp b/src/add-ons/accelerants/intel_extreme/accelerant.cpp index 1f5ff039cb..2849d59eaa 100644 --- a/src/add-ons/accelerants/intel_extreme/accelerant.cpp +++ b/src/add-ons/accelerants/intel_extreme/accelerant.cpp @@ -597,12 +597,10 @@ intel_get_accelerant_device_info(accelerant_device_info* info) DeviceType* type = &gInfo->shared_info->device_type; - if (type->InFamily(INTEL_FAMILY_7xx) || type->InFamily(INTEL_FAMILY_8xx)) + if (type->InFamily(INTEL_FAMILY_8xx)) strcpy(info->name, "Intel Extreme"); else if (type->InFamily(INTEL_FAMILY_9xx)) strcpy(info->name, "Intel GMA"); - else if (type->InFamily(INTEL_FAMILY_POVR)) - strcpy(info->name, "Intel PowerVR"); else if (type->InFamily(INTEL_FAMILY_SOC0)) strcpy(info->name, "Intel Atom"); else if (type->InFamily(INTEL_FAMILY_SER5)) diff --git a/src/add-ons/accelerants/intel_extreme/hooks.cpp b/src/add-ons/accelerants/intel_extreme/hooks.cpp index 7ea4dac097..815a1cc8f2 100644 --- a/src/add-ons/accelerants/intel_extreme/hooks.cpp +++ b/src/add-ons/accelerants/intel_extreme/hooks.cpp @@ -122,7 +122,6 @@ get_accelerant_hook(uint32 feature, void* data) || gInfo->shared_info->device_type.InGroup(INTEL_GROUP_PIN) || gInfo->shared_info->device_type.InGroup(INTEL_GROUP_ILK) || gInfo->shared_info->device_type.InFamily(INTEL_FAMILY_SER5) - || gInfo->shared_info->device_type.InFamily(INTEL_FAMILY_POVR) || gInfo->shared_info->device_type.InFamily(INTEL_FAMILY_SOC0)) return NULL; diff --git a/src/add-ons/accelerants/intel_extreme/mode.cpp b/src/add-ons/accelerants/intel_extreme/mode.cpp index 9877bbc889..06e73a1b98 100644 --- a/src/add-ons/accelerants/intel_extreme/mode.cpp +++ b/src/add-ons/accelerants/intel_extreme/mode.cpp @@ -81,29 +81,25 @@ get_color_space_format(const display_mode &mode, uint32 &colorMode, static bool sanitize_display_mode(display_mode& mode) { - // Some cards only support even pixel counts, while others require an odd - // one. uint16 pixelCount = 1; + // Older cards require pixel count to be even if (gInfo->shared_info->device_type.InGroup(INTEL_GROUP_Gxx) || gInfo->shared_info->device_type.InGroup(INTEL_GROUP_96x) || gInfo->shared_info->device_type.InGroup(INTEL_GROUP_94x) || gInfo->shared_info->device_type.InGroup(INTEL_GROUP_91x) - || gInfo->shared_info->device_type.InFamily(INTEL_FAMILY_8xx) - || gInfo->shared_info->device_type.InFamily(INTEL_FAMILY_7xx)) { + || gInfo->shared_info->device_type.InFamily(INTEL_FAMILY_8xx)) { pixelCount = 2; } - // TODO: verify constraints - these are more or less taken from the - // radeon driver! display_constraints constraints = { // resolution - 320, 8192, 200, 4096, + 320, 4096, 200, 4096, // pixel clock gInfo->shared_info->pll_info.min_frequency, gInfo->shared_info->pll_info.max_frequency, // horizontal {pixelCount, 0, 8160, 32, 8192, 0, 8192}, - {1, 1, 4092, 2, 63, 1, 4096} + {1, 1, 8190, 2, 8192, 1, 8192} }; return sanitize_display_mode(mode, constraints, diff --git a/src/add-ons/kernel/busses/agp_gart/intel_gart.cpp b/src/add-ons/kernel/busses/agp_gart/intel_gart.cpp index 2709c2c485..7ea83e009f 100644 --- a/src/add-ons/kernel/busses/agp_gart/intel_gart.cpp +++ b/src/add-ons/kernel/busses/agp_gart/intel_gart.cpp @@ -276,9 +276,8 @@ determine_gtt_stolen(intel_info &info) } } else if (info.type->InGroup(INTEL_GROUP_85x) || info.type->InFamily(INTEL_FAMILY_9xx) - || info.type->InFamily(INTEL_FAMILY_SER5) - || info.type->InFamily(INTEL_FAMILY_SOC0) - || info.type->InFamily(INTEL_FAMILY_POVR)) { + || info.type->InFamily(INTEL_FAMILY_SER5) + || info.type->InFamily(INTEL_FAMILY_SOC0)) { switch (memoryConfig & STOLEN_MEMORY_MASK) { case i855_STOLEN_MEMORY_4M: memorySize *= 4;