diff --git a/src/add-ons/accelerants/intel_extreme/engine.cpp b/src/add-ons/accelerants/intel_extreme/engine.cpp index a574f9a6ac..ba334e50e8 100644 --- a/src/add-ons/accelerants/intel_extreme/engine.cpp +++ b/src/add-ons/accelerants/intel_extreme/engine.cpp @@ -191,7 +191,7 @@ setup_ring_buffer(ring_buffer &ringBuffer, const char* name) /*! Return number of hardware engines */ uint32 -intel_accelerant_engine_count(void) +intel_accelerant_engine_count(void) { CALLED(); return 1; diff --git a/src/add-ons/accelerants/matrox/engine/mga_proto.h b/src/add-ons/accelerants/matrox/engine/mga_proto.h index baf102560e..6b3b4ab643 100644 --- a/src/add-ons/accelerants/matrox/engine/mga_proto.h +++ b/src/add-ons/accelerants/matrox/engine/mga_proto.h @@ -47,7 +47,7 @@ void dump_pins(void); /*DAC functions*/ status_t gx00_dac_mode(int,float); -status_t gx00_dac_palette(uint8*,uint8*,uint8*); +status_t gx00_dac_palette(uint8 r[256],uint8 g[256],uint8 b[256]); status_t gx00_dac_pix_pll_find(display_mode target,float * result,uint8 *,uint8 *,uint8 *, uint8); status_t gx00_dac_set_pix_pll(display_mode target); @@ -86,7 +86,7 @@ status_t gx00_crtc_validate_timing( ); status_t gx00_crtc_set_timing(display_mode target); status_t gx00_crtc_depth(int mode); -status_t gx00_crtc_set_display_start(uint32 startadd,uint8 bpp); +status_t gx00_crtc_set_display_start(uint32 startadd,uint8 bpp); status_t gx00_crtc_set_display_pitch(void); status_t gx00_crtc_dpms(bool display,bool h,bool v); status_t gx00_crtc_mem_priority(uint8); @@ -100,8 +100,8 @@ status_t gx00_crtc_cursor_hide(void); /*XXX - validate_timing*/ status_t g400_crtc2_set_timing(display_mode target); status_t g400_crtc2_depth(int mode); -status_t g400_crtc2_set_display_pitch(void); -status_t g400_crtc2_set_display_start(uint32 startadd,uint8 bpp); +status_t g400_crtc2_set_display_pitch(void); +status_t g400_crtc2_set_display_start(uint32 startadd,uint8 bpp); status_t g400_crtc2_dpms(bool display, bool h, bool v); /*acceleration functions*/ diff --git a/src/add-ons/accelerants/nvidia/engine/nv_proto.h b/src/add-ons/accelerants/nvidia/engine/nv_proto.h index 7125c7c116..d6b8590913 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_proto.h +++ b/src/add-ons/accelerants/nvidia/engine/nv_proto.h @@ -51,7 +51,7 @@ void dump_pins(void); bool nv_dac_crt_connected(void); status_t nv_dac_mode(int,float); status_t nv_dac_dither(bool dither); -status_t nv_dac_palette(uint8*,uint8*,uint8*); +status_t nv_dac_palette(uint8 r[256],uint8 g[256],uint8 b[256]); status_t nv_dac_pix_pll_find(display_mode target,float * result,uint8 *,uint8 *,uint8 *, uint8); status_t nv_dac_set_pix_pll(display_mode target); status_t nv_dac_sys_pll_find(float, float*, uint8*, uint8*, uint8*, uint8); @@ -59,7 +59,7 @@ status_t nv_dac_sys_pll_find(float, float*, uint8*, uint8*, uint8*, uint8); /* DAC2 functions */ bool nv_dac2_crt_connected(void); status_t nv_dac2_mode(int,float); -status_t nv_dac2_palette(uint8*,uint8*,uint8*); +status_t nv_dac2_palette(uint8 r[256],uint8 g[256],uint8 b[256]); status_t nv_dac2_pix_pll_find(display_mode target,float * result,uint8 *,uint8 *,uint8 *, uint8); status_t nv_dac2_set_pix_pll(display_mode target); @@ -78,7 +78,7 @@ status_t nv_crtc_validate_timing( uint16 *vd_e,uint16 *vs_s,uint16 *vs_e,uint16 *vt); status_t nv_crtc_set_timing(display_mode target); status_t nv_crtc_depth(int mode); -status_t nv_crtc_set_display_start(uint32 startadd,uint8 bpp); +status_t nv_crtc_set_display_start(uint32 startadd,uint8 bpp); status_t nv_crtc_set_display_pitch(void); status_t nv_crtc_dpms(bool, bool, bool, bool); status_t nv_crtc_mem_priority(uint8); @@ -98,7 +98,7 @@ status_t nv_crtc2_validate_timing( uint16 *vd_e,uint16 *vs_s,uint16 *vs_e,uint16 *vt); status_t nv_crtc2_set_timing(display_mode target); status_t nv_crtc2_depth(int mode); -status_t nv_crtc2_set_display_start(uint32 startadd,uint8 bpp); +status_t nv_crtc2_set_display_start(uint32 startadd,uint8 bpp); status_t nv_crtc2_set_display_pitch(void); status_t nv_crtc2_dpms(bool, bool, bool, bool); status_t nv_crtc2_mem_priority(uint8); diff --git a/src/add-ons/accelerants/via/engine/proto.h b/src/add-ons/accelerants/via/engine/proto.h index c4d990abae..bcba62f6d4 100644 --- a/src/add-ons/accelerants/via/engine/proto.h +++ b/src/add-ons/accelerants/via/engine/proto.h @@ -41,7 +41,7 @@ void dump_pins(void); /* DAC functions */ bool eng_dac_crt_connected(void); status_t eng_dac_mode(int,float); -status_t eng_dac_palette(uint8*,uint8*,uint8*); +status_t eng_dac_palette(uint8 r[256],uint8 g[256],uint8 b[256]); status_t eng_dac_pix_pll_find(display_mode target,float * result,uint8 *,uint8 *,uint8 *, uint8); status_t eng_dac_set_pix_pll(display_mode target); status_t eng_dac_sys_pll_find(float, float*, uint8*, uint8*, uint8*, uint8); @@ -49,7 +49,7 @@ status_t eng_dac_sys_pll_find(float, float*, uint8*, uint8*, uint8*, uint8); /* DAC2 functions */ bool eng_dac2_crt_connected(void); status_t eng_dac2_mode(int,float); -status_t eng_dac2_palette(uint8*,uint8*,uint8*); +status_t eng_dac2_palette(uint8 r[256],uint8 g[256],uint8 b[256]); status_t eng_dac2_pix_pll_find(display_mode target,float * result,uint8 *,uint8 *,uint8 *, uint8); status_t eng_dac2_set_pix_pll(display_mode target); @@ -66,7 +66,7 @@ status_t eng_crtc_validate_timing( ); status_t eng_crtc_set_timing(display_mode target); status_t eng_crtc_depth(int mode); -status_t eng_crtc_set_display_start(uint32 startadd,uint8 bpp); +status_t eng_crtc_set_display_start(uint32 startadd,uint8 bpp); status_t eng_crtc_set_display_pitch(void); status_t eng_crtc_dpms(bool, bool, bool); @@ -86,7 +86,7 @@ status_t eng_crtc2_validate_timing( ); status_t eng_crtc2_set_timing(display_mode target); status_t eng_crtc2_depth(int mode); -status_t eng_crtc2_set_display_start(uint32 startadd,uint8 bpp); +status_t eng_crtc2_set_display_start(uint32 startadd,uint8 bpp); status_t eng_crtc2_set_display_pitch(void); status_t eng_crtc2_dpms(bool, bool, bool);