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updating DMA acceleration code for NV41, 43, 44. Adding code for NV47: sync to XF86, in progress (acc might be broken now..)

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git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@14985 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Rudolf Cornelissen
2005-11-17 13:00:33 +00:00
parent 5b3f340070
commit efb60a4ef5
1 changed files with 60 additions and 0 deletions
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headers/private/graphics/nvidia/nv_macros.h
+60
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@@ -311,6 +311,66 @@
#define NVACC_NV10_FBTIL7ED 0x001002b4 #define NVACC_NV10_FBTIL7ED 0x001002b4
#define NVACC_NV10_FBTIL7PT 0x001002b8 #define NVACC_NV10_FBTIL7PT 0x001002b8
#define NVACC_NV10_FBTIL7ST 0x001002bc #define NVACC_NV10_FBTIL7ST 0x001002bc
#define NVACC_NV41_FBTIL0AD 0x00100600
#define NVACC_NV41_FBTIL0ED 0x00100604
#define NVACC_NV41_FBTIL0PT 0x00100608
#define NVACC_NV41_FBTIL0ST 0x0010060c
#define NVACC_NV41_FBTIL1AD 0x00100610
#define NVACC_NV41_FBTIL1ED 0x00100614
#define NVACC_NV41_FBTIL1PT 0x00100618
#define NVACC_NV41_FBTIL1ST 0x0010061c
#define NVACC_NV41_FBTIL2AD 0x00100620
#define NVACC_NV41_FBTIL2ED 0x00100624
#define NVACC_NV41_FBTIL2PT 0x00100628
#define NVACC_NV41_FBTIL2ST 0x0010062c
#define NVACC_NV41_FBTIL3AD 0x00100630
#define NVACC_NV41_FBTIL3ED 0x00100634
#define NVACC_NV41_FBTIL3PT 0x00100638
#define NVACC_NV41_FBTIL3ST 0x0010063c
#define NVACC_NV41_FBTIL4AD 0x00100640
#define NVACC_NV41_FBTIL4ED 0x00100644
#define NVACC_NV41_FBTIL4PT 0x00100648
#define NVACC_NV41_FBTIL4ST 0x0010064c
#define NVACC_NV41_FBTIL5AD 0x00100650
#define NVACC_NV41_FBTIL5ED 0x00100654
#define NVACC_NV41_FBTIL5PT 0x00100658
#define NVACC_NV41_FBTIL5ST 0x0010065c
#define NVACC_NV41_FBTIL6AD 0x00100660
#define NVACC_NV41_FBTIL6ED 0x00100664
#define NVACC_NV41_FBTIL6PT 0x00100668
#define NVACC_NV41_FBTIL6ST 0x0010066c
#define NVACC_NV41_FBTIL7AD 0x00100670
#define NVACC_NV41_FBTIL7ED 0x00100674
#define NVACC_NV41_FBTIL7PT 0x00100678
#define NVACC_NV41_FBTIL7ST 0x0010067c
#define NVACC_NV41_FBTIL8AD 0x00100680
#define NVACC_NV41_FBTIL8ED 0x00100684
#define NVACC_NV41_FBTIL8PT 0x00100688
#define NVACC_NV41_FBTIL8ST 0x0010068c
#define NVACC_NV41_FBTIL9AD 0x00100690
#define NVACC_NV41_FBTIL9ED 0x00100694
#define NVACC_NV41_FBTIL9PT 0x00100698
#define NVACC_NV41_FBTIL9ST 0x0010069c
#define NVACC_NV41_FBTILAAD 0x001006a0
#define NVACC_NV41_FBTILAED 0x001006a4
#define NVACC_NV41_FBTILAPT 0x001006a8
#define NVACC_NV41_FBTILAST 0x001006ac
#define NVACC_NV41_FBTILBAD 0x001006b0
#define NVACC_NV41_FBTILBED 0x001006b4
#define NVACC_NV41_FBTILBPT 0x001006b8
#define NVACC_NV41_FBTILBST 0x001006bc
#define NVACC_NV47_FBTILCAD 0x001006c0
#define NVACC_NV47_FBTILCED 0x001006c4
#define NVACC_NV47_FBTILCPT 0x001006c8
#define NVACC_NV47_FBTILCST 0x001006cc
#define NVACC_NV47_FBTILDAD 0x001006d0
#define NVACC_NV47_FBTILDED 0x001006d4
#define NVACC_NV47_FBTILDPT 0x001006d8
#define NVACC_NV47_FBTILDST 0x001006dc
#define NVACC_NV47_FBTILEAD 0x001006e0
#define NVACC_NV47_FBTILEED 0x001006e4
#define NVACC_NV47_FBTILEPT 0x001006e8
#define NVACC_NV47_FBTILEST 0x001006ec
/* engine tile registers dst */ /* engine tile registers dst */
#define NVACC_NV20_WHAT_T0 0x004009a4 #define NVACC_NV20_WHAT_T0 0x004009a4
#define NVACC_NV20_WHAT_T1 0x004009a8 #define NVACC_NV20_WHAT_T1 0x004009a8