From f1616b172d437ae268a6cd9abd3a21c0b1b9069e Mon Sep 17 00:00:00 2001 From: Rudolf Cornelissen Date: Tue, 13 Sep 2005 19:36:07 +0000 Subject: [PATCH] smal update to overlay engine register defines. git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@14183 a95241bf-73f2-0310-859d-f6bbb57e9c96 --- headers/private/graphics/via/macros.h | 63 +-------------------------- 1 file changed, 1 insertion(+), 62 deletions(-) diff --git a/headers/private/graphics/via/macros.h b/headers/private/graphics/via/macros.h index 781e75a160..0e7fd62080 100644 --- a/headers/private/graphics/via/macros.h +++ b/headers/private/graphics/via/macros.h @@ -691,7 +691,7 @@ #define ENBES_VID1_SIZE 0x00000244 #define ENBES_VID1Y_ADDR2 0x00000248 #define ENBES_VID1_ZOOM 0x0000024c -#define ENBES_VID1_MICTL 0x00000250 +#define ENBES_VID1_MINI_CTL 0x00000250 #define ENBES_VID1Y_ADDR0 0x00000254 #define ENBES_VID1_FIFO 0x00000258 #define ENBES_VID1Y_ADDR3 0x0000025c @@ -728,67 +728,6 @@ #define ENBES_VID1V_ADDR3 0x000002fc //end via new. -/* Nvidia BES (Back End Scaler) registers (< NV10, including NV03, so RIVA128(ZX)) */ -#define ENBES_NV04_INTE 0x00680140 -#define ENBES_NV04_ISCALVH 0x00680200 -#define ENBES_NV04_CTRL_V 0x00680204 -#define ENBES_NV04_CTRL_H 0x00680208 -#define ENBES_NV04_OE_STATE 0x00680224 -#define ENBES_NV04_SU_STATE 0x00680228 -#define ENBES_NV04_RM_STATE 0x0068022c -#define ENBES_NV04_DSTREF 0x00680230 -#define ENBES_NV04_DSTSIZE 0x00680234 -#define ENBES_NV04_FIFOTHRS 0x00680238 -#define ENBES_NV04_FIFOBURL 0x0068023c -#define ENBES_NV04_COLKEY 0x00680240 -#define ENBES_NV04_GENCTRL 0x00680244 -#define ENBES_NV04_RED_AMP 0x00680280 -#define ENBES_NV04_GRN_AMP 0x00680284 -#define ENBES_NV04_BLU_AMP 0x00680288 -#define ENBES_NV04_SAT 0x0068028c -/* buffer 0 */ -#define ENBES_NV04_0BUFADR 0x0068020c -#define ENBES_NV04_0SRCPTCH 0x00680214 -#define ENBES_NV04_0OFFSET 0x0068021c -/* buffer 1 */ -#define ENBES_NV04_1BUFADR 0x00680210 -#define ENBES_NV04_1SRCPTCH 0x00680218 -#define ENBES_NV04_1OFFSET 0x00680220 - -/* Nvidia BES (Back End Scaler) registers (>= NV10) */ -#define ENBES_NV10_INTE 0x00008140 -#define ENBES_NV10_BUFSEL 0x00008700 -#define ENBES_NV10_GENCTRL 0x00008704 -#define ENBES_NV10_COLKEY 0x00008b00 -/* buffer 0 */ -#define ENBES_NV10_0BUFADR 0x00008900 -#define ENBES_NV10_0MEMMASK 0x00008908 -#define ENBES_NV10_0BRICON 0x00008910 -#define ENBES_NV10_0SAT 0x00008918 -#define ENBES_NV10_0OFFSET 0x00008920 -#define ENBES_NV10_0SRCSIZE 0x00008928 -#define ENBES_NV10_0SRCREF 0x00008930 -#define ENBES_NV10_0ISCALH 0x00008938 -#define ENBES_NV10_0ISCALV 0x00008940 -#define ENBES_NV10_0DSTREF 0x00008948 -#define ENBES_NV10_0DSTSIZE 0x00008950 -#define ENBES_NV10_0SRCPTCH 0x00008958 -/* buffer 1 */ -#define ENBES_NV10_1BUFADR 0x00008904 -#define ENBES_NV10_1MEMMASK 0x0000890c -#define ENBES_NV10_1BRICON 0x00008914 -#define ENBES_NV10_1SAT 0x0000891c -#define ENBES_NV10_1OFFSET 0x00008924 -#define ENBES_NV10_1SRCSIZE 0x0000892c -#define ENBES_NV10_1SRCREF 0x00008934 -#define ENBES_NV10_1ISCALH 0x0000893c -#define ENBES_NV10_1ISCALV 0x00008944 -#define ENBES_NV10_1DSTREF 0x0000894c -#define ENBES_NV10_1DSTSIZE 0x00008954 -#define ENBES_NV10_1SRCPTCH 0x0000895c -/* Nvidia MPEG2 hardware decoder (GeForce4MX only) */ -#define ENBES_DEC_GENCTRL 0x00001588 - //old: /*MAVEN registers (<= G400) */ #define ENMAV_PGM 0x3E