From f1a3316b9606a67fa38053682691fa971b9baa87 Mon Sep 17 00:00:00 2001
From: Alexander von Gluck IV <kallisti5@unixzen.com>
Date: Sat, 26 Nov 2011 16:07:05 -0600
Subject: [PATCH] Enhance Northern Islands support

* add HD 6480G PCI ID
* graphics memory is stored in bytes on IGP / APU evergreen+
* add an error and a fallback to PCI FB Bar size if we cannot
  find full card memory size
---
 .../drivers/graphics/radeon_hd/driver.cpp     |  1 +
 .../drivers/graphics/radeon_hd/radeon_hd.cpp  | 20 +++++++++++++++----
 2 files changed, 17 insertions(+), 4 deletions(-)

diff --git a/src/add-ons/kernel/drivers/graphics/radeon_hd/driver.cpp b/src/add-ons/kernel/drivers/graphics/radeon_hd/driver.cpp
index 379cc47217..f199e35b33 100644
--- a/src/add-ons/kernel/drivers/graphics/radeon_hd/driver.cpp
+++ b/src/add-ons/kernel/drivers/graphics/radeon_hd/driver.cpp
@@ -185,6 +185,7 @@ const struct supported_device {
 	// Codename: Nothern Islands
 	//  Caicos
 	{0x6760, 5, 0, RADEON_CAICOS, CHIP_MOBILE, "Radeon HD 6470M"},
+	{0x9648, 5, 0, RADEON_CAICOS, CHIP_APU, "Radeon HD 6480G"},
 	{0x6761, 5, 0, RADEON_CAICOS, CHIP_MOBILE, "Radeon HD 6430M"},
 	{0x6762, 5, 0, RADEON_CAICOS, CHIP_STD, "Radeon HD CAICOS"},
 	{0x6763, 5, 0, RADEON_CAICOS, CHIP_DISCREET, "Radeon HD E6460"},
diff --git a/src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp b/src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp
index c5fe8ddd31..3565813a15 100644
--- a/src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp
+++ b/src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp
@@ -602,9 +602,16 @@ radeon_hd_init(radeon_info &info)
 
 	// *** Populate frame buffer information
 	if (info.chipsetID >= RADEON_CEDAR) {
-		// Evergreen+ has memory stored in MB
-		info.shared_info->graphics_memory_size
-			= read32(info.registers + CONFIG_MEMSIZE) * 1024;
+		if ((info.chipsetFlags & CHIP_APU) != 0
+			|| (info.chipsetFlags & CHIP_IGP) != 0) {
+			// Evergreen+ fusion in bytes
+			info.shared_info->graphics_memory_size
+				= read32(info.registers + CONFIG_MEMSIZE) / 1024;
+		} else {
+			// Evergreen+ has memory stored in MB
+			info.shared_info->graphics_memory_size
+				= read32(info.registers + CONFIG_MEMSIZE) * 1024;
+		}
 	} else if (info.chipsetID >= RADEON_R600) {
 		// R600-R700 has memory stored in bytes
 		info.shared_info->graphics_memory_size
@@ -634,7 +641,12 @@ radeon_hd_init(radeon_info &info)
 	uint32 barSize = info.pci->u.h0.base_register_sizes[PCI_BAR_FB] / 1024;
 
 	// if graphics memory is larger then PCI bar, just map bar
-	if (info.shared_info->graphics_memory_size > barSize) {
+	if (info.shared_info->graphics_memory_size == 0) {
+		// we can recover as we have PCI FB bar, but this should be fixed
+		ERROR("%s: Error: found 0MB video ram, using PCI bar size...\n",
+			__func__);
+		info.shared_info->frame_buffer_size = barSize;
+	} else if (info.shared_info->graphics_memory_size > barSize) {
 		TRACE("%s: shrinking frame buffer to PCI bar...\n",
 			__func__);
 		info.shared_info->frame_buffer_size = barSize;