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temporary shutdown AGP stuff, will be rewritten shortly...

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git-svn-id: file:///srv/svn/repos/haiku/trunk/current@8372 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Rudolf Cornelissen
2004-07-10 22:21:46 +00:00
parent 4dcde1726d
commit f2ee363c63
2 changed files with 89 additions and 88 deletions
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src/add-ons/accelerants/nvidia/engine/nv_agp.c
+86 -86
View File
@@ -22,7 +22,7 @@ status_t nv_agp_setup(void)
char path[MAXPATHLEN];
int agp_fd;
agp_info ai_card, ai_bridge;
uint8 rq_depth_card, rq_depth_bridge;
// uint8 rq_depth_card, rq_depth_bridge;
uint8 adress;
/* check for card's AGP capabilities - see PCI specification */
@@ -36,9 +36,9 @@ status_t nv_agp_setup(void)
return B_ERROR;
}
LOG(4,("AGP: graphicscard is AGP type, supporting specification %d.%d;\n",
((ai_card.config.agp_cap_id & AGP_rev_major) >> AGP_rev_major_shift),
((ai_card.config.agp_cap_id & AGP_rev_minor) >> AGP_rev_minor_shift)));
// LOG(4,("AGP: graphicscard is AGP type, supporting specification %d.%d;\n",
// ((ai_card.config.agp_cap_id & AGP_rev_major) >> AGP_rev_major_shift),
// ((ai_card.config.agp_cap_id & AGP_rev_minor) >> AGP_rev_minor_shift)));
/* try to enable FW support if user requested this ('unsupported' tweak!) */
if (si->settings.unhide_fw)
@@ -53,7 +53,7 @@ status_t nv_agp_setup(void)
/* enable strapinfo overwrite */
NV_REG32(NV32_NVSTRAPINFO2) = (reg | 0x80000000);
/* reread cards AGP capabilities */
ai_card.config.agp_stat = PCI_CFGR(adress + 4);
// ai_card.config.agp_stat = PCI_CFGR(adress + 4);
LOG(4, ("AGP: STRAPINFO2 now contains $%08x\n", NV_REG32(NV32_NVSTRAPINFO2)));
}
@@ -74,11 +74,11 @@ status_t nv_agp_setup(void)
}
/* get host bridge info */
ioctl(agp_fd, GET_CONFIG, &ai_bridge);
// ioctl(agp_fd, GET_CONFIG, &ai_bridge);
LOG(4,("AGP: AGP host bridge found, vendorID $%04x, deviceID $%04x\n",
ai_bridge.dev.vendor_id, ai_bridge.dev.device_id));
if (ai_bridge.status != B_OK)
// LOG(4,("AGP: AGP host bridge found, vendorID $%04x, deviceID $%04x\n",
// ai_bridge.dev.vendor_id, ai_bridge.dev.device_id));
// if (ai_bridge.status != B_OK)
{
LOG(4,("AGP: host bridge failed to respond correctly, aborting AGP setup!\n"));
/* close host bridge driver */
@@ -90,9 +90,9 @@ status_t nv_agp_setup(void)
}
/* list host bridge capabilities */
LOG(4,("AGP: host bridge supports specification %d.%d;\n",
((ai_bridge.config.agp_cap_id & AGP_rev_major) >> AGP_rev_major_shift),
((ai_bridge.config.agp_cap_id & AGP_rev_minor) >> AGP_rev_minor_shift)));
// LOG(4,("AGP: host bridge supports specification %d.%d;\n",
// ((ai_bridge.config.agp_cap_id & AGP_rev_major) >> AGP_rev_major_shift),
// ((ai_bridge.config.agp_cap_id & AGP_rev_minor) >> AGP_rev_minor_shift)));
nv_agp_list_caps(ai_bridge);
/* abort if specified by user in nv.settings */
@@ -111,8 +111,8 @@ status_t nv_agp_setup(void)
/* find out if AGP modes are supported: devices exist that have the AGP style
* connector with AGP style registers, but not the features!
* (confirmed Matrox Millenium II AGP for instance) */
if (!(ai_card.config.agp_stat & AGP_rates) ||
!(ai_bridge.config.agp_stat & AGP_rates))
// if (!(ai_card.config.agp_stat & AGP_rates) ||
// !(ai_bridge.config.agp_stat & AGP_rates))
{
LOG(4,("AGP: no AGP modes possible, aborting AGP setup!\n"));
/* close host bridge driver */
@@ -124,8 +124,8 @@ status_t nv_agp_setup(void)
}
/* find out shared AGP capabilities of card and host bridge */
if ((ai_card.config.agp_stat & AGP_rate_rev) !=
(ai_bridge.config.agp_stat & AGP_rate_rev))
// if ((ai_card.config.agp_stat & AGP_rate_rev) !=
// (ai_bridge.config.agp_stat & AGP_rate_rev))
{
LOG(4,("AGP: compatibility problem detected, aborting AGP setup!\n"));
/* close host bridge driver */
@@ -141,85 +141,85 @@ status_t nv_agp_setup(void)
LOG(4,("AGP: enabling AGP\n"));
/* select highest AGP mode */
if (!(ai_bridge.config.agp_stat & AGP_rate_rev))
// if (!(ai_bridge.config.agp_stat & AGP_rate_rev))
{
/* AGP 2.0 scheme applies */
if ((ai_card.config.agp_stat & AGP_2_4x) &&
(ai_bridge.config.agp_stat & AGP_2_4x))
// if ((ai_card.config.agp_stat & AGP_2_4x) &&
// (ai_bridge.config.agp_stat & AGP_2_4x))
{
LOG(4,("AGP: using AGP 2.0 4x mode\n"));
ai_card.config.agp_cmd = AGP_2_4x;
ai_bridge.config.agp_cmd = AGP_2_4x;
// ai_card.config.agp_cmd = AGP_2_4x;
// ai_bridge.config.agp_cmd = AGP_2_4x;
}
else
// else
{
if ((ai_card.config.agp_stat & AGP_2_2x) &&
(ai_bridge.config.agp_stat & AGP_2_2x))
// if ((ai_card.config.agp_stat & AGP_2_2x) &&
// (ai_bridge.config.agp_stat & AGP_2_2x))
{
LOG(4,("AGP: using AGP 2.0 2x mode\n"));
ai_card.config.agp_cmd = AGP_2_2x;
ai_bridge.config.agp_cmd = AGP_2_2x;
// ai_card.config.agp_cmd = AGP_2_2x;
// ai_bridge.config.agp_cmd = AGP_2_2x;
}
else
// else
{
LOG(4,("AGP: using AGP 2.0 1x mode\n"));
ai_card.config.agp_cmd = AGP_2_1x;
ai_bridge.config.agp_cmd = AGP_2_1x;
// ai_card.config.agp_cmd = AGP_2_1x;
// ai_bridge.config.agp_cmd = AGP_2_1x;
}
}
}
else
// else
{
/* AGP 3.0 scheme applies */
if ((ai_card.config.agp_stat & AGP_3_8x) &&
(ai_bridge.config.agp_stat & AGP_3_8x))
// if ((ai_card.config.agp_stat & AGP_3_8x) &&
// (ai_bridge.config.agp_stat & AGP_3_8x))
{
LOG(4,("AGP: using AGP 3.0 8x mode\n"));
ai_card.config.agp_cmd = AGP_3_8x;
ai_bridge.config.agp_cmd = AGP_3_8x;
// ai_card.config.agp_cmd = AGP_3_8x;
// ai_bridge.config.agp_cmd = AGP_3_8x;
}
else
// else
{
LOG(4,("AGP: using AGP 3.0 4x mode\n"));
ai_card.config.agp_cmd = AGP_3_4x;
ai_bridge.config.agp_cmd = AGP_3_4x;
// ai_card.config.agp_cmd = AGP_3_4x;
// ai_bridge.config.agp_cmd = AGP_3_4x;
}
}
/* activate sideband adressing if possible */
if ((ai_card.config.agp_stat & AGP_SBA) &&
(ai_bridge.config.agp_stat & AGP_SBA))
// if ((ai_card.config.agp_stat & AGP_SBA) &&
// (ai_bridge.config.agp_stat & AGP_SBA))
{
LOG(4,("AGP: enabling sideband adressing (SBA)\n"));
ai_card.config.agp_cmd |= AGP_SBA;
ai_bridge.config.agp_cmd |= AGP_SBA;
// ai_card.config.agp_cmd |= AGP_SBA;
// ai_bridge.config.agp_cmd |= AGP_SBA;
}
/* activate fast writes if possible */
if ((ai_card.config.agp_stat & AGP_FW) &&
(ai_bridge.config.agp_stat & AGP_FW))
// if ((ai_card.config.agp_stat & AGP_FW) &&
// (ai_bridge.config.agp_stat & AGP_FW))
{
LOG(4,("AGP: enabling fast writes (FW)\n"));
ai_card.config.agp_cmd |= AGP_FW;
ai_bridge.config.agp_cmd |= AGP_FW;
// ai_card.config.agp_cmd |= AGP_FW;
// ai_bridge.config.agp_cmd |= AGP_FW;
}
/* setup maximum request depth supported */
/* note:
* this is writable only in the graphics card */
rq_depth_card = ((ai_card.config.agp_stat & AGP_RQ) >> AGP_RQ_shift);
rq_depth_bridge = ((ai_bridge.config.agp_stat & AGP_RQ) >> AGP_RQ_shift);
if (rq_depth_card < rq_depth_bridge)
// rq_depth_card = ((ai_card.config.agp_stat & AGP_RQ) >> AGP_RQ_shift);
// rq_depth_bridge = ((ai_bridge.config.agp_stat & AGP_RQ) >> AGP_RQ_shift);
// if (rq_depth_card < rq_depth_bridge)
{
ai_card.config.agp_cmd |= (rq_depth_card << AGP_RQ_shift);
LOG(4,("AGP: max. AGP queued request depth will be set to %d\n",
(rq_depth_card + 1)));
// ai_card.config.agp_cmd |= (rq_depth_card << AGP_RQ_shift);
// LOG(4,("AGP: max. AGP queued request depth will be set to %d\n",
// (rq_depth_card + 1)));
}
else
// else
{
ai_card.config.agp_cmd |= (rq_depth_bridge << AGP_RQ_shift);
LOG(4,("AGP: max. AGP queued request depth will be set to %d\n",
(rq_depth_bridge + 1)));
// ai_card.config.agp_cmd |= (rq_depth_bridge << AGP_RQ_shift);
// LOG(4,("AGP: max. AGP queued request depth will be set to %d\n",
// (rq_depth_bridge + 1)));
}
/* set the enable AGP bits */
@@ -227,14 +227,14 @@ status_t nv_agp_setup(void)
* the AGP standard defines that this bit may be written to the AGPCMD
* registers simultanously with the other bits if a single 32bit write
* to each register is used. */
ai_card.config.agp_cmd |= AGP_enable;
ai_bridge.config.agp_cmd |= AGP_enable;
// ai_card.config.agp_cmd |= AGP_enable;
// ai_bridge.config.agp_cmd |= AGP_enable;
/* finally program both the host bridge and the graphics card! */
/* note:
* the AGP standard defines that the host bridge should be enabled first. */
ioctl(agp_fd, SET_CONFIG, &ai_bridge);
PCI_CFGW((adress + 8), ai_card.config.agp_cmd);
// ioctl(agp_fd, SET_CONFIG, &ai_bridge);
// PCI_CFGW((adress + 8), ai_card.config.agp_cmd);
LOG(4,("AGP: graphics card AGPCMD register readback $%08x\n", CFGR(AGPCMD)));
@@ -250,79 +250,79 @@ static void nv_agp_list_caps(agp_info ai)
list capabilities
*/
/* the mainboard and graphicscard determine AGP version used on power-up/reset */
if (!(ai.config.agp_stat & AGP_rate_rev))
// if (!(ai.config.agp_stat & AGP_rate_rev))
{
/* AGP 2.0 scheme applies */
if (ai.config.agp_stat & AGP_2_1x)
// if (ai.config.agp_stat & AGP_2_1x)
{
LOG(4,("AGP: AGP 2.0 1x mode is available\n"));
}
if (ai.config.agp_stat & AGP_2_2x)
// if (ai.config.agp_stat & AGP_2_2x)
{
LOG(4,("AGP: AGP 2.0 2x mode is available\n"));
}
if (ai.config.agp_stat & AGP_2_4x)
// if (ai.config.agp_stat & AGP_2_4x)
{
LOG(4,("AGP: AGP 2.0 4x mode is available\n"));
}
}
else
// else
{
/* AGP 3.0 scheme applies */
if (ai.config.agp_stat & AGP_3_4x)
// if (ai.config.agp_stat & AGP_3_4x)
{
LOG(4,("AGP: AGP 3.0 4x mode is available\n"));
}
if (ai.config.agp_stat & AGP_3_8x)
// if (ai.config.agp_stat & AGP_3_8x)
{
LOG(4,("AGP: AGP 3.0 8x mode is available\n"));
}
}
if (ai.config.agp_stat & AGP_FW) LOG(4,("AGP: fastwrite transfers are supported\n"));
if (ai.config.agp_stat & AGP_SBA) LOG(4,("AGP: sideband adressing is supported\n"));
LOG(4,("AGP: %d queued AGP requests can be handled.\n",
(((ai.config.agp_stat & AGP_RQ) >> AGP_RQ_shift) + 1)));
// if (ai.config.agp_stat & AGP_FW) LOG(4,("AGP: fastwrite transfers are supported\n"));
// if (ai.config.agp_stat & AGP_SBA) LOG(4,("AGP: sideband adressing is supported\n"));
// LOG(4,("AGP: %d queued AGP requests can be handled.\n",
// (((ai.config.agp_stat & AGP_RQ) >> AGP_RQ_shift) + 1)));
/*
list current settings
*/
LOG(4,("AGP: listing current active settings:\n"));
/* the mainboard and graphicscard determine AGP version used on power-up/reset */
if (!(ai.config.agp_stat & AGP_rate_rev))
// if (!(ai.config.agp_stat & AGP_rate_rev))
{
/* AGP 2.0 scheme applies */
if (ai.config.agp_cmd & AGP_2_1x)
// if (ai.config.agp_cmd & AGP_2_1x)
{
LOG(4,("AGP: AGP 2.0 1x mode is set\n"));
}
if (ai.config.agp_cmd & AGP_2_2x)
// if (ai.config.agp_cmd & AGP_2_2x)
{
LOG(4,("AGP: AGP 2.0 2x mode is set\n"));
}
if (ai.config.agp_cmd & AGP_2_4x)
// if (ai.config.agp_cmd & AGP_2_4x)
{
LOG(4,("AGP: AGP 2.0 4x mode is set\n"));
}
}
else
// else
{
/* AGP 3.0 scheme applies */
if (ai.config.agp_cmd & AGP_3_4x)
// if (ai.config.agp_cmd & AGP_3_4x)
{
LOG(4,("AGP: AGP 3.0 4x mode is set\n"));
}
if (ai.config.agp_cmd & AGP_3_8x)
// if (ai.config.agp_cmd & AGP_3_8x)
{
LOG(4,("AGP: AGP 3.0 8x mode is set\n"));
}
}
if (ai.config.agp_cmd & AGP_FW) LOG(4,("AGP: fastwrite transfers are enabled\n"));
if (ai.config.agp_cmd & AGP_SBA) LOG(4,("AGP: sideband adressing is enabled\n"));
LOG(4,("AGP: max. AGP queued request depth is set to %d\n",
(((ai.config.agp_cmd & AGP_RQ) >> AGP_RQ_shift) + 1)));
if (ai.config.agp_cmd & AGP_enable)
// if (ai.config.agp_cmd & AGP_FW) LOG(4,("AGP: fastwrite transfers are enabled\n"));
// if (ai.config.agp_cmd & AGP_SBA) LOG(4,("AGP: sideband adressing is enabled\n"));
// LOG(4,("AGP: max. AGP queued request depth is set to %d\n",
// (((ai.config.agp_cmd & AGP_RQ) >> AGP_RQ_shift) + 1)));
// if (ai.config.agp_cmd & AGP_enable)
LOG(4,("AGP: this AGP interface is currently enabled.\n"));
else
// else
LOG(4,("AGP: this AGP interface is currently disabled.\n"));
}
@@ -355,9 +355,9 @@ static bool has_AGP_interface(agp_info *ai_card, uint8 *adress)
*adress = item_adress;
/* readout the AGP interface capabilities and settings */
ai_card->config.agp_cap_id = PCI_CFGR(item_adress);
ai_card->config.agp_stat = PCI_CFGR(item_adress + 4);
ai_card->config.agp_cmd = PCI_CFGR(item_adress + 8);
// ai_card->config.agp_cap_id = PCI_CFGR(item_adress);
// ai_card->config.agp_stat = PCI_CFGR(item_adress + 4);
// ai_card->config.agp_cmd = PCI_CFGR(item_adress + 8);
}
}
return has_AGP;
src/add-ons/accelerants/nvidia/engine/nv_general.c
+3 -2
View File
@@ -80,7 +80,7 @@ status_t nv_general_powerup()
{
status_t status;
LOG(1,("POWERUP: nVidia (open)BeOS Accelerant 0.19 running.\n"));
LOG(1,("POWERUP: nVidia (open)BeOS Accelerant 0.20 running.\n"));
/* preset no laptop */
si->ps.laptop = false;
@@ -1133,7 +1133,8 @@ static status_t nv_general_bios_to_powergraphics()
* Note:
* This may only be done when no transfers are in progress on the bus, so now
* is probably a good time.. */
nv_agp_setup();
//fixme: implement route through kerneldriver to access AGP busmanager: in progress...
// nv_agp_setup();
/* turn screen one on */
head1_dpms(true, true, true);