diff --git a/src/add-ons/kernel/busses/scsi/ahci/ahci_controller.cpp b/src/add-ons/kernel/busses/scsi/ahci/ahci_controller.cpp
index 99ffedc174..46ed6c6c50 100644
--- a/src/add-ons/kernel/busses/scsi/ahci/ahci_controller.cpp
+++ b/src/add-ons/kernel/busses/scsi/ahci/ahci_controller.cpp
@@ -98,11 +98,21 @@ AHCIController::Init()
 		gPCI->write_pci_config(fPCIDevice, PCI_JMICRON_CONTROLLER_CONTROL_1, 4, ctrl);
 	}
 
+	fIRQ = pciInfo.u.h0.interrupt_line;
+	if (fIRQ == 0 || fIRQ == 0xff) {
+		TRACE("PCI IRQ not assigned\n");
+		return B_ERROR;
+	}
+
 	void *addr = (void *)pciInfo.u.h0.base_registers[5];
 	size_t size = pciInfo.u.h0.base_register_sizes[5];
 
 	TRACE("registers at %p, size %#lx\n", addr, size);
-	
+	if (!addr) {
+		TRACE("PCI base address register 5 not assigned\n");
+		return B_ERROR;
+	}
+
 	fRegsArea = map_mem((void **)&fRegs, addr, size, 0, "AHCI HBA regs");
 	if (fRegsArea < B_OK) {
 		TRACE("mapping registers failed\n");
@@ -123,12 +133,6 @@ AHCIController::Init()
 		goto err;
 	}
 
-	fIRQ = gPCI->read_pci_config(fPCIDevice, PCI_interrupt_line, 1);
-	if (fIRQ == 0 || fIRQ == 0xff) {
-		TRACE("no IRQ assigned\n");
-		goto err;
-	}
-
 	TRACE("cap: Interface Speed Support: generation %lu\n",	(fRegs->cap >> CAP_ISS_SHIFT) & CAP_ISS_MASK);
 	TRACE("cap: Number of Command Slots: %d (raw %#lx)\n",	fCommandSlotCount, (fRegs->cap >> CAP_NCS_SHIFT) & CAP_NCS_MASK);
 	TRACE("cap: Number of Ports: %d (raw %#lx)\n",			fPortCountMax, (fRegs->cap >> CAP_NP_SHIFT) & CAP_NP_MASK);