diff --git a/src/add-ons/accelerants/nvidia/Overlay.c b/src/add-ons/accelerants/nvidia/Overlay.c
index 094ef3738b..cbeb8cb4a6 100644
--- a/src/add-ons/accelerants/nvidia/Overlay.c
+++ b/src/add-ons/accelerants/nvidia/Overlay.c
@@ -1,4 +1,4 @@
-/* Written by Rudolf Cornelissen 05/2002-2/2005 */
+/* Written by Rudolf Cornelissen 05/2002-2/2006 */
 
 /* Note on 'missing features' in BeOS 5.0.3 and DANO:
  * BeOS needs to define more colorspaces! It would be nice if BeOS would support the FourCC 'definitions'
@@ -205,27 +205,12 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint
 		 * bitmap output or maybe single buffered overlay output if small bitmaps are used. */ 
 
 		adress = (((uint32)((uint8*)si->framebuffer)) + si->ps.memory_size);
-		/* don't touch the DMA acceleration engine command buffer if it exists */
-		/* note:
-		 * the buffer is 32kB in size. Keep some extra distance for safety (faulty apps). */
-		if (si->settings.dma_acc)
-		{
-			if (si->ps.card_arch < NV40A)
-			{
-				/* keeping 32kB distance from the DMA buffer */
-				adress -= (64 * 1024);
-			}
-			else
-			{
-				/* 416kB distance is just OK: keeping another 64kB distance for safety;
-				 * confirmed for NV43. */
-				/* note:
-				 * if you get too close to the DMA command buffer on NV40 and NV43 at
-				 * least (both confirmed), the source DMA instance will mess-up for
-				 * at least engine cmd NV_IMAGE_BLIT and NV12_IMAGE_BLIT. */
-				adress -= (512 * 1024);
-			}
-		}
+		/* Keep some extra distance as a workaround for certain bugs (see
+		 * DriverInterface.h for an explanation). */
+		if (si->ps.card_arch < NV40A)
+			adress -= PRE_NV40_OFFSET;
+		else
+			adress -= NV40_PLUS_OFFSET;
 
 		for (cnt = 0; cnt <= offset; cnt++)
 		{
@@ -311,27 +296,12 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint
 
 		/* calculate physical memory adress (for dma use) */
 		adress = (((uint32)((uint8*)si->framebuffer_pci)) + si->ps.memory_size);
-		/* don't touch the DMA acceleration engine command buffer if it exists */
-		/* note:
-		 * the buffer is 32kB in size. Keep some extra distance for safety (faulty apps). */
-		if (si->settings.dma_acc)
-		{
-			if (si->ps.card_arch < NV40A)
-			{
-				/* keeping 32kB distance from the DMA buffer */
-				adress -= (64 * 1024);
-			}
-			else
-			{
-				/* 416kB distance is just OK: keeping another 64kB distance for safety;
-				 * confirmed for NV43. */
-				/* note:
-				 * if you get too close to the DMA command buffer on NV40 and NV43 at
-				 * least (both confirmed), the source DMA instance will mess-up for
-				 * at least engine cmd NV_IMAGE_BLIT and NV12_IMAGE_BLIT. */
-				adress -= (512 * 1024);
-			}
-		}
+		/* Keep some extra distance as a workaround for certain bugs (see
+		 * DriverInterface.h for an explanation). */
+		if (si->ps.card_arch < NV40A)
+			adress -= PRE_NV40_OFFSET;
+		else
+			adress -= NV40_PLUS_OFFSET;
 
 		for (cnt = 0; cnt <= offset; cnt++)
 		{
diff --git a/src/add-ons/accelerants/nvidia/ProposeDisplayMode.c b/src/add-ons/accelerants/nvidia/ProposeDisplayMode.c
index f3820b5bb6..a3db1f88fa 100644
--- a/src/add-ons/accelerants/nvidia/ProposeDisplayMode.c
+++ b/src/add-ons/accelerants/nvidia/ProposeDisplayMode.c
@@ -4,7 +4,7 @@
 
 	Other authors for NV driver:
 	Mark Watson,
-	Rudolf Cornelissen 9/2002-11/2005
+	Rudolf Cornelissen 9/2002-2/2006
 */
 
 #define MODULE_BIT 0x00400000
@@ -377,27 +377,12 @@ status_t PROPOSE_DISPLAY_MODE(display_mode *target, const display_mode *low, con
 	mem_reservation = 0;
 	/* checkout space needed for hardcursor (if any) */
 	if (si->settings.hardcursor) mem_reservation = 2048;
-	/* reserve space for DMA acceleration engine command buffer (if active) */
-	/* note:
-	 * the buffer is 32kB in size. Keep some extra distance for safety (faulty apps). */
-	if (si->settings.dma_acc)
-	{
-		if (si->ps.card_arch < NV40A)
-		{
-			/* keeping 32kB distance from the DMA buffer */
-			mem_reservation += (64 * 1024);
-		}
-		else
-		{
-			/* 416kB distance is just OK: keeping another 64kB distance for safety;
-			 * confirmed for NV43. */
-			/* note:
-			 * if you get too close to the DMA command buffer on NV40 and NV43 at
-			 * least (both confirmed), the source DMA instance will mess-up for
-			 * at least engine cmd NV_IMAGE_BLIT and NV12_IMAGE_BLIT. */
-			mem_reservation += (512 * 1024);
-		}
-	}
+	/* Reserve extra space as a workaround for certain bugs (see DriverInterface.h
+	 * for an explanation). */
+	if (si->ps.card_arch < NV40A)
+		mem_reservation += PRE_NV40_OFFSET;
+	else
+		mem_reservation += NV40_PLUS_OFFSET;
 
 	/* memory requirement for frame buffer */
 	if ((row_bytes * target->virtual_height) >
diff --git a/src/add-ons/accelerants/nvidia/SetDisplayMode.c b/src/add-ons/accelerants/nvidia/SetDisplayMode.c
index 0978051237..d477ca1ab0 100644
--- a/src/add-ons/accelerants/nvidia/SetDisplayMode.c
+++ b/src/add-ons/accelerants/nvidia/SetDisplayMode.c
@@ -6,7 +6,7 @@
 	Other authors:
 	Mark Watson,
 	Apsed,
-	Rudolf Cornelissen 11/2002-11/2005
+	Rudolf Cornelissen 11/2002-2/2006
 */
 
 #define MODULE_BIT 0x00200000
@@ -326,27 +326,13 @@ status_t SET_DISPLAY_MODE(display_mode *mode_to_set)
 	//if overlay buffers are allocated subtract buffersize from mem_high;
 	//only allocate overlay buffers if 3D is not in use. (block overlay during 3D)
 	si->engine.threeD.mem_high = si->ps.memory_size - 1;
-	/* don't touch the DMA acceleration engine command buffer if it exists */
-	/* note:
-	 * the buffer is 32kB in size. Keep some extra distance for safety (faulty apps). */
-	if (si->settings.dma_acc)
-	{
-		if (si->ps.card_arch < NV40A)
-		{
-			/* keeping 32kB distance from the DMA buffer */
-			si->engine.threeD.mem_high -= (64 * 1024);
-		}
-		else
-		{
-			/* 416kB distance is just OK: keeping another 64kB distance for safety;
-			 * confirmed for NV43. */
-			/* note:
-			 * if you get too close to the DMA command buffer on NV40 and NV43 at
-			 * least (both confirmed), the source DMA instance will mess-up for
-			 * at least engine cmd NV_IMAGE_BLIT and NV12_IMAGE_BLIT. */
-			si->engine.threeD.mem_high -= (512 * 1024);
-		}
-	}
+	/* Keep some extra distance as a workaround for certain bugs (see
+	 * DriverInterface.h for an explanation). */
+	if (si->ps.card_arch < NV40A)
+		si->engine.threeD.mem_high -= PRE_NV40_OFFSET;
+	else
+		si->engine.threeD.mem_high -= NV40_PLUS_OFFSET;
+
 	si->engine.threeD.mem_high -= (MAXBUFFERS * 1024 * 1024 * 2); /* see overlay.c file */
 
 	/* restore screen(s) output state(s) */
diff --git a/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c b/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c
index a189690590..6aa53c977f 100644
--- a/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c
+++ b/src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c
@@ -1,7 +1,7 @@
 /* NV Acceleration functions */
 
 /* Author:
-   Rudolf Cornelissen 8/2003-1/2006.
+   Rudolf Cornelissen 8/2003-2/2006.
 
    This code was possible thanks to:
     - the Linux XFree86 NV driver,
@@ -12,12 +12,9 @@
 
 /* 3D command defines (needed for concurrent overlay/3D 'workaround')
  * note:
- * the workaround contains of two pieces:
+ * the workaround is:
  * - we have to issue a 3D drawing command before overlay is activated to prevent
  *   the acceleration engine to crash;
- * - we have to forego FIFO assignment switching: switching while we use overlay
- *   crashes the acceleration engine as well. (broken since adding
- *   NV_SCALED_IMAGE_FROM_MEMORY...)
  *
  * Hopefully we can find the _real_ solution for this one day... */
 #define RIVA_STATE3D_05(t0, t1, t2, bb, cc) \
@@ -1056,10 +1053,6 @@ status_t nv_acc_init_dma()
 	si->engine.fifo.handle[3] = NV4_SURFACE; /* NV10_CONTEXT_SURFACES_2D is identical */
 	si->engine.fifo.handle[4] = NV_IMAGE_BLIT;
 	si->engine.fifo.handle[5] = NV4_GDI_RECTANGLE_TEXT;
-//fixme: nolonger switching FIFO assignment for 3D as doing that causes trouble when
-//overlay is concurrently active!!!!
-//we can forego switching for now as we had FIFO CH6 still unused...
-//(note btw: switching has no noticable slowdown: measured 0.2% with Quake2)
 	si->engine.fifo.handle[6] = NV4_CONTEXT_SURFACES_ARGB_ZS;//NV1_RENDER_SOLID_LIN;
 	si->engine.fifo.handle[7] = NV4_DX5_TEXTURE_TRIANGLE;
 	/* preset no FIFO channels assigned to cmd's */
@@ -1654,9 +1647,9 @@ static void nv_acc_set_ch_dma(uint16 ch, uint32 handle)
 	si->engine.dma.free -= 2;
 }
 
-//fixme:
-//adding NV_SCALED_IMAGE_FROM_MEMORY here forces fifo channel assignment switching
-//when 3D is also used: the 3D/overlay compatibility tweak is now broken again...
+/* note:
+ * switching fifo channel assignments this way has no noticable slowdown:
+ * measured 0.2% with Quake2. */
 void nv_acc_assert_fifo_dma(void)
 {
 	/* does every engine cmd this accelerant needs have a FIFO channel? */
diff --git a/src/add-ons/accelerants/nvidia/engine/nv_general.c b/src/add-ons/accelerants/nvidia/engine/nv_general.c
index 352eacd358..3576336810 100644
--- a/src/add-ons/accelerants/nvidia/engine/nv_general.c
+++ b/src/add-ons/accelerants/nvidia/engine/nv_general.c
@@ -1,7 +1,7 @@
 /* Authors:
    Mark Watson 12/1999,
    Apsed,
-   Rudolf Cornelissen 10/2002-01/2006
+   Rudolf Cornelissen 10/2002-2/2006
 */
 
 #define MODULE_BIT 0x00008000
@@ -91,7 +91,7 @@ status_t nv_general_powerup()
 {
 	status_t status;
 
-	LOG(1,("POWERUP: Haiku nVidia Accelerant 0.70 running.\n"));
+	LOG(1,("POWERUP: Haiku nVidia Accelerant 0.71 running.\n"));
 
 	/* log VBLANK INT usability status */
 	if (si->ps.int_assigned)