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XHCI: Set the ENT bit on the Status stage TRB for Control transfers.

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Otherwise, it may deschedule this pipe without evaluating the
Event Data TRB and generating the interrupt. Should fix the
"slowness" issue of #15115.
This commit is contained in:
Augustin Cavalier
2019-06-17 19:16:11 -04:00
parent 4f8124c5e3
commit f861a8596a
1 changed files with 1 additions and 1 deletions
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src/add-ons/kernel/busses/usb/xhci.cpp
+1 -1
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@@ -761,7 +761,7 @@ XHCI::SubmitControlRequest(Transfer *transfer)
descriptor->trbs[index].status = TRB_2_IRQ(0); descriptor->trbs[index].status = TRB_2_IRQ(0);
descriptor->trbs[index].flags = TRB_3_TYPE(TRB_TYPE_STATUS_STAGE) descriptor->trbs[index].flags = TRB_3_TYPE(TRB_TYPE_STATUS_STAGE)
| ((directionIn && requestData->Length > 0) ? 0 : TRB_3_DIR_IN) | ((directionIn && requestData->Length > 0) ? 0 : TRB_3_DIR_IN)
| TRB_3_CHAIN_BIT | TRB_3_CYCLE_BIT; | TRB_3_CHAIN_BIT | TRB_3_ENT_BIT | TRB_3_CYCLE_BIT;
// Status Stage is an OUT transfer when the device is sending data // Status Stage is an OUT transfer when the device is sending data
// (XHCI 1.2 § 4.11.2.2 Table 4-7 p213), and the CHAIN bit must be // (XHCI 1.2 § 4.11.2.2 Table 4-7 p213), and the CHAIN bit must be
// set when using an Event Data TRB (as _LinkDescriptorForPipe does) // set when using an Event Data TRB (as _LinkDescriptorForPipe does)