radeon_hd: Final round of header cleanup
* This puts the registers in a better state and ensures all model dependant defines are prefixed with card series * Consolidate evergreen defines into single header
This commit is contained in:
Alexander von Gluck IV
@@ -72,7 +72,7 @@ SYSTEM_APPS = AboutSystem ActivityMonitor $(X86_ONLY)BootManager CharacterMap
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$(X86_ONLY)GLInfo Icon-O-Matic Installer LaunchBox Magnify Mail
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$(X86_ONLY)GLInfo Icon-O-Matic Installer LaunchBox Magnify Mail
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MediaConverter MediaPlayer MidiPlayer NetworkStatus PackageInstaller People
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MediaConverter MediaPlayer MidiPlayer NetworkStatus PackageInstaller People
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PoorMan PowerStatus ProcessController Screenshot ShowImage SoundRecorder
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PoorMan PowerStatus ProcessController Screenshot ShowImage SoundRecorder
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StyledEdit Terminal TextSearch TV WebWatch Workspaces
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StyledEdit Terminal TextSearch TV WebWatch Workspaces SerialConnect
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;
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;
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SYSTEM_PREFERENCES = Appearance Backgrounds CPUFrequency DataTranslations
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SYSTEM_PREFERENCES = Appearance Backgrounds CPUFrequency DataTranslations
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<preference>Deskbar E-mail FileTypes Keyboard Keymap Locale Media
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<preference>Deskbar E-mail FileTypes Keyboard Keymap Locale Media
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@@ -23,10 +23,10 @@
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* Authors: Dave Airlie
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* Authors: Dave Airlie
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* Alex Deucher
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* Alex Deucher
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* Jerome Glisse
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* Jerome Glisse
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* Alexander von Gluck IV
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* Alexander von Gluck <[email protected]>
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*/
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*/
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#ifndef AVIVO_H
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#ifndef __AVIVO_REG_H__
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#define AVIVO_H
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#define __AVIVO_REG_H__
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#define AVIVO_D1CRTC_UPDATE_LOCK 0x60E8
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#define AVIVO_D1CRTC_UPDATE_LOCK 0x60E8
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@@ -558,4 +558,4 @@
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#define AVIVO_D2_VBLANK_INTERRUPT (1 << 5)
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#define AVIVO_D2_VBLANK_INTERRUPT (1 << 5)
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#endif /* AVIVO_H */
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#endif /* __AVIVO_REG_H__ */
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@@ -1,197 +1,261 @@
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/*
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/*
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* Copyright 2010 Advanced Micro Devices, Inc.
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* Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
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* Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
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* VA Linux Systems Inc., Fremont, California.
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* VA Linux Systems Inc., Fremont, California.
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*
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*
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* All Rights Reserved.
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* All Rights Reserved.
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*
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* Permission is hereby granted, free of charge, to any person obtaining a
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* a copy of this software and associated documentation files (the
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* copy of this software and associated documentation files (the "Software"),
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* "Software"), to deal in the Software without restriction, including
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* to deal in the Software without restriction, including without limitation
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* without limitation on the rights to use, copy, modify, merge,
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* publish, distribute, sublicense, and/or sell copies of the Software,
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* and/or sell copies of the Software, and to permit persons to whom the
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* and to permit persons to whom the Software is furnished to do so,
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* Software is furnished to do so, subject to the following conditions:
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* subject to the following conditions:
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*
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*
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* The above copyright notice and this permission notice (including the
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* The above copyright notice and this permission notice shall be included in
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* next paragraph) shall be included in all copies or substantial
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* all copies or substantial portions of the Software.
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* portions of the Software.
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*
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* OTHER DEALINGS IN THE SOFTWARE.
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors: Alex Deucher
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* Kevin E. Martin <[email protected]>
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* Rickard E. Faith <[email protected]>
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* Alan Hourihane <[email protected]>
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* Alexander von Gluck <[email protected]>
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*/
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*/
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#ifndef __EVERGREEN_REG_H__
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#define __EVERGREEN_REG_H__
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/*
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/* Scratch Registers */
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* Authors:
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#define EVERGREEN_SCRATCH_REG0 0x8500
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* Kevin E. Martin <[email protected]>
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#define EVERGREEN_SCRATCH_REG1 0x8504
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* Rickard E. Faith <[email protected]>
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#define EVERGREEN_SCRATCH_REG2 0x8508
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* Alan Hourihane <[email protected]>
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#define EVERGREEN_SCRATCH_REG3 0x850C
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*
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#define EVERGREEN_SCRATCH_REG4 0x8510
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* References:
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#define EVERGREEN_SCRATCH_REG5 0x8514
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*
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#define EVERGREEN_SCRATCH_REG6 0x8518
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* !!!! FIXME !!!!
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#define EVERGREEN_SCRATCH_REG7 0x851C
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* RAGE 128 VR/ RAGE 128 GL Register Reference Manual (Technical
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#define EVERGREEN_SCRATCH_UMSK 0x8540
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* Reference Manual P/N RRG-G04100-C Rev. 0.04), ATI Technologies: April
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#define EVERGREEN_SCRATCH_ADDR 0x8544
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* 1999.
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*
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* !!!! FIXME !!!!
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* RAGE 128 Software Development Manual (Technical Reference Manual P/N
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* SDK-G04000 Rev. 0.01), ATI Technologies: June 1999.
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*
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*/
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/* CRT controler register offset */
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#define EVERGREEN_CRTC0_REGISTER_OFFSET (0x6df0 - 0x6df0)
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#define EVERGREEN_CRTC1_REGISTER_OFFSET (0x79f0 - 0x6df0)
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#define EVERGREEN_CRTC2_REGISTER_OFFSET (0x105f0 - 0x6df0)
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#define EVERGREEN_CRTC3_REGISTER_OFFSET (0x111f0 - 0x6df0)
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#define EVERGREEN_CRTC4_REGISTER_OFFSET (0x11df0 - 0x6df0)
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#define EVERGREEN_CRTC5_REGISTER_OFFSET (0x129f0 - 0x6df0)
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#define EVERGREEN_HDP_HOST_PATH_CNTL 0x2C00
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/* Memory Controler */
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#define EVERGREEN_HDP_NONSURFACE_BASE 0x2C04
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#define EVERGREEN_MC_ARB_RAMCFG 0x2760
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#define EVERGREEN_HDP_NONSURFACE_INFO 0x2C08
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#define EVERGREEN_NOOFBANK_SHIFT 0
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#define EVERGREEN_HDP_NONSURFACE_SIZE 0x2C0C
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#define EVERGREEN_NOOFBANK_MASK 0x00000003
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#define EVERGREEN_HDP_MEM_COHERENCY_FLUSH_CNTL 0x5480
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#define EVERGREEN_NOOFRANK_SHIFT 2
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#define EVERGREEN_HDP_REG_COHERENCY_FLUSH_CNTL 0x54A0
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#define EVERGREEN_NOOFRANK_MASK 0x00000004
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#define EVERGREEN_HDP_TILING_CONFIG 0x2F3C
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#define EVERGREEN_NOOFROWS_SHIFT 3
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#define EVERGREEN_NOOFROWS_MASK 0x00000038
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#define EVERGREEN_NOOFCOLS_SHIFT 6
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#define EVERGREEN_NOOFCOLS_MASK 0x000000C0
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#define EVERGREEN_CHANSIZE_SHIFT 8
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#define EVERGREEN_CHANSIZE_MASK 0x00000100
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#define EVERGREEN_BURSTLENGTH_SHIFT 9
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#define EVERGREEN_BURSTLENGTH_MASK 0x00000200
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#define EVERGREEN_CHANSIZE_OVERRIDE (1 << 11)
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#define EVERGREEN_FUS_MC_ARB_RAMCFG 0x2768
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#define EVERGREEN_MC_VM_AGP_TOP 0x2028
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#define EVERGREEN_MC_VM_AGP_BOT 0x202C
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#define EVERGREEN_MC_VM_AGP_BASE 0x2030
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#define EVERGREEN_MC_VM_FB_LOCATION 0x2024
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#define EVERGREEN_MC_FUS_VM_FB_OFFSET 0x2898
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#define EVERGREEN_MC_VM_MB_L1_TLB0_CNTL 0x2234
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#define EVERGREEN_MC_VM_MB_L1_TLB1_CNTL 0x2238
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#define EVERGREEN_MC_VM_MB_L1_TLB2_CNTL 0x223C
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#define EVERGREEN_MC_VM_MB_L1_TLB3_CNTL 0x2240
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#define EVERGREEN_ENABLE_L1_TLB (1 << 0)
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#define EVERGREEN_ENABLE_L1_FRAGMENT_PROCESSING (1 << 1)
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#define EVERGREEN_SYSTEM_ACCESS_MODE_PA_ONLY (0 << 3)
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#define EVERGREEN_SYSTEM_ACCESS_MODE_USE_SYS_MAP (1 << 3)
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#define EVERGREEN_SYSTEM_ACCESS_MODE_IN_SYS (2 << 3)
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#define EVERGREEN_SYSTEM_ACCESS_MODE_NOT_IN_SYS (3 << 3)
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#define EVERGREEN_SYSTEM_APERTURE_UNMAPPED_ACCESS_PASS_THRU (0 << 5)
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#define EVERGREEN_EFFECTIVE_L1_TLB_SIZE(x) ((x)<<15)
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#define EVERGREEN_EFFECTIVE_L1_QUEUE_SIZE(x) ((x)<<18)
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#define EVERGREEN_MC_VM_MD_L1_TLB0_CNTL 0x2654
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#define EVERGREEN_MC_VM_MD_L1_TLB1_CNTL 0x2658
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#define EVERGREEN_MC_VM_MD_L1_TLB2_CNTL 0x265C
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#define EVERGREEN_VGA_MEMORY_BASE_ADDRESS 0x310
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#define EVERGREEN_FUS_MC_VM_MD_L1_TLB0_CNTL 0x265C
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#define EVERGREEN_VGA_MEMORY_BASE_ADDRESS_HIGH 0x324
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#define EVERGREEN_FUS_MC_VM_MD_L1_TLB1_CNTL 0x2660
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#define EVERGREEN_D3VGA_CONTROL 0x3e0
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#define EVERGREEN_FUS_MC_VM_MD_L1_TLB2_CNTL 0x2664
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#define EVERGREEN_D4VGA_CONTROL 0x3e4
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#define EVERGREEN_D5VGA_CONTROL 0x3e8
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#define EVERGREEN_MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR 0x203C
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#define EVERGREEN_D6VGA_CONTROL 0x3ec
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#define EVERGREEN_MC_VM_SYSTEM_APERTURE_HIGH_ADDR 0x2038
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#define EVERGREEN_P1PLL_SS_CNTL 0x414
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#define EVERGREEN_MC_VM_SYSTEM_APERTURE_LOW_ADDR 0x2034
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#define EVERGREEN_P2PLL_SS_CNTL 0x454
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# define EVERGREEN_PxPLL_SS_EN (1 << 12)
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/* Hot Plug Detection */
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#define EVERGREEN_GRPH_ENABLE 0x6800
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#define EVERGREEN_HDP_HOST_PATH_CNTL 0x2C00
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#define EVERGREEN_GRPH_CONTROL 0x6804
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#define EVERGREEN_HDP_NONSURFACE_BASE 0x2C04
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# define EVERGREEN_GRPH_DEPTH(x) (((x) & 0x3) << 0)
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#define EVERGREEN_HDP_NONSURFACE_INFO 0x2C08
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# define EVERGREEN_GRPH_DEPTH_8BPP 0
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#define EVERGREEN_HDP_NONSURFACE_SIZE 0x2C0C
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# define EVERGREEN_GRPH_DEPTH_16BPP 1
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#define EVERGREEN_HDP_TILING_CONFIG 0x2F3C
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# define EVERGREEN_GRPH_DEPTH_32BPP 2
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#define EVERGREEN_HDP_MEM_COHERENCY_FLUSH_CNTL 0x5480
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# define EVERGREEN_GRPH_FORMAT(x) (((x) & 0x7) << 8)
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#define EVERGREEN_HDP_REG_COHERENCY_FLUSH_CNTL 0x54A0
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# define EVERGREEN_GRPH_FORMAT_INDEXED 0
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# define EVERGREEN_GRPH_FORMAT_ARGB1555 0
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/* Sensors */
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# define EVERGREEN_GRPH_FORMAT_ARGB565 1
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#define EVERGREEN_CG_THERMAL_CTRL 0x72c
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# define EVERGREEN_GRPH_FORMAT_ARGB4444 2
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#define EVERGREEN_TOFFSET_MASK 0x00003FE0
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# define EVERGREEN_GRPH_FORMAT_AI88 3
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#define EVERGREEN_TOFFSET_SHIFT 5
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# define EVERGREEN_GRPH_FORMAT_MONO16 4
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#define EVERGREEN_CG_MULT_THERMAL_STATUS 0x740
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# define EVERGREEN_GRPH_FORMAT_BGRA5551 5
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#define EVERGREEN_ASIC_T(x) ((x) << 16)
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# define EVERGREEN_GRPH_FORMAT_ARGB8888 0
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#define EVERGREEN_ASIC_T_MASK 0x07FF0000
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# define EVERGREEN_GRPH_FORMAT_ARGB2101010 1
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#define EVERGREEN_ASIC_T_SHIFT 16
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# define EVERGREEN_GRPH_FORMAT_32BPP_DIG 2
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#define EVERGREEN_CG_TS0_STATUS 0x760
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# define EVERGREEN_GRPH_FORMAT_8B_ARGB2101010 3
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#define EVERGREEN_TS0_ADC_DOUT_MASK 0x000003FF
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# define EVERGREEN_GRPH_FORMAT_BGRA1010102 4
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#define EVERGREEN_TS0_ADC_DOUT_SHIFT 0
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# define EVERGREEN_GRPH_FORMAT_8B_BGRA1010102 5
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/* APU */
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# define EVERGREEN_GRPH_FORMAT_RGB111110 6
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#define EVERGREEN_CG_THERMAL_STATUS 0x678
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# define EVERGREEN_GRPH_FORMAT_BGR101111 7
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#define EVERGREEN_GRPH_SWAP_CONTROL 0x680c
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#define EVERGREEN_VGA_MEMORY_BASE_ADDRESS 0x310
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# define EVERGREEN_GRPH_ENDIAN_SWAP(x) (((x) & 0x3) << 0)
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#define EVERGREEN_VGA_MEMORY_BASE_ADDRESS_HIGH 0x324
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# define EVERGREEN_GRPH_ENDIAN_NONE 0
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#define EVERGREEN_D3VGA_CONTROL 0x3e0
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# define EVERGREEN_GRPH_ENDIAN_8IN16 1
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#define EVERGREEN_D4VGA_CONTROL 0x3e4
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# define EVERGREEN_GRPH_ENDIAN_8IN32 2
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#define EVERGREEN_D5VGA_CONTROL 0x3e8
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# define EVERGREEN_GRPH_ENDIAN_8IN64 3
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#define EVERGREEN_D6VGA_CONTROL 0x3ec
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# define EVERGREEN_GRPH_RED_CROSSBAR(x) (((x) & 0x3) << 4)
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#define EVERGREEN_P1PLL_SS_CNTL 0x414
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# define EVERGREEN_GRPH_RED_SEL_R 0
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#define EVERGREEN_P2PLL_SS_CNTL 0x454
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# define EVERGREEN_GRPH_RED_SEL_G 1
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#define EVERGREEN_PxPLL_SS_EN (1 << 12)
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# define EVERGREEN_GRPH_RED_SEL_B 2
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#define EVERGREEN_GRPH_ENABLE 0x6800
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# define EVERGREEN_GRPH_RED_SEL_A 3
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#define EVERGREEN_GRPH_CONTROL 0x6804
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# define EVERGREEN_GRPH_GREEN_CROSSBAR(x) (((x) & 0x3) << 6)
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#define EVERGREEN_GRPH_DEPTH(x) (((x) & 0x3) << 0)
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# define EVERGREEN_GRPH_GREEN_SEL_G 0
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#define EVERGREEN_GRPH_DEPTH_8BPP 0
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# define EVERGREEN_GRPH_GREEN_SEL_B 1
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#define EVERGREEN_GRPH_DEPTH_16BPP 1
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# define EVERGREEN_GRPH_GREEN_SEL_A 2
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#define EVERGREEN_GRPH_DEPTH_32BPP 2
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# define EVERGREEN_GRPH_GREEN_SEL_R 3
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#define EVERGREEN_GRPH_FORMAT(x) (((x) & 0x7) << 8)
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# define EVERGREEN_GRPH_BLUE_CROSSBAR(x) (((x) & 0x3) << 8)
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#define EVERGREEN_GRPH_FORMAT_INDEXED 0
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# define EVERGREEN_GRPH_BLUE_SEL_B 0
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#define EVERGREEN_GRPH_FORMAT_ARGB1555 0
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# define EVERGREEN_GRPH_BLUE_SEL_A 1
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#define EVERGREEN_GRPH_FORMAT_ARGB565 1
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# define EVERGREEN_GRPH_BLUE_SEL_R 2
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#define EVERGREEN_GRPH_FORMAT_ARGB4444 2
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# define EVERGREEN_GRPH_BLUE_SEL_G 3
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#define EVERGREEN_GRPH_FORMAT_AI88 3
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# define EVERGREEN_GRPH_ALPHA_CROSSBAR(x) (((x) & 0x3) << 10)
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#define EVERGREEN_GRPH_FORMAT_MONO16 4
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# define EVERGREEN_GRPH_ALPHA_SEL_A 0
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#define EVERGREEN_GRPH_FORMAT_BGRA5551 5
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# define EVERGREEN_GRPH_ALPHA_SEL_R 1
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#define EVERGREEN_GRPH_FORMAT_ARGB8888 0
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# define EVERGREEN_GRPH_ALPHA_SEL_G 2
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#define EVERGREEN_GRPH_FORMAT_ARGB2101010 1
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# define EVERGREEN_GRPH_ALPHA_SEL_B 3
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#define EVERGREEN_GRPH_FORMAT_32BPP_DIG 2
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#define EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS 0x6810
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#define EVERGREEN_GRPH_FORMAT_8B_ARGB2101010 3
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#define EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS 0x6814
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#define EVERGREEN_GRPH_FORMAT_BGRA1010102 4
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# define EVERGREEN_GRPH_DFQ_ENABLE (1 << 0)
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#define EVERGREEN_GRPH_FORMAT_8B_BGRA1010102 5
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# define EVERGREEN_GRPH_SURFACE_ADDRESS_MASK 0xffffff00
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#define EVERGREEN_GRPH_FORMAT_RGB111110 6
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#define EVERGREEN_GRPH_PITCH 0x6818
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#define EVERGREEN_GRPH_FORMAT_BGR101111 7
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#define EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x681c
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#define EVERGREEN_GRPH_SWAP_CONTROL 0x680c
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#define EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0x6820
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#define EVERGREEN_GRPH_ENDIAN_SWAP(x) (((x) & 0x3) << 0)
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#define EVERGREEN_GRPH_SURFACE_OFFSET_X 0x6824
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#define EVERGREEN_GRPH_ENDIAN_NONE 0
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#define EVERGREEN_GRPH_SURFACE_OFFSET_Y 0x6828
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#define EVERGREEN_GRPH_ENDIAN_8IN16 1
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#define EVERGREEN_GRPH_X_START 0x682c
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#define EVERGREEN_GRPH_ENDIAN_8IN32 2
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#define EVERGREEN_GRPH_Y_START 0x6830
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#define EVERGREEN_GRPH_ENDIAN_8IN64 3
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#define EVERGREEN_GRPH_X_END 0x6834
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#define EVERGREEN_GRPH_RED_CROSSBAR(x) (((x) & 0x3) << 4)
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#define EVERGREEN_GRPH_Y_END 0x6838
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#define EVERGREEN_GRPH_RED_SEL_R 0
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#define EVERGREEN_GRPH_FLIP_CONTROL 0x6848
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#define EVERGREEN_GRPH_RED_SEL_G 1
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#define EVERGREEN_GRPH_RED_SEL_B 2
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#define EVERGREEN_GRPH_RED_SEL_A 3
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#define EVERGREEN_GRPH_GREEN_CROSSBAR(x) (((x) & 0x3) << 6)
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#define EVERGREEN_GRPH_GREEN_SEL_G 0
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#define EVERGREEN_GRPH_GREEN_SEL_B 1
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#define EVERGREEN_GRPH_GREEN_SEL_A 2
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#define EVERGREEN_GRPH_GREEN_SEL_R 3
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#define EVERGREEN_GRPH_BLUE_CROSSBAR(x) (((x) & 0x3) << 8)
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||||||
|
#define EVERGREEN_GRPH_BLUE_SEL_B 0
|
||||||
|
#define EVERGREEN_GRPH_BLUE_SEL_A 1
|
||||||
|
#define EVERGREEN_GRPH_BLUE_SEL_R 2
|
||||||
|
#define EVERGREEN_GRPH_BLUE_SEL_G 3
|
||||||
|
#define EVERGREEN_GRPH_ALPHA_CROSSBAR(x) (((x) & 0x3) << 10)
|
||||||
|
#define EVERGREEN_GRPH_ALPHA_SEL_A 0
|
||||||
|
#define EVERGREEN_GRPH_ALPHA_SEL_R 1
|
||||||
|
#define EVERGREEN_GRPH_ALPHA_SEL_G 2
|
||||||
|
#define EVERGREEN_GRPH_ALPHA_SEL_B 3
|
||||||
|
#define EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS 0x6810
|
||||||
|
#define EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS 0x6814
|
||||||
|
#define EVERGREEN_GRPH_DFQ_ENABLE (1 << 0)
|
||||||
|
#define EVERGREEN_GRPH_SURFACE_ADDRESS_MASK 0xffffff00
|
||||||
|
#define EVERGREEN_GRPH_PITCH 0x6818
|
||||||
|
#define EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x681c
|
||||||
|
#define EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0x6820
|
||||||
|
#define EVERGREEN_GRPH_SURFACE_OFFSET_X 0x6824
|
||||||
|
#define EVERGREEN_GRPH_SURFACE_OFFSET_Y 0x6828
|
||||||
|
#define EVERGREEN_GRPH_X_START 0x682c
|
||||||
|
#define EVERGREEN_GRPH_Y_START 0x6830
|
||||||
|
#define EVERGREEN_GRPH_X_END 0x6834
|
||||||
|
#define EVERGREEN_GRPH_Y_END 0x6838
|
||||||
|
#define EVERGREEN_GRPH_FLIP_CONTROL 0x6848
|
||||||
# define EVERGREEN_GRPH_SURFACE_UPDATE_H_RETRACE_EN (1 << 0)
|
# define EVERGREEN_GRPH_SURFACE_UPDATE_H_RETRACE_EN (1 << 0)
|
||||||
#define EVERGREEN_CUR_CONTROL 0x6998
|
#define EVERGREEN_CUR_CONTROL 0x6998
|
||||||
# define EVERGREEN_CURSOR_EN (1 << 0)
|
#define EVERGREEN_CURSOR_EN (1 << 0)
|
||||||
# define EVERGREEN_CURSOR_MODE(x) (((x) & 0x3) << 8)
|
#define EVERGREEN_CURSOR_MODE(x) (((x) & 0x3) << 8)
|
||||||
# define EVERGREEN_CURSOR_MONO 0
|
#define EVERGREEN_CURSOR_MONO 0
|
||||||
# define EVERGREEN_CURSOR_24_1 1
|
#define EVERGREEN_CURSOR_24_1 1
|
||||||
# define EVERGREEN_CURSOR_24_8_PRE_MULT 2
|
#define EVERGREEN_CURSOR_24_8_PRE_MULT 2
|
||||||
# define EVERGREEN_CURSOR_24_8_UNPRE_MULT 3
|
#define EVERGREEN_CURSOR_24_8_UNPRE_MULT 3
|
||||||
# define EVERGREEN_CURSOR_2X_MAGNIFY (1 << 16)
|
#define EVERGREEN_CURSOR_2X_MAGNIFY (1 << 16)
|
||||||
# define EVERGREEN_CURSOR_FORCE_MC_ON (1 << 20)
|
#define EVERGREEN_CURSOR_FORCE_MC_ON (1 << 20)
|
||||||
# define EVERGREEN_CURSOR_URGENT_CONTROL(x) (((x) & 0x7) << 24)
|
#define EVERGREEN_CURSOR_URGENT_CONTROL(x) (((x) & 0x7) << 24)
|
||||||
# define EVERGREEN_CURSOR_URGENT_ALWAYS 0
|
#define EVERGREEN_CURSOR_URGENT_ALWAYS 0
|
||||||
# define EVERGREEN_CURSOR_URGENT_1_8 1
|
#define EVERGREEN_CURSOR_URGENT_1_8 1
|
||||||
# define EVERGREEN_CURSOR_URGENT_1_4 2
|
#define EVERGREEN_CURSOR_URGENT_1_4 2
|
||||||
# define EVERGREEN_CURSOR_URGENT_3_8 3
|
#define EVERGREEN_CURSOR_URGENT_3_8 3
|
||||||
# define EVERGREEN_CURSOR_URGENT_1_2 4
|
#define EVERGREEN_CURSOR_URGENT_1_2 4
|
||||||
#define EVERGREEN_CUR_SURFACE_ADDRESS 0x699c
|
#define EVERGREEN_CUR_SURFACE_ADDRESS 0x699c
|
||||||
# define EVERGREEN_CUR_SURFACE_ADDRESS_MASK 0xfffff000
|
#define EVERGREEN_CUR_SURFACE_ADDRESS_MASK 0xfffff000
|
||||||
#define EVERGREEN_CUR_SIZE 0x69a0
|
#define EVERGREEN_CUR_SIZE 0x69a0
|
||||||
#define EVERGREEN_CUR_SURFACE_ADDRESS_HIGH 0x69a4
|
#define EVERGREEN_CUR_SURFACE_ADDRESS_HIGH 0x69a4
|
||||||
#define EVERGREEN_CUR_POSITION 0x69a8
|
#define EVERGREEN_CUR_POSITION 0x69a8
|
||||||
#define EVERGREEN_CUR_HOT_SPOT 0x69ac
|
#define EVERGREEN_CUR_HOT_SPOT 0x69ac
|
||||||
#define EVERGREEN_CUR_COLOR1 0x69b0
|
#define EVERGREEN_CUR_COLOR1 0x69b0
|
||||||
#define EVERGREEN_CUR_COLOR2 0x69b4
|
#define EVERGREEN_CUR_COLOR2 0x69b4
|
||||||
#define EVERGREEN_CUR_UPDATE 0x69b8
|
#define EVERGREEN_CUR_UPDATE 0x69b8
|
||||||
# define EVERGREEN_CURSOR_UPDATE_PENDING (1 << 0)
|
#define EVERGREEN_CURSOR_UPDATE_PENDING (1 << 0)
|
||||||
# define EVERGREEN_CURSOR_UPDATE_TAKEN (1 << 1)
|
#define EVERGREEN_CURSOR_UPDATE_TAKEN (1 << 1)
|
||||||
# define EVERGREEN_CURSOR_UPDATE_LOCK (1 << 16)
|
#define EVERGREEN_CURSOR_UPDATE_LOCK (1 << 16)
|
||||||
# define EVERGREEN_CURSOR_DISABLE_MULTIPLE_UPDATE (1 << 24)
|
#define EVERGREEN_CURSOR_DISABLE_MULTIPLE_UPDATE (1 << 24)
|
||||||
#define EVERGREEN_DC_LUT_RW_MODE 0x69e0
|
#define EVERGREEN_DC_LUT_RW_MODE 0x69e0
|
||||||
#define EVERGREEN_DC_LUT_RW_INDEX 0x69e4
|
#define EVERGREEN_DC_LUT_RW_INDEX 0x69e4
|
||||||
#define EVERGREEN_DC_LUT_SEQ_COLOR 0x69e8
|
#define EVERGREEN_DC_LUT_SEQ_COLOR 0x69e8
|
||||||
#define EVERGREEN_DC_LUT_PWL_DATA 0x69ec
|
#define EVERGREEN_DC_LUT_PWL_DATA 0x69ec
|
||||||
#define EVERGREEN_DC_LUT_30_COLOR 0x69f0
|
#define EVERGREEN_DC_LUT_30_COLOR 0x69f0
|
||||||
#define EVERGREEN_DC_LUT_VGA_ACCESS_ENABLE 0x69f4
|
#define EVERGREEN_DC_LUT_VGA_ACCESS_ENABLE 0x69f4
|
||||||
#define EVERGREEN_DC_LUT_WRITE_EN_MASK 0x69f8
|
#define EVERGREEN_DC_LUT_WRITE_EN_MASK 0x69f8
|
||||||
#define EVERGREEN_DC_LUT_AUTOFILL 0x69fc
|
#define EVERGREEN_DC_LUT_AUTOFILL 0x69fc
|
||||||
#define EVERGREEN_DC_LUT_CONTROL 0x6a00
|
#define EVERGREEN_DC_LUT_CONTROL 0x6a00
|
||||||
#define EVERGREEN_DC_LUT_BLACK_OFFSET_BLUE 0x6a04
|
#define EVERGREEN_DC_LUT_BLACK_OFFSET_BLUE 0x6a04
|
||||||
#define EVERGREEN_DC_LUT_BLACK_OFFSET_GREEN 0x6a08
|
#define EVERGREEN_DC_LUT_BLACK_OFFSET_GREEN 0x6a08
|
||||||
#define EVERGREEN_DC_LUT_BLACK_OFFSET_RED 0x6a0c
|
#define EVERGREEN_DC_LUT_BLACK_OFFSET_RED 0x6a0c
|
||||||
#define EVERGREEN_DC_LUT_WHITE_OFFSET_BLUE 0x6a10
|
#define EVERGREEN_DC_LUT_WHITE_OFFSET_BLUE 0x6a10
|
||||||
#define EVERGREEN_DC_LUT_WHITE_OFFSET_GREEN 0x6a14
|
#define EVERGREEN_DC_LUT_WHITE_OFFSET_GREEN 0x6a14
|
||||||
#define EVERGREEN_DC_LUT_WHITE_OFFSET_RED 0x6a18
|
#define EVERGREEN_DC_LUT_WHITE_OFFSET_RED 0x6a18
|
||||||
#define EVERGREEN_DATA_FORMAT 0x6b00
|
#define EVERGREEN_DATA_FORMAT 0x6b00
|
||||||
# define EVERGREEN_INTERLEAVE_EN (1 << 0)
|
#define EVERGREEN_INTERLEAVE_EN (1 << 0)
|
||||||
#define EVERGREEN_DESKTOP_HEIGHT 0x6b04
|
#define EVERGREEN_DESKTOP_HEIGHT 0x6b04
|
||||||
#define EVERGREEN_VLINE_START_END 0x6b08
|
#define EVERGREEN_VLINE_START_END 0x6b08
|
||||||
# define EVERGREEN_VLINE_START_SHIFT 0
|
#define EVERGREEN_VLINE_START_SHIFT 0
|
||||||
# define EVERGREEN_VLINE_END_SHIFT 16
|
#define EVERGREEN_VLINE_END_SHIFT 16
|
||||||
# define EVERGREEN_VLINE_INV (1 << 31)
|
#define EVERGREEN_VLINE_INV (1 << 31)
|
||||||
#define EVERGREEN_VLINE_STATUS 0x6bb8
|
#define EVERGREEN_VLINE_STATUS 0x6bb8
|
||||||
# define EVERGREEN_VLINE_STAT (1 << 12)
|
#define EVERGREEN_VLINE_STAT (1 << 12)
|
||||||
#define EVERGREEN_VIEWPORT_START 0x6d70
|
#define EVERGREEN_VIEWPORT_START 0x6d70
|
||||||
#define EVERGREEN_VIEWPORT_SIZE 0x6d74
|
#define EVERGREEN_VIEWPORT_SIZE 0x6d74
|
||||||
#define EVERGREEN_CRTC0_REGISTER_OFFSET (0x6df0 - 0x6df0)
|
#define EVERGREEN_CRTC_CONTROL 0x6e70
|
||||||
#define EVERGREEN_CRTC1_REGISTER_OFFSET (0x79f0 - 0x6df0)
|
#define EVERGREEN_CRTC_MASTER_EN (1 << 0)
|
||||||
#define EVERGREEN_CRTC2_REGISTER_OFFSET (0x105f0 - 0x6df0)
|
#define EVERGREEN_CRTC_UPDATE_LOCK 0x6ed4
|
||||||
#define EVERGREEN_CRTC3_REGISTER_OFFSET (0x111f0 - 0x6df0)
|
#define EVERGREEN_MASTER_UPDATE_MODE 0x6ef8
|
||||||
#define EVERGREEN_CRTC4_REGISTER_OFFSET (0x11df0 - 0x6df0)
|
#define EVERGREEN_DC_GPIO_HPD_MASK 0x64b0
|
||||||
#define EVERGREEN_CRTC5_REGISTER_OFFSET (0x129f0 - 0x6df0)
|
#define EVERGREEN_DC_GPIO_HPD_A 0x64b4
|
||||||
#define EVERGREEN_CRTC_CONTROL 0x6e70
|
#define EVERGREEN_DC_GPIO_HPD_EN 0x64b8
|
||||||
# define EVERGREEN_CRTC_MASTER_EN (1 << 0)
|
#define EVERGREEN_DC_GPIO_HPD_Y 0x64bc
|
||||||
#define EVERGREEN_CRTC_UPDATE_LOCK 0x6ed4
|
|
||||||
#define EVERGREEN_MASTER_UPDATE_MODE 0x6ef8
|
|
||||||
#define EVERGREEN_DC_GPIO_HPD_MASK 0x64b0
|
#endif /* __EVERGREEN_REG_H__ */
|
||||||
#define EVERGREEN_DC_GPIO_HPD_A 0x64b4
|
|
||||||
#define EVERGREEN_DC_GPIO_HPD_EN 0x64b8
|
|
||||||
#define EVERGREEN_DC_GPIO_HPD_Y 0x64bc
|
|
||||||
@@ -1,97 +0,0 @@
|
|||||||
/*
|
|
||||||
* Copyright 2010 Advanced Micro Devices, Inc.
|
|
||||||
*
|
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
||||||
* copy of this software and associated documentation files (the "Software"),
|
|
||||||
* to deal in the Software without restriction, including without limitation
|
|
||||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
||||||
* and/or sell copies of the Software, and to permit persons to whom the
|
|
||||||
* Software is furnished to do so, subject to the following conditions:
|
|
||||||
*
|
|
||||||
* The above copyright notice and this permission notice shall be included in
|
|
||||||
* all copies or substantial portions of the Software.
|
|
||||||
*
|
|
||||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
||||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
||||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
||||||
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
|
||||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
|
||||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
|
||||||
* OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
*
|
|
||||||
* Authors: Alex Deucher
|
|
||||||
*/
|
|
||||||
#ifndef R800D_REG_H
|
|
||||||
#define R800D_REG_H
|
|
||||||
|
|
||||||
#define EVERGREEN_MC_ARB_RAMCFG 0x2760
|
|
||||||
#define NOOFBANK_SHIFT 0
|
|
||||||
#define NOOFBANK_MASK 0x00000003
|
|
||||||
#define NOOFRANK_SHIFT 2
|
|
||||||
#define NOOFRANK_MASK 0x00000004
|
|
||||||
#define NOOFROWS_SHIFT 3
|
|
||||||
#define NOOFROWS_MASK 0x00000038
|
|
||||||
#define NOOFCOLS_SHIFT 6
|
|
||||||
#define NOOFCOLS_MASK 0x000000C0
|
|
||||||
#define CHANSIZE_SHIFT 8
|
|
||||||
#define CHANSIZE_MASK 0x00000100
|
|
||||||
#define BURSTLENGTH_SHIFT 9
|
|
||||||
#define BURSTLENGTH_MASK 0x00000200
|
|
||||||
#define CHANSIZE_OVERRIDE (1 << 11)
|
|
||||||
#define EVERGREEN_FUS_MC_ARB_RAMCFG 0x2768
|
|
||||||
#define EVERGREEN_MC_VM_AGP_TOP 0x2028
|
|
||||||
#define EVERGREEN_MC_VM_AGP_BOT 0x202C
|
|
||||||
#define EVERGREEN_MC_VM_AGP_BASE 0x2030
|
|
||||||
#define EVERGREEN_MC_VM_FB_LOCATION 0x2024
|
|
||||||
#define EVERGREEN_MC_FUS_VM_FB_OFFSET 0x2898
|
|
||||||
#define EVERGREEN_MC_VM_MB_L1_TLB0_CNTL 0x2234
|
|
||||||
#define EVERGREEN_MC_VM_MB_L1_TLB1_CNTL 0x2238
|
|
||||||
#define EVERGREEN_MC_VM_MB_L1_TLB2_CNTL 0x223C
|
|
||||||
#define EVERGREEN_MC_VM_MB_L1_TLB3_CNTL 0x2240
|
|
||||||
#define ENABLE_L1_TLB (1 << 0)
|
|
||||||
#define ENABLE_L1_FRAGMENT_PROCESSING (1 << 1)
|
|
||||||
#define SYSTEM_ACCESS_MODE_PA_ONLY (0 << 3)
|
|
||||||
#define SYSTEM_ACCESS_MODE_USE_SYS_MAP (1 << 3)
|
|
||||||
#define SYSTEM_ACCESS_MODE_IN_SYS (2 << 3)
|
|
||||||
#define SYSTEM_ACCESS_MODE_NOT_IN_SYS (3 << 3)
|
|
||||||
#define SYSTEM_APERTURE_UNMAPPED_ACCESS_PASS_THRU (0 << 5)
|
|
||||||
#define EFFECTIVE_L1_TLB_SIZE(x) ((x)<<15)
|
|
||||||
#define EFFECTIVE_L1_QUEUE_SIZE(x) ((x)<<18)
|
|
||||||
#define EVERGREEN_MC_VM_MD_L1_TLB0_CNTL 0x2654
|
|
||||||
#define EVERGREEN_MC_VM_MD_L1_TLB1_CNTL 0x2658
|
|
||||||
#define EVERGREEN_MC_VM_MD_L1_TLB2_CNTL 0x265C
|
|
||||||
|
|
||||||
#define EVERGREEN_FUS_MC_VM_MD_L1_TLB0_CNTL 0x265C
|
|
||||||
#define EVERGREEN_FUS_MC_VM_MD_L1_TLB1_CNTL 0x2660
|
|
||||||
#define EVERGREEN_FUS_MC_VM_MD_L1_TLB2_CNTL 0x2664
|
|
||||||
|
|
||||||
#define EVERGREEN_MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR 0x203C
|
|
||||||
#define EVERGREEN_MC_VM_SYSTEM_APERTURE_HIGH_ADDR 0x2038
|
|
||||||
#define EVERGREEN_MC_VM_SYSTEM_APERTURE_LOW_ADDR 0x2034
|
|
||||||
|
|
||||||
#define EVERGREEN_BIOS_0_SCRATCH 0x8500
|
|
||||||
#define EVERGREEN_BIOS_1_SCRATCH 0x8504
|
|
||||||
#define EVERGREEN_BIOS_2_SCRATCH 0x8508
|
|
||||||
#define EVERGREEN_BIOS_3_SCRATCH 0x850C
|
|
||||||
#define EVERGREEN_BIOS_4_SCRATCH 0x8510
|
|
||||||
#define EVERGREEN_BIOS_5_SCRATCH 0x8514
|
|
||||||
#define EVERGREEN_BIOS_6_SCRATCH 0x8518
|
|
||||||
#define EVERGREEN_BIOS_7_SCRATCH 0x851C
|
|
||||||
#define EVERGREEN_SCRATCH_UMSK 0x8540
|
|
||||||
#define EVERGREEN_SCRATCH_ADDR 0x8544
|
|
||||||
|
|
||||||
/* evergreen */
|
|
||||||
#define EVERGREEN_CG_THERMAL_CTRL 0x72c
|
|
||||||
#define EVERGREEN_TOFFSET_MASK 0x00003FE0
|
|
||||||
#define EVERGREEN_TOFFSET_SHIFT 5
|
|
||||||
#define EVERGREEN_CG_MULT_THERMAL_STATUS 0x740
|
|
||||||
#define EVERGREEN_ASIC_T(x) ((x) << 16)
|
|
||||||
#define EVERGREEN_ASIC_T_MASK 0x07FF0000
|
|
||||||
#define EVERGREEN_ASIC_T_SHIFT 16
|
|
||||||
#define EVERGREEN_CG_TS0_STATUS 0x760
|
|
||||||
#define EVERGREEN_TS0_ADC_DOUT_MASK 0x000003FF
|
|
||||||
#define EVERGREEN_TS0_ADC_DOUT_SHIFT 0
|
|
||||||
/* APU */
|
|
||||||
#define EVERGREEN_CG_THERMAL_STATUS 0x678
|
|
||||||
|
|
||||||
#endif
|
|
||||||
@@ -81,4 +81,5 @@ class Autolock {
|
|||||||
struct lock *fLock;
|
struct lock *fLock;
|
||||||
};
|
};
|
||||||
|
|
||||||
#endif /* LOCK_H */
|
|
||||||
|
#endif /* LOCK_H */
|
||||||
@@ -27,6 +27,7 @@
|
|||||||
*/
|
*/
|
||||||
#ifndef __R500_REG_H__
|
#ifndef __R500_REG_H__
|
||||||
#define __R500_REG_H__
|
#define __R500_REG_H__
|
||||||
|
|
||||||
|
|
||||||
/* pipe config regs */
|
/* pipe config regs */
|
||||||
#define R300_GA_POLY_MODE 0x4288
|
#define R300_GA_POLY_MODE 0x4288
|
||||||
|
|||||||
@@ -24,6 +24,7 @@
|
|||||||
* Authors: Dave Airlie
|
* Authors: Dave Airlie
|
||||||
* Alex Deucher
|
* Alex Deucher
|
||||||
* Jerome Glisse
|
* Jerome Glisse
|
||||||
|
* Alexander von Gluck <[email protected]>
|
||||||
*/
|
*/
|
||||||
#ifndef __R600_REG_H__
|
#ifndef __R600_REG_H__
|
||||||
#define __R600_REG_H__
|
#define __R600_REG_H__
|
||||||
@@ -46,6 +47,7 @@
|
|||||||
#define R600_PCIE_PORT_INDEX 0x0038
|
#define R600_PCIE_PORT_INDEX 0x0038
|
||||||
#define R600_PCIE_PORT_DATA 0x003c
|
#define R600_PCIE_PORT_DATA 0x003c
|
||||||
|
|
||||||
|
/* Memory Controler */
|
||||||
#define R600_MC_VM_FB_LOCATION 0x2180
|
#define R600_MC_VM_FB_LOCATION 0x2180
|
||||||
#define R600_MC_FB_BASE_MASK 0x0000FFFF
|
#define R600_MC_FB_BASE_MASK 0x0000FFFF
|
||||||
#define R600_MC_FB_BASE_SHIFT 0
|
#define R600_MC_FB_BASE_SHIFT 0
|
||||||
@@ -83,6 +85,7 @@
|
|||||||
#define R600_D1GRPH_SWAP_ENDIAN_32BIT (2 << 0)
|
#define R600_D1GRPH_SWAP_ENDIAN_32BIT (2 << 0)
|
||||||
#define R600_D1GRPH_SWAP_ENDIAN_64BIT (3 << 0)
|
#define R600_D1GRPH_SWAP_ENDIAN_64BIT (3 << 0)
|
||||||
|
|
||||||
|
/* Hot plug detection */
|
||||||
#define R600_HDP_HOST_PATH_CNTL 0x2C00
|
#define R600_HDP_HOST_PATH_CNTL 0x2C00
|
||||||
#define R600_HDP_NONSURFACE_BASE 0x2C04
|
#define R600_HDP_NONSURFACE_BASE 0x2C04
|
||||||
#define R600_HDP_NONSURFACE_INFO 0x2C08
|
#define R600_HDP_NONSURFACE_INFO 0x2C08
|
||||||
|
|||||||
@@ -23,9 +23,10 @@
|
|||||||
* Authors: Dave Airlie
|
* Authors: Dave Airlie
|
||||||
* Alex Deucher
|
* Alex Deucher
|
||||||
* Jerome Glisse
|
* Jerome Glisse
|
||||||
|
* Alexander von Gluck <[email protected]>
|
||||||
*/
|
*/
|
||||||
#ifndef R700_H
|
#ifndef __R700_REG_H__
|
||||||
#define R700_H
|
#define __R700_REG_H__
|
||||||
|
|
||||||
|
|
||||||
/* Scratch Registers */
|
/* Scratch Registers */
|
||||||
@@ -407,4 +408,4 @@
|
|||||||
#define R700_SELECTABLE_DEEMPHASIS (1 << 6)
|
#define R700_SELECTABLE_DEEMPHASIS (1 << 6)
|
||||||
|
|
||||||
|
|
||||||
#endif /* R700_H */
|
#endif /* __R700_REG_H__ */
|
||||||
@@ -19,7 +19,6 @@
|
|||||||
#include "r600_reg.h"
|
#include "r600_reg.h"
|
||||||
#include "r700_reg.h"
|
#include "r700_reg.h"
|
||||||
#include "evergreen_reg.h"
|
#include "evergreen_reg.h"
|
||||||
#include "evergreend.h"
|
|
||||||
#include "si_reg.h"
|
#include "si_reg.h"
|
||||||
|
|
||||||
#include <Accelerant.h>
|
#include <Accelerant.h>
|
||||||
|
|||||||
@@ -24,9 +24,7 @@
|
|||||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||||
* DEALINGS IN THE SOFTWARE.
|
* DEALINGS IN THE SOFTWARE.
|
||||||
*/
|
*
|
||||||
|
|
||||||
/*
|
|
||||||
* Authors:
|
* Authors:
|
||||||
* Kevin E. Martin <[email protected]>
|
* Kevin E. Martin <[email protected]>
|
||||||
* Rickard E. Faith <[email protected]>
|
* Rickard E. Faith <[email protected]>
|
||||||
@@ -48,8 +46,9 @@
|
|||||||
/* !!!! FIXME !!!! NOTE: THIS FILE HAS BEEN CONVERTED FROM r128_reg.h
|
/* !!!! FIXME !!!! NOTE: THIS FILE HAS BEEN CONVERTED FROM r128_reg.h
|
||||||
* AND CONTAINS REGISTERS AND REGISTER DEFINITIONS THAT ARE NOT CORRECT
|
* AND CONTAINS REGISTERS AND REGISTER DEFINITIONS THAT ARE NOT CORRECT
|
||||||
* ON THE RADEON. A FULL AUDIT OF THIS CODE IS NEEDED! */
|
* ON THE RADEON. A FULL AUDIT OF THIS CODE IS NEEDED! */
|
||||||
#ifndef _RADEON_REG_H_
|
#ifndef __RADEON_REG_H_
|
||||||
#define _RADEON_REG_H_
|
#define __RADEON_REG_H_
|
||||||
|
|
||||||
|
|
||||||
#define RADEON_MC_AGP_LOCATION 0x014c
|
#define RADEON_MC_AGP_LOCATION 0x014c
|
||||||
#define RADEON_MC_AGP_START_MASK 0x0000FFFF
|
#define RADEON_MC_AGP_START_MASK 0x0000FFFF
|
||||||
@@ -64,25 +63,8 @@
|
|||||||
#define RADEON_AGP_BASE_2 0x015c /* r200+ only */
|
#define RADEON_AGP_BASE_2 0x015c /* r200+ only */
|
||||||
#define RADEON_AGP_BASE 0x0170
|
#define RADEON_AGP_BASE 0x0170
|
||||||
|
|
||||||
#define ATI_DATATYPE_VQ 0
|
/* Registers for 2D/Video/Overlay */
|
||||||
#define ATI_DATATYPE_CI4 1
|
|
||||||
#define ATI_DATATYPE_CI8 2
|
|
||||||
#define ATI_DATATYPE_ARGB1555 3
|
|
||||||
#define ATI_DATATYPE_RGB565 4
|
|
||||||
#define ATI_DATATYPE_RGB888 5
|
|
||||||
#define ATI_DATATYPE_ARGB8888 6
|
|
||||||
#define ATI_DATATYPE_RGB332 7
|
|
||||||
#define ATI_DATATYPE_Y8 8
|
|
||||||
#define ATI_DATATYPE_RGB8 9
|
|
||||||
#define ATI_DATATYPE_CI16 10
|
|
||||||
#define ATI_DATATYPE_VYUY_422 11
|
|
||||||
#define ATI_DATATYPE_YVYU_422 12
|
|
||||||
#define ATI_DATATYPE_AYUV_444 14
|
|
||||||
#define ATI_DATATYPE_ARGB4444 15
|
|
||||||
|
|
||||||
/* Registers for 2D/Video/Overlay */
|
|
||||||
#define RADEON_ADAPTER_ID 0x0f2c /* PCI */
|
#define RADEON_ADAPTER_ID 0x0f2c /* PCI */
|
||||||
#define RADEON_AGP_BASE 0x0170
|
|
||||||
#define RADEON_AGP_CNTL 0x0174
|
#define RADEON_AGP_CNTL 0x0174
|
||||||
# define RADEON_AGP_APER_SIZE_256MB (0x00 << 0)
|
# define RADEON_AGP_APER_SIZE_256MB (0x00 << 0)
|
||||||
# define RADEON_AGP_APER_SIZE_128MB (0x20 << 0)
|
# define RADEON_AGP_APER_SIZE_128MB (0x20 << 0)
|
||||||
|
|||||||
@@ -20,9 +20,10 @@
|
|||||||
* OTHER DEALINGS IN THE SOFTWARE.
|
* OTHER DEALINGS IN THE SOFTWARE.
|
||||||
*
|
*
|
||||||
* Authors: Alex Deucher
|
* Authors: Alex Deucher
|
||||||
|
* Alexander von Gluck <[email protected]>
|
||||||
*/
|
*/
|
||||||
#ifndef SI_H
|
#ifndef __SI_REG_H__
|
||||||
#define SI_H
|
#define __SI_REG_H__
|
||||||
|
|
||||||
|
|
||||||
#define TAHITI_RB_BITMAP_WIDTH_PER_SH 2
|
#define TAHITI_RB_BITMAP_WIDTH_PER_SH 2
|
||||||
@@ -30,6 +31,7 @@
|
|||||||
#define TAHITI_GB_ADDR_CONFIG_GOLDEN 0x12011003
|
#define TAHITI_GB_ADDR_CONFIG_GOLDEN 0x12011003
|
||||||
#define VERDE_GB_ADDR_CONFIG_GOLDEN 0x12010002
|
#define VERDE_GB_ADDR_CONFIG_GOLDEN 0x12010002
|
||||||
|
|
||||||
|
/* Sensors */
|
||||||
#define SI_CG_MULT_THERMAL_STATUS 0x714
|
#define SI_CG_MULT_THERMAL_STATUS 0x714
|
||||||
#define SI_ASIC_MAX_TEMP(x) ((x) << 0)
|
#define SI_ASIC_MAX_TEMP(x) ((x) << 0)
|
||||||
#define SI_ASIC_MAX_TEMP_MASK 0x000001ff
|
#define SI_ASIC_MAX_TEMP_MASK 0x000001ff
|
||||||
|
|||||||
@@ -8,6 +8,8 @@
|
|||||||
#ifndef UTILITY_H
|
#ifndef UTILITY_H
|
||||||
#define UTILITY_H
|
#define UTILITY_H
|
||||||
|
|
||||||
|
|
||||||
#define ROUND_TO_PAGE_SIZE(x) (((x) + (B_PAGE_SIZE) - 1) & ~((B_PAGE_SIZE) - 1))
|
#define ROUND_TO_PAGE_SIZE(x) (((x) + (B_PAGE_SIZE) - 1) & ~((B_PAGE_SIZE) - 1))
|
||||||
|
|
||||||
|
|
||||||
#endif /* UTILITY_H */
|
#endif /* UTILITY_H */
|
||||||
|
|||||||
Reference in New Issue
Block a user