diff --git a/src/add-ons/kernel/cpu/x86/amd.cpp b/src/add-ons/kernel/cpu/x86/amd.cpp
index 5d95c01c9a..d3fd31aaad 100644
--- a/src/add-ons/kernel/cpu/x86/amd.cpp
+++ b/src/add-ons/kernel/cpu/x86/amd.cpp
@@ -10,7 +10,7 @@
 #include "amd.h"
 #include "generic_x86.h"
 
-#include <OS.h>
+#include <cpu.h>
 
 
 static void
@@ -23,16 +23,12 @@ amd_init_mtrrs(void)
 static status_t
 amd_init(void)
 {
-	system_info info;
-	if (get_system_info(&info) != B_OK)
-		return B_ERROR;
-
-	if ((info.cpu_type & B_CPU_x86_VENDOR_MASK) != B_CPU_AMD_x86)
+	if (gCPU[0].arch.vendor != VENDOR_AMD)
 		return B_ERROR;
 
 	// The K6-2 doesn't seem to support write-combining (before model 9),
 	// so we ignore anything before that one.
-	if (info.cpu_type <= B_CPU_AMD_K6_2)
+	if (gCPU[0].arch.family <= 5 || gCPU[0].arch.model < 9)
 		return B_ERROR;
 
 	generic_mtrr_compute_physical_mask();
diff --git a/src/add-ons/kernel/cpu/x86/intel.cpp b/src/add-ons/kernel/cpu/x86/intel.cpp
index a6935eb0ed..1bb9e72d53 100644
--- a/src/add-ons/kernel/cpu/x86/intel.cpp
+++ b/src/add-ons/kernel/cpu/x86/intel.cpp
@@ -10,7 +10,7 @@
 #include "intel.h"
 #include "generic_x86.h"
 
-#include <OS.h>
+#include <cpu.h>
 
 
 static void
@@ -23,11 +23,7 @@ intel_init_mtrrs(void)
 static status_t
 intel_init(void)
 {
-	system_info info;
-	if (get_system_info(&info) != B_OK)
-		return B_ERROR;
-
-	if ((info.cpu_type & B_CPU_x86_VENDOR_MASK) != B_CPU_INTEL_x86)
+	if (gCPU[0].arch.vendor != VENDOR_INTEL)
 		return B_ERROR;
 
 	generic_mtrr_compute_physical_mask();
diff --git a/src/add-ons/kernel/cpu/x86/via.cpp b/src/add-ons/kernel/cpu/x86/via.cpp
index 6a222ff24d..4924886156 100644
--- a/src/add-ons/kernel/cpu/x86/via.cpp
+++ b/src/add-ons/kernel/cpu/x86/via.cpp
@@ -10,7 +10,7 @@
 #include "via.h"
 #include "generic_x86.h"
 
-#include <OS.h>
+#include <cpu.h>
 
 
 static uint32
@@ -41,11 +41,7 @@ via_set_mtrrs(uint8 defaultType, const x86_mtrr_info* infos, uint32 count)
 static status_t
 via_init(void)
 {
-	system_info info;
-	if (get_system_info(&info) != B_OK)
-		return B_ERROR;
-
-	if ((info.cpu_type & B_CPU_x86_VENDOR_MASK) != B_CPU_VIA_IDT_x86)
+	if (gCPU[0].arch.vendor != VENDOR_CENTAUR)
 		return B_ERROR;
 
 	// current VIA CPUs have always 36 bit (or less?)