diff --git a/src/add-ons/kernel/bus_managers/pci/pci_info.cpp b/src/add-ons/kernel/bus_managers/pci/pci_info.cpp
index b1fe45b87b..4631e62514 100644
--- a/src/add-ons/kernel/bus_managers/pci/pci_info.cpp
+++ b/src/add-ons/kernel/bus_managers/pci/pci_info.cpp
@@ -1,3 +1,9 @@
+/* 
+** Copyright 2003, Marcus Overhagen. All rights reserved.
+** Distributed under the terms of the OpenBeOS License.
+*/
+
+
 #include <KernelExport.h>
 #include <PCI.h>
 #include <string.h>
@@ -8,8 +14,10 @@
 #define USE_PCI_HEADER 1
 
 #if USE_PCI_HEADER
-  #include "pcihdr.h"
+#	include "pcihdr.h"
 #endif
+
+
 void print_bridge_info(pci_info *info, bool verbose);
 void print_generic_info(pci_info *info, bool verbose);
 void print_info_basic(pci_info *info, bool verbose);
@@ -17,6 +25,7 @@ void get_vendor_info(uint16 vendorID, const char **venShort, const char **venFul
 void get_device_info(uint16 vendorID, uint16 deviceID, const char **devShort, const char **devFull);
 const char *get_class_info(uint8 class_base, uint8 class_sub, uint8 class_api);
 
+
 void
 print_bridge_info(pci_info *info, bool verbose)
 {
@@ -26,36 +35,38 @@ print_bridge_info(pci_info *info, bool verbose)
 			info->u.h1.io_base_upper16, info->u.h1.io_base, info->u.h1.io_limit_upper16, info->u.h1.io_limit);
 	dprintf("PCI:   memory_base %04x, memory_limit %04x\n",
 			info->u.h1.memory_base, info->u.h1.memory_limit);
-	dprintf("PCI:   prefetchable memory base %08x%04x, limit %08x%04x\n",
+	dprintf("PCI:   prefetchable memory base %08lx%04x, limit %08lx%04x\n",
 		info->u.h1.prefetchable_memory_base_upper32, info->u.h1.prefetchable_memory_base,
 		info->u.h1.prefetchable_memory_limit_upper32, info->u.h1.prefetchable_memory_limit);
 	dprintf("PCI:   bridge_control %04x, secondary_status %04x\n",
 			info->u.h1.bridge_control, info->u.h1.secondary_status);
 	dprintf("PCI:   interrupt_line %02x, interrupt_pin %02x\n",
 			info->u.h1.interrupt_line, info->u.h1.interrupt_pin);
-	dprintf("PCI:   ROM base host %08x, pci %08x, size ??\n",
+	dprintf("PCI:   ROM base host %08lx, pci %08lx, size ??\n",
 			info->u.h1.rom_base, info->u.h1.rom_base_pci);
 	for (int i = 0; i < 2; i++)
-		dprintf("PCI:   base reg %d: host %08x, pci %08x, size %08x, flags %02x\n",
+		dprintf("PCI:   base reg %d: host %08lx, pci %08lx, size %08lx, flags %02x\n",
 			i, info->u.h1.base_registers[i], info->u.h1.base_registers_pci[i],
 			info->u.h1.base_register_sizes[i], info->u.h1.base_register_flags[i]);
 }
 
+
 void
 print_generic_info(pci_info *info, bool verbose)
 {
-	dprintf("PCI:   ROM base host %08x, pci %08x, size %08x\n",
+	dprintf("PCI:   ROM base host %08lx, pci %08lx, size %08lx\n",
 			info->u.h0.rom_base, info->u.h0.rom_base_pci, info->u.h0.rom_size);
-	dprintf("PCI:   cardbus_CIS %08x, subsystem_id %04x, subsystem_vendor_id %04x\n",
+	dprintf("PCI:   cardbus_CIS %08lx, subsystem_id %04x, subsystem_vendor_id %04x\n",
 			info->u.h0.cardbus_cis, info->u.h0.subsystem_id, info->u.h0.subsystem_vendor_id);
 	dprintf("PCI:   interrupt_line %02x, interrupt_pin %02x, min_grant %02x, max_latency %02x\n",
 			info->u.h0.interrupt_line, info->u.h0.interrupt_pin, info->u.h0.min_grant, info->u.h0.max_latency);
 	for (int i = 0; i < 6; i++)
-		dprintf("PCI:   base reg %d: host %08x, pci %08x, size %08x, flags %02x\n",
+		dprintf("PCI:   base reg %d: host %08lx, pci %08lx, size %08lx, flags %02x\n",
 			i, info->u.h0.base_registers[i], info->u.h0.base_registers_pci[i],
 			info->u.h0.base_register_sizes[i], info->u.h0.base_register_flags[i]);
 }
 
+
 void
 print_info_basic(pci_info *info, bool verbose)
 {
@@ -63,6 +74,7 @@ print_info_basic(pci_info *info, bool verbose)
 			info->bus, info->device, info->function, info->vendor_id, info->device_id, info->revision);
 	dprintf("PCI:   class_base %02x, class_function %02x, class_api %02x\n",
 			info->class_base, info->class_sub, info->class_api);
+
 	if (verbose) {
 #if USE_PCI_HEADER
 		const char *venShort;
@@ -90,6 +102,7 @@ print_info_basic(pci_info *info, bool verbose)
 	}
 	dprintf("PCI:   line_size %02x, latency %02x, header_type %02x, BIST %02x\n",
 			info->line_size, info->latency, info->header_type, info->bist);
+
 	switch (info->header_type) {
 		case 0:
 			print_generic_info(info, verbose);
@@ -100,7 +113,8 @@ print_info_basic(pci_info *info, bool verbose)
 		default:
 			dprintf("PCI:   unknown header type\n");
 	}
-};
+}
+
 
 void
 pci_print_info()
@@ -111,6 +125,7 @@ pci_print_info()
 	}
 }
 
+
 const char *
 get_class_info(uint8 class_base, uint8 class_sub, uint8 class_api)
 {
@@ -516,6 +531,7 @@ get_class_info(uint8 class_base, uint8 class_sub, uint8 class_api)
 	}
 }
 
+
 #if USE_PCI_HEADER
 void
 get_vendor_info(uint16 vendorID, const char **venShort, const char **venFull)
@@ -536,6 +552,7 @@ get_vendor_info(uint16 vendorID, const char **venShort, const char **venFull)
 	*venFull = NULL;
 }
 
+
 void
 get_device_info(uint16 vendorID, uint16 deviceID, const char **devShort, const char **devFull)
 {
@@ -549,4 +566,4 @@ get_device_info(uint16 vendorID, uint16 deviceID, const char **devShort, const c
 	*devShort = NULL;
 	*devFull = NULL;
 }
-#endif
+#endif	/* USE_PCI_HEADER */