radeon_hd: Fix GPIOInfo pin shortage on some cards
* Some cards have a lot of pins! * Should fix #10536 * Add a check to give a friendy warning if we find more GPIO pins than what we are prepared for. * Technically the maximum GPIO pins could be ATOM device max * 2 (16 for i2c and other) however lets leave some room for expansion.
This commit is contained in:
@@ -43,7 +43,7 @@
|
|||||||
struct accelerant_info* gInfo;
|
struct accelerant_info* gInfo;
|
||||||
display_info* gDisplay[MAX_DISPLAY];
|
display_info* gDisplay[MAX_DISPLAY];
|
||||||
connector_info* gConnector[ATOM_MAX_SUPPORTED_DEVICE];
|
connector_info* gConnector[ATOM_MAX_SUPPORTED_DEVICE];
|
||||||
gpio_info* gGPIOInfo[ATOM_MAX_SUPPORTED_DEVICE];
|
gpio_info* gGPIOInfo[MAX_GPIO_PINS];
|
||||||
|
|
||||||
|
|
||||||
class AreaCloner {
|
class AreaCloner {
|
||||||
|
|||||||
@@ -24,7 +24,8 @@
|
|||||||
|
|
||||||
#define MAX_DISPLAY 2
|
#define MAX_DISPLAY 2
|
||||||
// Maximum displays (more then two requires AtomBIOS)
|
// Maximum displays (more then two requires AtomBIOS)
|
||||||
|
#define MAX_GPIO_PINS 64
|
||||||
|
// Maximum possible GPIO pins in gGPIOInfo
|
||||||
|
|
||||||
struct gpu_state {
|
struct gpu_state {
|
||||||
uint32 d1vgaControl;
|
uint32 d1vgaControl;
|
||||||
@@ -193,7 +194,7 @@ extern accelerant_info* gInfo;
|
|||||||
extern atom_context* gAtomContext;
|
extern atom_context* gAtomContext;
|
||||||
extern display_info* gDisplay[MAX_DISPLAY];
|
extern display_info* gDisplay[MAX_DISPLAY];
|
||||||
extern connector_info* gConnector[ATOM_MAX_SUPPORTED_DEVICE];
|
extern connector_info* gConnector[ATOM_MAX_SUPPORTED_DEVICE];
|
||||||
extern gpio_info* gGPIOInfo[ATOM_MAX_SUPPORTED_DEVICE];
|
extern gpio_info* gGPIOInfo[MAX_GPIO_PINS];
|
||||||
|
|
||||||
|
|
||||||
// register access
|
// register access
|
||||||
|
|||||||
@@ -249,7 +249,7 @@ static status_t
|
|||||||
connector_attach_gpio_i2c(uint32 connectorIndex, uint8 hwPin)
|
connector_attach_gpio_i2c(uint32 connectorIndex, uint8 hwPin)
|
||||||
{
|
{
|
||||||
gConnector[connectorIndex]->i2cPinIndex = 0;
|
gConnector[connectorIndex]->i2cPinIndex = 0;
|
||||||
for (uint32 i = 0; i < ATOM_MAX_SUPPORTED_DEVICE; i++) {
|
for (uint32 i = 0; i < MAX_GPIO_PINS; i++) {
|
||||||
if (gGPIOInfo[i]->hwPin != hwPin)
|
if (gGPIOInfo[i]->hwPin != hwPin)
|
||||||
continue;
|
continue;
|
||||||
gConnector[connectorIndex]->i2cPinIndex = i;
|
gConnector[connectorIndex]->i2cPinIndex = i;
|
||||||
@@ -268,7 +268,7 @@ connector_attach_gpio_hpd(uint32 connectorIndex, uint8 hwPin)
|
|||||||
{
|
{
|
||||||
gConnector[connectorIndex]->hpdPinIndex = 0;
|
gConnector[connectorIndex]->hpdPinIndex = 0;
|
||||||
|
|
||||||
for (uint32 i = 0; i < ATOM_MAX_SUPPORTED_DEVICE; i++) {
|
for (uint32 i = 0; i < MAX_GPIO_PINS; i++) {
|
||||||
if (gGPIOInfo[i]->hwPin != hwPin)
|
if (gGPIOInfo[i]->hwPin != hwPin)
|
||||||
continue;
|
continue;
|
||||||
gConnector[connectorIndex]->hpdPinIndex = i;
|
gConnector[connectorIndex]->hpdPinIndex = i;
|
||||||
@@ -302,11 +302,15 @@ gpio_general_populate()
|
|||||||
sizeof(ATOM_GPIO_PIN_ASSIGNMENT);
|
sizeof(ATOM_GPIO_PIN_ASSIGNMENT);
|
||||||
|
|
||||||
// Find the next available GPIO pin index
|
// Find the next available GPIO pin index
|
||||||
uint32 gpioIndex;
|
int32 gpioIndex = -1;
|
||||||
for(gpioIndex = 0; gpioIndex < ATOM_MAX_SUPPORTED_DEVICE; gpioIndex++) {
|
for(int32 pin = 0; pin < MAX_GPIO_PINS; pin++) {
|
||||||
if (!gGPIOInfo[gpioIndex]->valid)
|
if (!gGPIOInfo[pin]->valid) {
|
||||||
|
gpioIndex = pin;
|
||||||
break;
|
break;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
if (gpioIndex < 0)
|
||||||
|
ERROR("%s: ERROR: Out of space for additional GPIO pins!\n", __func__);
|
||||||
|
|
||||||
ATOM_GPIO_PIN_ASSIGNMENT* pin = gpioInfo->asGPIO_Pin;
|
ATOM_GPIO_PIN_ASSIGNMENT* pin = gpioInfo->asGPIO_Pin;
|
||||||
for (int i = 0; i < numIndices; i++) {
|
for (int i = 0; i < numIndices; i++) {
|
||||||
@@ -325,7 +329,7 @@ gpio_general_populate()
|
|||||||
pin = (ATOM_GPIO_PIN_ASSIGNMENT*)((uint8*)pin
|
pin = (ATOM_GPIO_PIN_ASSIGNMENT*)((uint8*)pin
|
||||||
+ sizeof(ATOM_GPIO_PIN_ASSIGNMENT));
|
+ sizeof(ATOM_GPIO_PIN_ASSIGNMENT));
|
||||||
|
|
||||||
TRACE("%s: general GPIO @ %" B_PRIu32 ", valid: %s, "
|
TRACE("%s: general GPIO @ %" B_PRId32 ", valid: %s, "
|
||||||
"hwPin: 0x%" B_PRIX32 "\n", __func__, gpioIndex,
|
"hwPin: 0x%" B_PRIX32 "\n", __func__, gpioIndex,
|
||||||
gGPIOInfo[gpioIndex]->valid ? "true" : "false",
|
gGPIOInfo[gpioIndex]->valid ? "true" : "false",
|
||||||
gGPIOInfo[gpioIndex]->hwPin);
|
gGPIOInfo[gpioIndex]->hwPin);
|
||||||
@@ -366,11 +370,15 @@ gpio_i2c_populate()
|
|||||||
}
|
}
|
||||||
|
|
||||||
// Find the next available GPIO pin index
|
// Find the next available GPIO pin index
|
||||||
uint32 gpioIndex;
|
int32 gpioIndex = -1;
|
||||||
for(gpioIndex = 0; gpioIndex < ATOM_MAX_SUPPORTED_DEVICE; gpioIndex++) {
|
for(int32 pin = 0; pin < MAX_GPIO_PINS; pin++) {
|
||||||
if (!gGPIOInfo[gpioIndex]->valid)
|
if (!gGPIOInfo[pin]->valid) {
|
||||||
|
gpioIndex = pin;
|
||||||
break;
|
break;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
if (gpioIndex < 0)
|
||||||
|
ERROR("%s: ERROR: Out of space for additional GPIO pins!\n", __func__);
|
||||||
|
|
||||||
for (uint32 i = 0; i < numIndices; i++) {
|
for (uint32 i = 0; i < numIndices; i++) {
|
||||||
if (gGPIOInfo[gpioIndex]->valid) {
|
if (gGPIOInfo[gpioIndex]->valid) {
|
||||||
|
|||||||
Reference in New Issue
Block a user