Sam Roberts
777cfcfb8b
* SCTLR register definitions made 64-bit * isb added after writing to SCTLR, to ensure we don't execute instructions requiring the MMU prior to the MMU being enabled * GICv2 has per-cpu registers for IRQs < 32, so enabling or disabling those IRQs needs to be done on all cores * MMU setup code in kernel and bootloader made per-cpu * Signiture of arch_smp_boot_other_cpus is now the same on all architectures, with an addr_t page table Change-Id: I13bef7ca4efc5504d643833664560a9a6a6a6964 Reviewed-on: https://review.haiku-os.org/c/haiku/+/10649 Reviewed-by: waddlesplash <[email protected]>
45 lines
1016 B
C
45 lines
1016 B
C
/*
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* Copyright 2013-2022 Haiku, Inc. All rights reserved.
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* Distributed under the terms of the MIT License.
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*/
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#ifndef KERNEL_BOOT_PLATFORM_EFI_ARCH_SMP_H
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#define KERNEL_BOOT_PLATFORM_EFI_ARCH_SMP_H
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#include <boot/menu.h>
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#if defined(__riscv)
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struct platform_cpu_info {
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uint32 id;
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uint32 phandle;
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uint32 plicContext;
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};
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extern uint32 gBootHart;
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void arch_smp_register_cpu(platform_cpu_info** cpu);
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platform_cpu_info* arch_smp_find_cpu(uint32 phandle);
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#elif defined(__ARM__)
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struct platform_cpu_info {
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uint32 id;
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};
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void arch_smp_register_cpu(platform_cpu_info** cpu);
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#elif defined(__aarch64__)
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struct platform_cpu_info {
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uint32 id;
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uint64 mpidr;
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};
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void arch_smp_register_cpu(platform_cpu_info** cpu);
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#endif
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int arch_smp_get_current_cpu(void);
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void arch_smp_init_other_cpus(void);
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void arch_smp_boot_other_cpus(addr_t pageTable, uint64 kernelEntry, addr_t virtKernelArgs);
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void arch_smp_add_safemode_menus(Menu *menu);
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void arch_smp_init(void);
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#endif /* KERNEL_BOOT_PLATFORM_EFI_ARCH_SMP_H */
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