git-svn-id: file:///srv/svn/repos/haiku/trunk/current@2999 a95241bf-73f2-0310-859d-f6bbb57e9c96
261 lines
9.9 KiB
C
261 lines
9.9 KiB
C
/*
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* BeOS Driver for Intel ICH AC'97 Link interface
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*
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* Copyright (c) 2002, 2003 Marcus Overhagen <[email protected]>
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*
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* All rights reserved.
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* - Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* - Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include <KernelExport.h>
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#include <config_manager.h>
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#include <PCI.h>
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#include <OS.h>
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#include <malloc.h>
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#include "debug.h"
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#include "config.h"
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#include "ich.h"
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device_config c;
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device_config *config = &c;
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status_t find_pci_pin_irq(uint8 pin, uint8 *irq);
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/*
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* search for the ICH AC97 controller, and initialize the global config
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* XXX multiple controllers not supported
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*/
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status_t probe_device(void)
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{
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pci_module_info *pcimodule;
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struct pci_info info;
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struct pci_info *pciinfo = &info;
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int index;
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status_t result;
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uint32 value;
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if (get_module(B_PCI_MODULE_NAME,(module_info **)&pcimodule) < 0) {
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PRINT(("ERROR: couldn't load pci module\n"));
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return B_ERROR;
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}
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config->name = NULL;
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config->nambar = 0;
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config->nabmbar = 0;
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config->mmbar = 0;
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config->mbbar = 0;
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config->irq = 0;
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config->sample_size = 2;
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config->swap_reg = false;
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config->type = 0;
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config->log_mmbar = 0;
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config->log_mbbar = 0;
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config->area_mmbar = -1;
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config->area_mbbar = -1;
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config->codecoffset = 0;
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for (index = 0; B_OK == pcimodule->get_nth_pci_info(index, pciinfo); index++) {
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LOG(("Checking PCI device, vendor 0x%04x, id 0x%04x, bus 0x%02x, dev 0x%02x, func 0x%02x, rev 0x%02x, api 0x%02x, sub 0x%02x, base 0x%02x\n",
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pciinfo->vendor_id, pciinfo->device_id, pciinfo->bus, pciinfo->device, pciinfo->function,
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pciinfo->revision, pciinfo->class_api, pciinfo->class_sub, pciinfo->class_base));
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if (pciinfo->vendor_id == 0x8086 && pciinfo->device_id == 0x7195) {
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config->name = "Intel 82443MX";
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} else if (pciinfo->vendor_id == 0x8086 && pciinfo->device_id == 0x2415) { /* verified */
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config->name = "Intel 82801AA (ICH)";
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} else if (pciinfo->vendor_id == 0x8086 && pciinfo->device_id == 0x2425) { /* verified */
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config->name = "Intel 82801AB (ICH0)";
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} else if (pciinfo->vendor_id == 0x8086 && pciinfo->device_id == 0x2445) { /* verified */
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config->name = "Intel 82801BA (ICH2), Intel 82801BAM (ICH2-M)";
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} else if (pciinfo->vendor_id == 0x8086 && pciinfo->device_id == 0x2485) { /* verified */
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config->name = "Intel 82801CA (ICH3-S), Intel 82801CAM (ICH3-M)";
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} else if (pciinfo->vendor_id == 0x8086 && pciinfo->device_id == 0x24C5) { /* verified */
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config->name = "Intel 82801DB (ICH4)";
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config->type = TYPE_ICH4;
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} else if (pciinfo->vendor_id == 0x1039 && pciinfo->device_id == 0x7012) { /* verified */
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config->name = "SiS SI7012";
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config->swap_reg = true;
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config->sample_size = 1;
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} else if (pciinfo->vendor_id == 0x10DE && pciinfo->device_id == 0x01B1) {
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config->name = "NVIDIA nForce (MCP)";
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} else if (pciinfo->vendor_id == 0x10DE && pciinfo->device_id == 0x006A) {
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config->name = "NVIDIA nForce 2 (MCP2)";
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} else if (pciinfo->vendor_id == 0x10DE && pciinfo->device_id == 0x00DA) {
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config->name = "NVIDIA nForce 3 (MCP3)";
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} else if (pciinfo->vendor_id == 0x1022 && pciinfo->device_id == 0x764d) {
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config->name = "AMD AMD8111";
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} else if (pciinfo->vendor_id == 0x1022 && pciinfo->device_id == 0x7445) {
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config->name = "AMD AMD768";
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} else {
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continue;
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}
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break;
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}
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if (config->name == NULL) {
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LOG(("probe_device() No compatible hardware found\n"));
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put_module(B_PCI_MODULE_NAME);
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return B_ERROR;
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}
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LOG(("found %s\n",config->name));
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LOG(("revision = %d\n",pciinfo->revision));
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#if DEBUG
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LOG(("bus = %#x, device = %#x, function = %#x\n", pciinfo->bus, pciinfo->device, pciinfo->function));
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value = pcimodule->read_pci_config(pciinfo->bus, pciinfo->device, pciinfo->function, 0x00, 2);
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LOG(("VID = %#04x\n",value));
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value = pcimodule->read_pci_config(pciinfo->bus, pciinfo->device, pciinfo->function, 0x02, 2);
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LOG(("DID = %#04x\n",value));
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value = pcimodule->read_pci_config(pciinfo->bus, pciinfo->device, pciinfo->function, 0x08, 1);
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LOG(("RID = %#02x\n",value));
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value = pcimodule->read_pci_config(pciinfo->bus, pciinfo->device, pciinfo->function, 0x04, 2);
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LOG(("PCICMD = %#04x\n",value));
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value = pcimodule->read_pci_config(pciinfo->bus, pciinfo->device, pciinfo->function, 0x06, 2);
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LOG(("PCISTS = %#04x\n",value));
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value = pcimodule->read_pci_config(pciinfo->bus, pciinfo->device, pciinfo->function, 0x10, 4);
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LOG(("NAMBAR = %#08x\n",value));
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value = pcimodule->read_pci_config(pciinfo->bus, pciinfo->device, pciinfo->function, 0x14, 4);
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LOG(("NABMBAR = %#08x\n",value));
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value = pcimodule->read_pci_config(pciinfo->bus, pciinfo->device, pciinfo->function, 0x18, 4);
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LOG(("MMBAR = %#08x\n",value));
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value = pcimodule->read_pci_config(pciinfo->bus, pciinfo->device, pciinfo->function, 0x1C, 4);
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LOG(("MBBAR = %#08x\n",value));
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value = pcimodule->read_pci_config(pciinfo->bus, pciinfo->device, pciinfo->function, 0x3c, 1);
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LOG(("INTR_LN = %#02x\n",value));
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value = pcimodule->read_pci_config(pciinfo->bus, pciinfo->device, pciinfo->function, 0x3d, 1);
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LOG(("INTR_PN = %#02x\n",value));
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#endif
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/*
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* for ICH4 enable memory mapped IO and busmaster access,
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* for old ICHs enable programmed IO and busmaster access
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*/
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value = pcimodule->read_pci_config(pciinfo->bus, pciinfo->device, pciinfo->function, PCI_PCICMD, 2);
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if (config->type & TYPE_ICH4)
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value |= PCI_PCICMD_MSE | PCI_PCICMD_BME;
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else
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value |= PCI_PCICMD_IOS | PCI_PCICMD_BME;
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pcimodule->write_pci_config(pciinfo->bus, pciinfo->device, pciinfo->function, PCI_PCICMD, 2, value);
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#if DEBUG
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value = pcimodule->read_pci_config(pciinfo->bus, pciinfo->device, pciinfo->function, PCI_PCICMD, 2);
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LOG(("PCICMD = %#04x\n",value));
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#endif
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config->irq = pcimodule->read_pci_config(pciinfo->bus, pciinfo->device, pciinfo->function, 0x3C, 1);
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if (config->irq == 0 || config->irq == 0xff) {
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// workaround: even if no irq is configured, we may be able to find the correct one
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uint8 pin;
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uint8 irq;
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pin = pcimodule->read_pci_config(pciinfo->bus, pciinfo->device, pciinfo->function, 0x3d, 1);
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LOG(("IRQ not assigned to pin %d\n",pin));
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LOG(("Searching for IRQ...\n"));
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if (B_OK == find_pci_pin_irq(pin, &irq)) {
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LOG(("Assigning IRQ %d to pin %d\n",irq,pin));
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config->irq = irq;
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} else {
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config->irq = 0; // always 0, not 0xff if no irq assigned
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}
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}
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if (config->type & TYPE_ICH4) {
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// memory mapped access
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config->mmbar = 0xfffffffe & pcimodule->read_pci_config(pciinfo->bus, pciinfo->device, pciinfo->function, 0x18, 4);
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config->mbbar = 0xfffffffe & pcimodule->read_pci_config(pciinfo->bus, pciinfo->device, pciinfo->function, 0x1C, 4);
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} else {
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// pio access
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config->nambar = 0xfffffffe & pcimodule->read_pci_config(pciinfo->bus, pciinfo->device, pciinfo->function, 0x10, 4);
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config->nabmbar = 0xfffffffe & pcimodule->read_pci_config(pciinfo->bus, pciinfo->device, pciinfo->function, 0x14, 4);
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}
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LOG(("irq = %d\n", config->irq));
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LOG(("nambar = %#08x\n", config->nambar));
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LOG(("nabmbar = %#08x\n", config->nabmbar));
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LOG(("mmbar = %#08x\n", config->mmbar));
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LOG(("mbbar = %#08x\n", config->mbbar));
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result = B_OK;
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if (config->irq == 0) {
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PRINT(("WARNING: no interrupt configured\n"));
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/*
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* we can continue without an interrupt, as another
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* workaround to handle this is also implemented
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*/
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}
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/* the ICH4 uses memory mapped IO */
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if ((config->type & TYPE_ICH4) != 0 && ((config->mmbar == 0) || (config->mbbar == 0))) {
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PRINT(("ERROR: memory mapped IO not configured\n"));
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result = B_ERROR;
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}
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/* all other ICHs use programmed IO */
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if ((config->type & TYPE_ICH4) == 0 && ((config->nambar == 0) || (config->nabmbar == 0))) {
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PRINT(("ERROR: IO space not configured\n"));
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result = B_ERROR;
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}
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put_module(B_PCI_MODULE_NAME);
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return result;
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}
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/*
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* This is another ugly workaround. If no irq has been assigned
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* to our card, we try to find another card that uses the same
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* interrupt pin, but has an irq assigned, and use it.
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*/
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status_t find_pci_pin_irq(uint8 pin, uint8 *irq)
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{
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pci_module_info *module;
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struct pci_info info;
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status_t result;
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long index;
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if (get_module(B_PCI_MODULE_NAME,(module_info **)&module) < 0) {
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PRINT(("ERROR: couldn't load pci module\n"));
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return B_ERROR;
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}
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result = B_ERROR;
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for (index = 0; B_OK == module->get_nth_pci_info(index, &info); index++) {
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uint8 pciirq = module->read_pci_config(info.bus, info.device, info.function, PCI_interrupt_line, 1);
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uint8 pcipin = module->read_pci_config(info.bus, info.device, info.function, PCI_interrupt_pin, 1);
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LOG(("pin %d, irq %d\n",pcipin,pciirq));
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if (pcipin == pin && pciirq != 0 && pciirq != 0xff) {
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*irq = pciirq;
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result = B_OK;
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break;
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}
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}
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#if DEBUG
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if (result != B_OK) {
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LOG(("Couldn't find IRQ for pin %d\n",pin));
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}
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#endif
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put_module(B_PCI_MODULE_NAME);
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return result;
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}
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