For now this is used on RISCV64 to indicate that interrupts will always be on CPU 0. However, in the future, some architectures may want or require interrupts to be "steered" in various ways, and this also paves the way for that. Change-Id: Iec79870cf5c4898d102d0e624de19602271ae772 Reviewed-on: https://review.haiku-os.org/c/haiku/+/4721 Reviewed-by: waddlesplash <[email protected]> Reviewed-by: Alex von Gluck IV <[email protected]> Tested-by: Commit checker robot <[email protected]>