Trung Nguyen
b244f10615
Check for AVX-512 support and enable on detected CPUs. Additionally, reserve more bytes in the kernel thread state for the typical case of AVX + AVX512 + PT when running under a VM. This additional state will not be copied to the userland structures until we can determine a more future-proof way of handling x86 extended state. The change also includes out the newly supported registers when entering userland. This is done by issuing a `XRSTOR` instruction based on the stored initial FPU state. This change should not have any visible effects on non-AVX-512 CPUs. It has been tested on an i7-1165g7 VM with .NET's AVX-512 test suite: https://github.com/dotnet/runtime/blob/c0d836dbe2315b310e7e099afcb50475dce1a521/src/tests/nativeaot/SmokeTests/HardwareIntrinsics/Program.cs#L398-L424 Change-Id: Iad5123e6d13dff39c0fd3957f7e8135202236460 Reviewed-on: https://review.haiku-os.org/c/haiku/+/10853 Reviewed-by: waddlesplash <[email protected]> Reviewed-by: Adrien Destugues <[email protected]> Tested-by: Commit checker robot <[email protected]>