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intel_extreme: Correct panel control register on non-pch

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This commit is contained in:
Alexander von Gluck IV
2015-12-15 07:23:21 -06:00
parent 471bc81038
commit 0ea662e5e9
2 changed files with 9 additions and 7 deletions
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headers/private/graphics/intel_extreme/intel_extreme.h
+2 -1
View File
@@ -448,12 +448,13 @@ struct intel_free_graphics_memory {
#define LVDS_POST2_RATE_SLOW 14 // PLL Divisors #define LVDS_POST2_RATE_SLOW 14 // PLL Divisors
#define LVDS_POST2_RATE_FAST 7 #define LVDS_POST2_RATE_FAST 7
#define LVDS_B0B3_POWER_MASK (3 << 2)
#define LVDS_B0B3_POWER_UP (3 << 2)
#define LVDS_CLKB_POWER_MASK (3 << 4) #define LVDS_CLKB_POWER_MASK (3 << 4)
#define LVDS_CLKB_POWER_UP (3 << 4) #define LVDS_CLKB_POWER_UP (3 << 4)
#define LVDS_A3_POWER_MASK (3 << 6) #define LVDS_A3_POWER_MASK (3 << 6)
#define LVDS_A3_POWER_UP (3 << 6) #define LVDS_A3_POWER_UP (3 << 6)
#define LVDS_A0A2_CLKA_POWER_UP (3 << 8) #define LVDS_A0A2_CLKA_POWER_UP (3 << 8)
#define LVDS_B0B3PAIRS_POWER_UP (3 << 2)
#define LVDS_BORDER_ENABLE (1 << 15) #define LVDS_BORDER_ENABLE (1 << 15)
#define LVDS_HSYNC_POLARITY (1 << 20) #define LVDS_HSYNC_POLARITY (1 << 20)
#define LVDS_VSYNC_POLARITY (1 << 21) #define LVDS_VSYNC_POLARITY (1 << 21)
src/add-ons/accelerants/intel_extreme/Ports.cpp
+7 -6
View File
@@ -327,10 +327,10 @@ LVDSPort::LVDSPort()
Port(INTEL_PORT_C, "LVDS") Port(INTEL_PORT_C, "LVDS")
{ {
// Always unlock LVDS port as soon as we start messing with it. // Always unlock LVDS port as soon as we start messing with it.
if (gInfo->shared_info->device_type.HasPlatformControlHub()) { uint32 panelControl = INTEL_PANEL_CONTROL;
write32(PCH_PANEL_CONTROL, if (gInfo->shared_info->device_type.HasPlatformControlHub())
read32(PCH_PANEL_CONTROL) | PANEL_REGISTER_UNLOCK); panelControl = PCH_PANEL_CONTROL;
} write32(panelControl, read32(panelControl) | PANEL_REGISTER_UNLOCK);
} }
@@ -525,9 +525,9 @@ LVDSPort::SetDisplayMode(display_mode* target, uint32 colorMode)
// Set the B0-B3 data pairs corresponding to whether we're going to // Set the B0-B3 data pairs corresponding to whether we're going to
// set the DPLLs for dual-channel mode or not. // set the DPLLs for dual-channel mode or not.
if (divisors.post2_high) if (divisors.post2_high)
lvds |= LVDS_B0B3PAIRS_POWER_UP | LVDS_CLKB_POWER_UP; lvds |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
else else
lvds &= ~(LVDS_B0B3PAIRS_POWER_UP | LVDS_CLKB_POWER_UP); lvds &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
// Set LVDS sync polarity // Set LVDS sync polarity
lvds &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY); lvds &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
@@ -538,6 +538,7 @@ LVDSPort::SetDisplayMode(display_mode* target, uint32 colorMode)
if ((target->timing.flags & B_POSITIVE_VSYNC) == 0) if ((target->timing.flags & B_POSITIVE_VSYNC) == 0)
lvds |= LVDS_VSYNC_POLARITY; lvds |= LVDS_VSYNC_POLARITY;
TRACE("%s: LVDS Control: 0x%" B_PRIx32 "\n", __func__, lvds);
write32(_PortRegister(), lvds); write32(_PortRegister(), lvds);
read32(_PortRegister()); read32(_PortRegister());