added noting actual set core and RAM speed in shared info for later use (if card is coldstarted)
git-svn-id: file:///srv/svn/repos/haiku/trunk/current@9453 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
@@ -80,7 +80,7 @@ status_t nv_general_powerup()
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{
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status_t status;
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LOG(1,("POWERUP: nVidia (open)BeOS Accelerant 0.28 running.\n"));
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LOG(1,("POWERUP: nVidia (open)BeOS Accelerant 0.29 running.\n"));
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/* preset no laptop */
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si->ps.laptop = false;
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@@ -39,7 +39,7 @@ static status_t exec_type1_script(uint8* rom, uint16 adress, int16* size, uint16
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static status_t exec_type2_script(uint8* rom, uint16 adress, int16* size, PinsTables tabs, uint16 ram_tab);
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static status_t exec_type2_script_mode(uint8* rom, uint16* adress, int16* size, PinsTables tabs, uint16 ram_tab, bool* exec);
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static void exec_cmd_39_type2(uint8* rom, uint32 data, PinsTables tabs, bool* exec);
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static void log_pll(uint32 reg);
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static void log_pll(uint32 reg, uint32 freq);
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static void setup_ram_config(uint8* rom, uint16 ram_tab);
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static void setup_ram_config_nv10_up(uint8* rom);
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static void setup_ram_config_nv28(uint8* rom);
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@@ -441,7 +441,7 @@ static status_t exec_type1_script(uint8* rom, uint16 adress, int16* size, uint16
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nv_dac_sys_pll_find(((float)data2), &calced_clk, &m, &n, &p, 0);
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NV_REG32(reg) = ((p << 16) | (n << 8) | m);
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}
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log_pll(reg);
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log_pll(reg, data2);
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break;
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case 0x5a:
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*size -= 7;
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@@ -744,7 +744,7 @@ static status_t exec_type1_script(uint8* rom, uint16 adress, int16* size, uint16
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nv_dac_sys_pll_find((data / 100.0), &calced_clk, &m, &n, &p, 0);
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NV_REG32(reg) = ((p << 16) | (n << 8) | m);
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}
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log_pll(reg);
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log_pll(reg, (data / 100));
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break;
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case 0x7a:
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*size -= 9;
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@@ -776,7 +776,7 @@ static status_t exec_type1_script(uint8* rom, uint16 adress, int16* size, uint16
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return result;
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}
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static void log_pll(uint32 reg)
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static void log_pll(uint32 reg, uint32 freq)
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{
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if ((si->ps.card_type == NV31) || (si->ps.card_type == NV36))
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LOG(8,("INFO: ---WARNING: check/update PLL programming script code!!!\n"));
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@@ -784,9 +784,13 @@ static void log_pll(uint32 reg)
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{
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case NV32_MEMPLL:
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LOG(8,("INFO: ---Memory PLL accessed.\n"));
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/* update the card's specs */
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si->ps.std_memory_clock = freq;
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break;
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case NV32_COREPLL:
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LOG(8,("INFO: ---Core PLL accessed.\n"));
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/* update the card's specs */
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si->ps.std_engine_clock = freq;
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break;
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case NVDAC_PIXPLLC:
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LOG(8,("INFO: ---DAC1 PLL accessed.\n"));
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@@ -1056,16 +1060,16 @@ static status_t exec_type2_script_mode(uint8* rom, uint16* adress, int16* size,
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uint8 m, n, p;
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nv_dac_sys_pll_find((data2 / 100.0), &calced_clk, &m, &n, &p, 0);
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/* programming the PLL needs to be done in steps! (confirmed NV28) */
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data2 = NV_REG32(reg2);
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NV_REG32(reg2) = ((data2 & 0xffff0000) | (n << 8) | m);
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data2 = NV_REG32(reg2);
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data = NV_REG32(reg2);
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NV_REG32(reg2) = ((data & 0xffff0000) | (n << 8) | m);
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data = NV_REG32(reg2);
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NV_REG32(reg2) = ((p << 16) | (n << 8) | m);
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//fixme?
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/* program 2nd set N and M scalers if they exist (b31=1 enables them) */
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// if ((si->ps.card_type == NV31) || (si->ps.card_type == NV36))
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// DACW(PIXPLLC2, 0x80000401);
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}
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log_pll(reg2);
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log_pll(reg2, (data2 / 100));
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*adress += size32;
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break;
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case 0x37: /* new */
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@@ -1579,16 +1583,16 @@ static status_t exec_type2_script_mode(uint8* rom, uint16* adress, int16* size,
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uint8 m, n, p;
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nv_dac_sys_pll_find((data / 100.0), &calced_clk, &m, &n, &p, 0);
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/* programming the PLL needs to be done in steps! (confirmed NV28) */
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data = NV_REG32(reg);
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NV_REG32(reg) = ((data & 0xffff0000) | (n << 8) | m);
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data = NV_REG32(reg);
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data2 = NV_REG32(reg);
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NV_REG32(reg) = ((data2 & 0xffff0000) | (n << 8) | m);
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data2 = NV_REG32(reg);
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NV_REG32(reg) = ((p << 16) | (n << 8) | m);
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//fixme?
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/* program 2nd set N and M scalers if they exist (b31=1 enables them) */
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// if ((si->ps.card_type == NV31) || (si->ps.card_type == NV36))
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// DACW(PIXPLLC2, 0x80000401);
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}
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log_pll(reg);
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log_pll(reg, (data / 100));
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break;
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case 0x7a: /* identical to type1 */
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*size -= 9;
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