ralinkwifi: Import USB modules.
Not entirely sure if these are working as they were not really tested. But they don't seem to cause KDLs at least, so the worst that happens is that the WiFi devices fail to work.
This commit is contained in:
Augustin Cavalier
@@ -1,7 +1,6 @@
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SubDir HAIKU_TOP src add-ons kernel drivers network wlan ralinkwifi ;
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UseHeaders [ FDirName $(HAIKU_TOP) src libs compat freebsd_network compat ]
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: true ;
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UseHeaders [ FDirName $(HAIKU_TOP) src libs compat freebsd_network compat ] : true ;
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UseHeaders [ FDirName $(HAIKU_TOP) src libs compat freebsd_wlan ] : true ;
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UsePrivateHeaders net system ;
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UsePrivateKernelHeaders ;
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@@ -14,14 +13,25 @@ SubDirCcFlags [ FDefines _KERNEL=1 FBSD_DRIVER=1 ]
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UseHeaders [ FDirName $(SUBDIR) ] : true ;
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SEARCH_SOURCE += [ FDirName $(SUBDIR) dev ral ] ;
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SEARCH_SOURCE += [ FDirName $(SUBDIR) dev usb wlan ] ;
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KernelAddon ralinkwifi :
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if_ral_pci.c
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rt2560.c
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rt2661.c
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rt2860.c
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if_ural.c
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if_run.c
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if_rum.c
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glue.c
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:
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freebsd_wlan.a
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libfreebsd_network.a
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;
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ObjectHdrs [ FGristFiles if_ural$(SUFOBJ) if_run$(SUFOBJ) if_rum$(SUFOBJ) ]
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: [ FDirName $(HAIKU_COMMON_PLATFORM_OBJECT_DIR) libs compat freebsd_network ] ;
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Includes [ FGristFiles if_ural.c if_run.c if_rum.c ]
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: <src!libs!compat!freebsd_network>usbdevs.h ;
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,213 @@
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/* $FreeBSD$ */
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/*-
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* Copyright (c) 2005-2006, Ralink Technology, Corp.
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* Paul Lin <[email protected]>
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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/*
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* This file contains the loadable 8051 microcode for the Ralink RT2573
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* chipset.
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*/
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static const uint8_t rt2573_ucode[] = {
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0x02, 0x13, 0x25, 0x12, 0x10, 0xd9, 0x02, 0x12, 0x58, 0x02, 0x13,
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||||
0x58, 0x02, 0x13, 0x5a, 0xc0, 0xd0, 0x75, 0xd0, 0x18, 0x12, 0x13,
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||||
0x5c, 0xd0, 0xd0, 0x22, 0x02, 0x14, 0x5c, 0x02, 0x14, 0xe7, 0xed,
|
||||
0x4c, 0x70, 0x44, 0x90, 0x01, 0xa8, 0x74, 0x80, 0xf0, 0xef, 0x30,
|
||||
0xe5, 0x07, 0xe4, 0x90, 0x00, 0x0f, 0xf0, 0x80, 0x2c, 0xe5, 0x40,
|
||||
0x24, 0xc0, 0x60, 0x13, 0x24, 0xc0, 0x60, 0x16, 0x24, 0xc0, 0x60,
|
||||
0x19, 0x24, 0xc0, 0x70, 0x1a, 0xe4, 0x90, 0x00, 0x0b, 0xf0, 0x80,
|
||||
0x13, 0xe4, 0x90, 0x00, 0x13, 0xf0, 0x80, 0x0c, 0xe4, 0x90, 0x00,
|
||||
0x1b, 0xf0, 0x80, 0x05, 0xe4, 0x90, 0x00, 0x23, 0xf0, 0xe4, 0x90,
|
||||
0x01, 0xa8, 0xf0, 0xd3, 0x22, 0x90, 0x02, 0x02, 0xed, 0xf0, 0x90,
|
||||
0x02, 0x01, 0xef, 0xf0, 0xd3, 0x22, 0xef, 0x24, 0xc0, 0x60, 0x1f,
|
||||
0x24, 0xc0, 0x60, 0x2e, 0x24, 0xc0, 0x60, 0x3d, 0x24, 0xc0, 0x70,
|
||||
0x53, 0x90, 0x00, 0x0b, 0xe0, 0x30, 0xe1, 0x02, 0xc3, 0x22, 0x90,
|
||||
0x00, 0x09, 0xe0, 0xfe, 0x90, 0x00, 0x08, 0x80, 0x37, 0x90, 0x00,
|
||||
0x13, 0xe0, 0x30, 0xe1, 0x02, 0xc3, 0x22, 0x90, 0x00, 0x11, 0xe0,
|
||||
0xfe, 0x90, 0x00, 0x10, 0x80, 0x24, 0x90, 0x00, 0x1b, 0xe0, 0x30,
|
||||
0xe1, 0x02, 0xc3, 0x22, 0x90, 0x00, 0x19, 0xe0, 0xfe, 0x90, 0x00,
|
||||
0x18, 0x80, 0x11, 0x90, 0x00, 0x23, 0xe0, 0x30, 0xe1, 0x02, 0xc3,
|
||||
0x22, 0x90, 0x00, 0x21, 0xe0, 0xfe, 0x90, 0x00, 0x20, 0xe0, 0xfd,
|
||||
0xee, 0xf5, 0x37, 0xed, 0xf5, 0x38, 0xd3, 0x22, 0x30, 0x09, 0x20,
|
||||
0x20, 0x04, 0x0b, 0x90, 0x02, 0x08, 0xe0, 0x54, 0x0f, 0x70, 0x03,
|
||||
0x02, 0x12, 0x57, 0xc2, 0x09, 0x90, 0x02, 0x00, 0xe0, 0x44, 0x04,
|
||||
0xf0, 0x74, 0x04, 0x12, 0x0c, 0x3a, 0xc2, 0x04, 0xc2, 0x07, 0x90,
|
||||
0x02, 0x01, 0xe0, 0x30, 0xe0, 0x03, 0x00, 0x80, 0xf6, 0x90, 0x03,
|
||||
0x26, 0xe0, 0x20, 0xe2, 0x03, 0x02, 0x12, 0x57, 0x90, 0x02, 0x08,
|
||||
0xe0, 0x70, 0x1b, 0x20, 0x07, 0x03, 0x02, 0x12, 0x57, 0x90, 0x03,
|
||||
0x12, 0xe0, 0x64, 0x22, 0x60, 0x03, 0x02, 0x12, 0x57, 0xd2, 0x09,
|
||||
0xc2, 0x07, 0x74, 0x02, 0x12, 0x0c, 0x3a, 0x22, 0x90, 0x02, 0x03,
|
||||
0xe0, 0x30, 0xe4, 0x47, 0x20, 0x06, 0x44, 0xe5, 0x3c, 0x60, 0x34,
|
||||
0xe5, 0x40, 0x24, 0xc0, 0x60, 0x14, 0x24, 0xc0, 0x60, 0x18, 0x24,
|
||||
0xc0, 0x60, 0x1c, 0x24, 0xc0, 0x70, 0x22, 0x90, 0x00, 0x0b, 0xe0,
|
||||
0x30, 0xe1, 0x1b, 0x22, 0x90, 0x00, 0x13, 0xe0, 0x30, 0xe1, 0x13,
|
||||
0x22, 0x90, 0x00, 0x1b, 0xe0, 0x30, 0xe1, 0x0b, 0x22, 0x90, 0x00,
|
||||
0x23, 0xe0, 0x30, 0xe1, 0x03, 0x02, 0x12, 0x57, 0x90, 0x02, 0x03,
|
||||
0x74, 0x01, 0xf0, 0x00, 0xe0, 0x54, 0xc0, 0xf5, 0x40, 0xe5, 0x40,
|
||||
0x24, 0xc0, 0x60, 0x20, 0x24, 0xc0, 0x60, 0x30, 0x24, 0xc0, 0x60,
|
||||
0x40, 0x24, 0xc0, 0x70, 0x56, 0x90, 0x00, 0x0b, 0xe0, 0x30, 0xe1,
|
||||
0x03, 0x02, 0x12, 0x57, 0x90, 0x00, 0x09, 0xe0, 0xfe, 0x90, 0x00,
|
||||
0x08, 0x80, 0x3a, 0x90, 0x00, 0x13, 0xe0, 0x30, 0xe1, 0x03, 0x02,
|
||||
0x12, 0x57, 0x90, 0x00, 0x11, 0xe0, 0xfe, 0x90, 0x00, 0x10, 0x80,
|
||||
0x26, 0x90, 0x00, 0x1b, 0xe0, 0x30, 0xe1, 0x03, 0x02, 0x12, 0x57,
|
||||
0x90, 0x00, 0x19, 0xe0, 0xfe, 0x90, 0x00, 0x18, 0x80, 0x12, 0x90,
|
||||
0x00, 0x23, 0xe0, 0x30, 0xe1, 0x03, 0x02, 0x12, 0x57, 0x90, 0x00,
|
||||
0x21, 0xe0, 0xfe, 0x90, 0x00, 0x20, 0xe0, 0xfd, 0xee, 0xf5, 0x37,
|
||||
0xed, 0xf5, 0x38, 0x90, 0x03, 0x27, 0x74, 0x82, 0xf0, 0x90, 0x02,
|
||||
0x01, 0xe5, 0x40, 0xf0, 0x90, 0x02, 0x06, 0xe0, 0xf5, 0x3c, 0xc3,
|
||||
0xe5, 0x38, 0x95, 0x3a, 0xe5, 0x37, 0x95, 0x39, 0x50, 0x21, 0xe5,
|
||||
0x40, 0x44, 0x05, 0xff, 0xe5, 0x37, 0xa2, 0xe7, 0x13, 0xfc, 0xe5,
|
||||
0x38, 0x13, 0xfd, 0x12, 0x10, 0x20, 0xe5, 0x3c, 0x30, 0xe2, 0x04,
|
||||
0xd2, 0x06, 0x80, 0x02, 0xc2, 0x06, 0x53, 0x3c, 0x01, 0x22, 0x30,
|
||||
0x0b, 0x07, 0xe4, 0x90, 0x02, 0x02, 0xf0, 0x80, 0x06, 0x90, 0x02,
|
||||
0x02, 0x74, 0x20, 0xf0, 0xe5, 0x40, 0x44, 0x01, 0x90, 0x02, 0x01,
|
||||
0xf0, 0x90, 0x02, 0x01, 0xe0, 0x30, 0xe0, 0x03, 0x00, 0x80, 0xf6,
|
||||
0x90, 0x03, 0x27, 0x74, 0x02, 0xf0, 0xaf, 0x40, 0x12, 0x10, 0x74,
|
||||
0x40, 0xa5, 0x00, 0x80, 0xf6, 0x22, 0x90, 0x7f, 0xf8, 0xe0, 0xb4,
|
||||
0x02, 0x03, 0x12, 0x16, 0x38, 0x90, 0x02, 0x01, 0xe0, 0x30, 0xe0,
|
||||
0x03, 0x00, 0x80, 0xf6, 0x90, 0x03, 0x26, 0xe0, 0x20, 0xe1, 0x07,
|
||||
0xe5, 0x3b, 0x70, 0x03, 0x02, 0x13, 0x24, 0xe5, 0x3b, 0x70, 0x15,
|
||||
0x90, 0x03, 0x24, 0xe0, 0x75, 0xf0, 0x40, 0xa4, 0xf5, 0x36, 0x85,
|
||||
0xf0, 0x35, 0x75, 0x24, 0x83, 0x75, 0x3b, 0x01, 0x80, 0x03, 0x75,
|
||||
0x24, 0x03, 0xd3, 0xe5, 0x36, 0x95, 0x3a, 0xe5, 0x35, 0x95, 0x39,
|
||||
0x40, 0x36, 0x90, 0x02, 0x01, 0xe0, 0x30, 0xe0, 0x03, 0x00, 0x80,
|
||||
0xf6, 0x90, 0x03, 0x27, 0xe5, 0x24, 0xf0, 0x90, 0x00, 0x0f, 0xe0,
|
||||
0x30, 0xe1, 0x04, 0x30, 0x0e, 0xf6, 0x22, 0x30, 0x0b, 0x07, 0xe4,
|
||||
0x90, 0x02, 0x02, 0xf0, 0x80, 0x06, 0x90, 0x02, 0x02, 0x74, 0x20,
|
||||
0xf0, 0x90, 0x02, 0x01, 0x74, 0x21, 0xf0, 0x75, 0x24, 0x03, 0x80,
|
||||
0x3d, 0xe5, 0x35, 0xa2, 0xe7, 0x13, 0xfe, 0xe5, 0x36, 0x13, 0xfd,
|
||||
0xac, 0x06, 0x90, 0x02, 0x01, 0xe0, 0x30, 0xe0, 0x03, 0x00, 0x80,
|
||||
0xf6, 0x90, 0x03, 0x27, 0xe5, 0x24, 0xf0, 0x90, 0x00, 0x0f, 0xe0,
|
||||
0x30, 0xe1, 0x04, 0x30, 0x0e, 0xf6, 0x22, 0x7f, 0x25, 0x12, 0x10,
|
||||
0x20, 0xe5, 0x36, 0xb5, 0x3a, 0x08, 0xe5, 0x35, 0xb5, 0x39, 0x03,
|
||||
0x00, 0x80, 0x04, 0xe4, 0xf5, 0x3b, 0x22, 0xc3, 0xe5, 0x36, 0x95,
|
||||
0x3a, 0xf5, 0x36, 0xe5, 0x35, 0x95, 0x39, 0xf5, 0x35, 0x02, 0x12,
|
||||
0x96, 0x22, 0x75, 0xa8, 0x0f, 0x90, 0x03, 0x06, 0x74, 0x01, 0xf0,
|
||||
0x90, 0x03, 0x07, 0xf0, 0x90, 0x03, 0x08, 0x04, 0xf0, 0x90, 0x03,
|
||||
0x09, 0x74, 0x6c, 0xf0, 0x90, 0x03, 0x0a, 0x74, 0xff, 0xf0, 0x90,
|
||||
0x03, 0x02, 0x74, 0x1f, 0xf0, 0x90, 0x03, 0x00, 0x74, 0x04, 0xf0,
|
||||
0x90, 0x03, 0x25, 0x74, 0x31, 0xf0, 0xd2, 0xaf, 0x22, 0x00, 0x22,
|
||||
0x00, 0x22, 0x90, 0x03, 0x05, 0xe0, 0x30, 0xe0, 0x0b, 0xe0, 0x44,
|
||||
0x01, 0xf0, 0x30, 0x09, 0x02, 0xd2, 0x04, 0xc2, 0x07, 0x22, 0x8d,
|
||||
0x24, 0xa9, 0x07, 0x90, 0x7f, 0xfc, 0xe0, 0x75, 0x25, 0x00, 0xf5,
|
||||
0x26, 0xa3, 0xe0, 0x75, 0x27, 0x00, 0xf5, 0x28, 0xa3, 0xe0, 0xff,
|
||||
0xa3, 0xe0, 0xfd, 0xe9, 0x30, 0xe5, 0x14, 0x54, 0xc0, 0x60, 0x05,
|
||||
0x43, 0x05, 0x03, 0x80, 0x03, 0x53, 0x05, 0xfc, 0xef, 0x54, 0x3f,
|
||||
0x44, 0x40, 0xff, 0x80, 0x06, 0x53, 0x07, 0x3f, 0x53, 0x05, 0xf0,
|
||||
0xe5, 0x24, 0x30, 0xe0, 0x05, 0x43, 0x05, 0x10, 0x80, 0x03, 0x53,
|
||||
0x05, 0xef, 0x90, 0x7f, 0xfc, 0xe5, 0x26, 0xf0, 0xa3, 0xe5, 0x28,
|
||||
0xf0, 0xa3, 0xef, 0xf0, 0xa3, 0xed, 0xf0, 0x22, 0x8f, 0x24, 0xa9,
|
||||
0x05, 0x90, 0x7f, 0xfc, 0xe0, 0x75, 0x25, 0x00, 0xf5, 0x26, 0xa3,
|
||||
0xe0, 0x75, 0x27, 0x00, 0xf5, 0x28, 0xa3, 0xe0, 0xff, 0xa3, 0xe0,
|
||||
0xfd, 0xe5, 0x24, 0x30, 0xe5, 0x0b, 0x43, 0x05, 0x0f, 0xef, 0x54,
|
||||
0x3f, 0x44, 0x40, 0xff, 0x80, 0x06, 0x53, 0x05, 0xf0, 0x53, 0x07,
|
||||
0x3f, 0xe9, 0x30, 0xe0, 0x05, 0x43, 0x05, 0x10, 0x80, 0x03, 0x53,
|
||||
0x05, 0xef, 0x90, 0x7f, 0xfc, 0xe5, 0x26, 0xf0, 0xa3, 0xe5, 0x28,
|
||||
0xf0, 0xa3, 0xef, 0xf0, 0xa3, 0xed, 0xf0, 0x22, 0x90, 0x7f, 0xfc,
|
||||
0xe0, 0xf9, 0xa3, 0xe0, 0xfe, 0xa3, 0xe0, 0xfc, 0xa3, 0xe0, 0xfb,
|
||||
0xef, 0x30, 0xe5, 0x0b, 0x43, 0x03, 0x0f, 0xec, 0x54, 0x3f, 0x44,
|
||||
0x40, 0xfc, 0x80, 0x06, 0x53, 0x03, 0xf0, 0x53, 0x04, 0x3f, 0xed,
|
||||
0x30, 0xe0, 0x07, 0xef, 0x54, 0xc0, 0x60, 0x07, 0x80, 0x0a, 0xef,
|
||||
0x54, 0xc0, 0x60, 0x05, 0x43, 0x03, 0x10, 0x80, 0x03, 0x53, 0x03,
|
||||
0xef, 0x90, 0x7f, 0xfc, 0xe9, 0xf0, 0xa3, 0xee, 0xf0, 0xa3, 0xec,
|
||||
0xf0, 0xa3, 0xeb, 0xf0, 0x22, 0xe5, 0x4b, 0xfd, 0x54, 0x1f, 0x90,
|
||||
0x7f, 0xf8, 0xf0, 0xe5, 0x4a, 0xf5, 0x09, 0x90, 0x30, 0x38, 0xe0,
|
||||
0x90, 0x7f, 0xfc, 0xf0, 0x90, 0x30, 0x39, 0xe0, 0x90, 0x7f, 0xfd,
|
||||
0xf0, 0x90, 0x30, 0x3a, 0xe0, 0x90, 0x7f, 0xfe, 0xf0, 0x90, 0x30,
|
||||
0x3b, 0xe0, 0x90, 0x7f, 0xff, 0xf0, 0xed, 0x30, 0xe5, 0x0c, 0x54,
|
||||
0xc0, 0x60, 0x0d, 0x90, 0x7f, 0xf0, 0xe5, 0x47, 0xf0, 0x80, 0x05,
|
||||
0xe4, 0x90, 0x7f, 0xf0, 0xf0, 0x90, 0x7f, 0xf8, 0xe0, 0x14, 0x60,
|
||||
0x08, 0x24, 0xfe, 0x60, 0x0d, 0x24, 0x03, 0x80, 0x12, 0xaf, 0x05,
|
||||
0xad, 0x09, 0x12, 0x13, 0xc5, 0x80, 0x10, 0xaf, 0x05, 0xad, 0x09,
|
||||
0x12, 0x14, 0x12, 0x80, 0x07, 0xaf, 0x05, 0xad, 0x09, 0x12, 0x13,
|
||||
0x6f, 0x90, 0x7f, 0xfc, 0xe0, 0x90, 0x30, 0x38, 0xf0, 0x90, 0x7f,
|
||||
0xfd, 0xe0, 0x90, 0x30, 0x39, 0xf0, 0x90, 0x7f, 0xfe, 0xe0, 0x90,
|
||||
0x30, 0x3a, 0xf0, 0x90, 0x7f, 0xff, 0xe0, 0x90, 0x30, 0x3b, 0xf0,
|
||||
0x22, 0xe5, 0x4b, 0x64, 0x01, 0x60, 0x03, 0x02, 0x15, 0x71, 0xf5,
|
||||
0x4b, 0xe5, 0x44, 0x45, 0x43, 0x70, 0x03, 0x02, 0x15, 0xa0, 0x12,
|
||||
0x0c, 0x14, 0x12, 0x0b, 0x86, 0x50, 0xfb, 0x90, 0x00, 0x00, 0xe0,
|
||||
0xf5, 0x25, 0x12, 0x15, 0xb4, 0xc2, 0x92, 0xe4, 0xf5, 0x24, 0xe5,
|
||||
0x24, 0xc3, 0x95, 0x25, 0x50, 0x49, 0x7e, 0x00, 0x7f, 0x4c, 0x74,
|
||||
0x40, 0x25, 0x24, 0xf5, 0x82, 0xe4, 0x34, 0x01, 0xad, 0x82, 0xfc,
|
||||
0x75, 0x2b, 0x02, 0x7b, 0x10, 0x12, 0x07, 0x1e, 0xc2, 0x93, 0x12,
|
||||
0x15, 0xa1, 0x7d, 0xa0, 0x12, 0x15, 0xd0, 0xe5, 0x24, 0x54, 0x0f,
|
||||
0x24, 0x4c, 0xf8, 0xe6, 0xfd, 0xaf, 0x4b, 0xae, 0x4a, 0x12, 0x15,
|
||||
0xd8, 0x05, 0x4b, 0xe5, 0x4b, 0x70, 0x02, 0x05, 0x4a, 0x12, 0x0a,
|
||||
0x5f, 0x05, 0x24, 0xe5, 0x24, 0x54, 0x0f, 0x70, 0xd5, 0xd2, 0x93,
|
||||
0x80, 0xb0, 0xc3, 0xe5, 0x44, 0x95, 0x25, 0xf5, 0x44, 0xe5, 0x43,
|
||||
0x94, 0x00, 0xf5, 0x43, 0x02, 0x14, 0xf2, 0x12, 0x15, 0xb4, 0xc2,
|
||||
0x93, 0xc2, 0x92, 0x12, 0x15, 0xa1, 0x7d, 0x80, 0x12, 0x15, 0xd0,
|
||||
0x7d, 0xaa, 0x74, 0x55, 0xff, 0xfe, 0x12, 0x15, 0xd8, 0x7d, 0x55,
|
||||
0x7f, 0xaa, 0x7e, 0x2a, 0x12, 0x15, 0xd8, 0x7d, 0x30, 0xaf, 0x4b,
|
||||
0xae, 0x4a, 0x12, 0x15, 0xd8, 0x12, 0x0a, 0x5f, 0xd2, 0x93, 0x22,
|
||||
0x7d, 0xaa, 0x74, 0x55, 0xff, 0xfe, 0x12, 0x15, 0xd8, 0x7d, 0x55,
|
||||
0x7f, 0xaa, 0x7e, 0x2a, 0x12, 0x15, 0xd8, 0x22, 0xad, 0x47, 0x7f,
|
||||
0x34, 0x7e, 0x30, 0x12, 0x15, 0xd8, 0x7d, 0xff, 0x7f, 0x35, 0x7e,
|
||||
0x30, 0x12, 0x15, 0xd8, 0xe4, 0xfd, 0x7f, 0x37, 0x7e, 0x30, 0x12,
|
||||
0x15, 0xd8, 0x22, 0x74, 0x55, 0xff, 0xfe, 0x12, 0x15, 0xd8, 0x22,
|
||||
0x8f, 0x82, 0x8e, 0x83, 0xed, 0xf0, 0x22, 0xe4, 0xfc, 0x90, 0x7f,
|
||||
0xf0, 0xe0, 0xaf, 0x09, 0x14, 0x60, 0x14, 0x14, 0x60, 0x15, 0x14,
|
||||
0x60, 0x16, 0x14, 0x60, 0x17, 0x14, 0x60, 0x18, 0x24, 0x05, 0x70,
|
||||
0x16, 0xe4, 0xfc, 0x80, 0x12, 0x7c, 0x01, 0x80, 0x0e, 0x7c, 0x03,
|
||||
0x80, 0x0a, 0x7c, 0x07, 0x80, 0x06, 0x7c, 0x0f, 0x80, 0x02, 0x7c,
|
||||
0x1f, 0xec, 0x6f, 0xf4, 0x54, 0x1f, 0xfc, 0x90, 0x30, 0x34, 0xe0,
|
||||
0x54, 0xe0, 0x4c, 0xfd, 0xa3, 0xe0, 0xfc, 0x43, 0x04, 0x1f, 0x7f,
|
||||
0x34, 0x7e, 0x30, 0x12, 0x15, 0xd8, 0xad, 0x04, 0x0f, 0x12, 0x15,
|
||||
0xd8, 0xe4, 0xfd, 0x7f, 0x37, 0x02, 0x15, 0xd8, 0x02, 0x15, 0xdf,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x07,
|
||||
0x29, 0xe9
|
||||
};
|
||||
@@ -0,0 +1,306 @@
|
||||
/* $FreeBSD$ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2005, 2006 Damien Bergamini <damien.bergamini@free.fr>
|
||||
* Copyright (c) 2006 Niall O'Higgins <niallo@openbsd.org>
|
||||
*
|
||||
* Permission to use, copy, modify, and distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#define RT2573_NOISE_FLOOR -95
|
||||
|
||||
#define RT2573_TX_DESC_SIZE (sizeof (struct rum_tx_desc))
|
||||
#define RT2573_RX_DESC_SIZE (sizeof (struct rum_rx_desc))
|
||||
|
||||
#define RT2573_CONFIG_NO 1
|
||||
#define RT2573_IFACE_INDEX 0
|
||||
|
||||
#define RT2573_MCU_CNTL 0x01
|
||||
#define RT2573_WRITE_MAC 0x02
|
||||
#define RT2573_READ_MAC 0x03
|
||||
#define RT2573_WRITE_MULTI_MAC 0x06
|
||||
#define RT2573_READ_MULTI_MAC 0x07
|
||||
#define RT2573_READ_EEPROM 0x09
|
||||
#define RT2573_WRITE_LED 0x0a
|
||||
|
||||
/*
|
||||
* WME registers.
|
||||
*/
|
||||
#define RT2573_AIFSN_CSR 0x0400
|
||||
#define RT2573_CWMIN_CSR 0x0404
|
||||
#define RT2573_CWMAX_CSR 0x0408
|
||||
#define RT2573_TXOP01_CSR 0x040C
|
||||
#define RT2573_TXOP23_CSR 0x0410
|
||||
#define RT2573_MCU_CODE_BASE 0x0800
|
||||
|
||||
/*
|
||||
* H/w encryption/decryption support
|
||||
*/
|
||||
#define KEY_SIZE (IEEE80211_KEYBUF_SIZE + IEEE80211_MICBUF_SIZE)
|
||||
#define RT2573_ADDR_MAX 64
|
||||
#define RT2573_SKEY_MAX 4
|
||||
|
||||
#define RT2573_SKEY(vap, kidx) (0x1000 + ((vap) * RT2573_SKEY_MAX + \
|
||||
(kidx)) * KEY_SIZE)
|
||||
#define RT2573_PKEY(id) (0x1200 + (id) * KEY_SIZE)
|
||||
|
||||
#define RT2573_ADDR_ENTRY(id) (0x1a00 + (id) * 8)
|
||||
|
||||
/*
|
||||
* Shared memory area
|
||||
*/
|
||||
#define RT2573_HW_BCN_BASE(id) (0x2400 + (id) * 0x100)
|
||||
|
||||
/*
|
||||
* Control and status registers.
|
||||
*/
|
||||
#define RT2573_MAC_CSR0 0x3000
|
||||
#define RT2573_MAC_CSR1 0x3004
|
||||
#define RT2573_MAC_CSR2 0x3008
|
||||
#define RT2573_MAC_CSR3 0x300c
|
||||
#define RT2573_MAC_CSR4 0x3010
|
||||
#define RT2573_MAC_CSR5 0x3014
|
||||
#define RT2573_MAC_CSR6 0x3018
|
||||
#define RT2573_MAC_CSR7 0x301c
|
||||
#define RT2573_MAC_CSR8 0x3020
|
||||
#define RT2573_MAC_CSR9 0x3024
|
||||
#define RT2573_MAC_CSR10 0x3028
|
||||
#define RT2573_MAC_CSR11 0x302c
|
||||
#define RT2573_MAC_CSR12 0x3030
|
||||
#define RT2573_MAC_CSR13 0x3034
|
||||
#define RT2573_MAC_CSR14 0x3038
|
||||
#define RT2573_MAC_CSR15 0x303c
|
||||
#define RT2573_TXRX_CSR0 0x3040
|
||||
#define RT2573_TXRX_CSR1 0x3044
|
||||
#define RT2573_TXRX_CSR2 0x3048
|
||||
#define RT2573_TXRX_CSR3 0x304c
|
||||
#define RT2573_TXRX_CSR4 0x3050
|
||||
#define RT2573_TXRX_CSR5 0x3054
|
||||
#define RT2573_TXRX_CSR6 0x3058
|
||||
#define RT2573_TXRX_CSR7 0x305c
|
||||
#define RT2573_TXRX_CSR8 0x3060
|
||||
#define RT2573_TXRX_CSR9 0x3064
|
||||
#define RT2573_TXRX_CSR10 0x3068
|
||||
#define RT2573_TXRX_CSR11 0x306c
|
||||
#define RT2573_TXRX_CSR12 0x3070
|
||||
#define RT2573_TXRX_CSR13 0x3074
|
||||
#define RT2573_TXRX_CSR14 0x3078
|
||||
#define RT2573_TXRX_CSR15 0x307c
|
||||
#define RT2573_PHY_CSR0 0x3080
|
||||
#define RT2573_PHY_CSR1 0x3084
|
||||
#define RT2573_PHY_CSR2 0x3088
|
||||
#define RT2573_PHY_CSR3 0x308c
|
||||
#define RT2573_PHY_CSR4 0x3090
|
||||
#define RT2573_PHY_CSR5 0x3094
|
||||
#define RT2573_PHY_CSR6 0x3098
|
||||
#define RT2573_PHY_CSR7 0x309c
|
||||
#define RT2573_SEC_CSR0 0x30a0
|
||||
#define RT2573_SEC_CSR1 0x30a4
|
||||
#define RT2573_SEC_CSR2 0x30a8
|
||||
#define RT2573_SEC_CSR3 0x30ac
|
||||
#define RT2573_SEC_CSR4 0x30b0
|
||||
#define RT2573_SEC_CSR5 0x30b4
|
||||
#define RT2573_STA_CSR0 0x30c0
|
||||
#define RT2573_STA_CSR1 0x30c4
|
||||
#define RT2573_STA_CSR2 0x30c8
|
||||
#define RT2573_STA_CSR3 0x30cc
|
||||
#define RT2573_STA_CSR4 0x30d0
|
||||
#define RT2573_STA_CSR5 0x30d4
|
||||
|
||||
/* possible values for register RT2573_ADDR_MODE */
|
||||
#define RT2573_MODE_MASK 0x7
|
||||
#define RT2573_MODE_NOSEC 0
|
||||
#define RT2573_MODE_WEP40 1
|
||||
#define RT2573_MODE_WEP104 2
|
||||
#define RT2573_MODE_TKIP 3
|
||||
#define RT2573_MODE_AES_CCMP 4
|
||||
#define RT2573_MODE_CKIP40 5
|
||||
#define RT2573_MODE_CKIP104 6
|
||||
|
||||
/* possible flags for register RT2573_MAC_CSR1 */
|
||||
#define RT2573_RESET_ASIC (1 << 0)
|
||||
#define RT2573_RESET_BBP (1 << 1)
|
||||
#define RT2573_HOST_READY (1 << 2)
|
||||
|
||||
/* possible flags for register MAC_CSR5 */
|
||||
#define RT2573_NUM_BSSID_MSK(n) (((n * 3) & 3) << 16)
|
||||
|
||||
/* possible flags for register MAC_CSR11 */
|
||||
#define RT2573_AUTO_WAKEUP (1 << 15)
|
||||
#define RT2573_TBCN_EXP(n) ((n) << 8)
|
||||
#define RT2573_TBCN_EXP_MAX 0x7f
|
||||
#define RT2573_TBCN_DELAY(t) (t)
|
||||
#define RT2573_TBCN_DELAY_MAX 0xff
|
||||
|
||||
/* possible flags for register TXRX_CSR0 */
|
||||
/* Tx filter flags are in the low 16 bits */
|
||||
#define RT2573_AUTO_TX_SEQ (1 << 15)
|
||||
/* Rx filter flags are in the high 16 bits */
|
||||
#define RT2573_DISABLE_RX (1 << 16)
|
||||
#define RT2573_DROP_CRC_ERROR (1 << 17)
|
||||
#define RT2573_DROP_PHY_ERROR (1 << 18)
|
||||
#define RT2573_DROP_CTL (1 << 19)
|
||||
#define RT2573_DROP_NOT_TO_ME (1 << 20)
|
||||
#define RT2573_DROP_TODS (1 << 21)
|
||||
#define RT2573_DROP_VER_ERROR (1 << 22)
|
||||
#define RT2573_DROP_MULTICAST (1 << 23)
|
||||
#define RT2573_DROP_BROADCAST (1 << 24)
|
||||
#define RT2573_DROP_ACKCTS (1 << 25)
|
||||
|
||||
/* possible flags for register TXRX_CSR4 */
|
||||
#define RT2573_ACKCTS_PWRMGT (1 << 16)
|
||||
#define RT2573_SHORT_PREAMBLE (1 << 18)
|
||||
#define RT2573_MRR_ENABLED (1 << 19)
|
||||
#define RT2573_MRR_CCK_FALLBACK (1 << 22)
|
||||
#define RT2573_LONG_RETRY(max) ((max) << 24)
|
||||
#define RT2573_LONG_RETRY_MASK (0xf << 24)
|
||||
#define RT2573_SHORT_RETRY(max) ((max) << 28)
|
||||
#define RT2573_SHORT_RETRY_MASK (0xf << 28)
|
||||
|
||||
/* possible flags for register TXRX_CSR9 */
|
||||
#define RT2573_TSF_TIMER_EN (1 << 16)
|
||||
#define RT2573_TSF_SYNC_MODE(x) (((x) & 0x3) << 17)
|
||||
#define RT2573_TSF_SYNC_MODE_DIS 0
|
||||
#define RT2573_TSF_SYNC_MODE_STA 1
|
||||
#define RT2573_TSF_SYNC_MODE_IBSS 2
|
||||
#define RT2573_TSF_SYNC_MODE_HOSTAP 3
|
||||
#define RT2573_TBTT_TIMER_EN (1 << 19)
|
||||
#define RT2573_BCN_TX_EN (1 << 20)
|
||||
|
||||
/* possible flags for register PHY_CSR0 */
|
||||
#define RT2573_PA_PE_2GHZ (1 << 16)
|
||||
#define RT2573_PA_PE_5GHZ (1 << 17)
|
||||
|
||||
/* possible flags for register PHY_CSR3 */
|
||||
#define RT2573_BBP_READ (1 << 15)
|
||||
#define RT2573_BBP_BUSY (1 << 16)
|
||||
/* possible flags for register PHY_CSR4 */
|
||||
#define RT2573_RF_20BIT (20 << 24)
|
||||
#define RT2573_RF_BUSY (1U << 31)
|
||||
|
||||
/* LED values */
|
||||
#define RT2573_LED_RADIO (1 << 8)
|
||||
#define RT2573_LED_G (1 << 9)
|
||||
#define RT2573_LED_A (1 << 10)
|
||||
#define RT2573_LED_ON 0x1e1e
|
||||
#define RT2573_LED_OFF 0x0
|
||||
|
||||
/* USB vendor requests */
|
||||
#define RT2573_MCU_SLEEP 7
|
||||
#define RT2573_MCU_RUN 8
|
||||
#define RT2573_MCU_WAKEUP 9
|
||||
|
||||
#define RT2573_SMART_MODE (1 << 0)
|
||||
|
||||
#define RT2573_BBPR94_DEFAULT 6
|
||||
|
||||
#define RT2573_BBP_WRITE (1 << 15)
|
||||
|
||||
/* dual-band RF */
|
||||
#define RT2573_RF_5226 1
|
||||
#define RT2573_RF_5225 3
|
||||
/* single-band RF */
|
||||
#define RT2573_RF_2528 2
|
||||
#define RT2573_RF_2527 4
|
||||
|
||||
#define RT2573_BBP_VERSION 0
|
||||
|
||||
struct rum_tx_desc {
|
||||
uint32_t flags;
|
||||
#define RT2573_TX_BURST (1 << 0)
|
||||
#define RT2573_TX_VALID (1 << 1)
|
||||
#define RT2573_TX_MORE_FRAG (1 << 2)
|
||||
#define RT2573_TX_NEED_ACK (1 << 3)
|
||||
#define RT2573_TX_TIMESTAMP (1 << 4)
|
||||
#define RT2573_TX_OFDM (1 << 5)
|
||||
#define RT2573_TX_IFS_SIFS (1 << 6)
|
||||
#define RT2573_TX_LONG_RETRY (1 << 7)
|
||||
#define RT2573_TX_TKIPMIC (1 << 8)
|
||||
#define RT2573_TX_KEY_PAIR (1 << 9)
|
||||
#define RT2573_TX_KEY_ID(id) (((id) & 0x3f) << 10)
|
||||
#define RT2573_TX_CIP_MODE(m) ((m) << 29)
|
||||
|
||||
uint16_t wme;
|
||||
#define RT2573_QID(v) (v)
|
||||
#define RT2573_AIFSN(v) ((v) << 4)
|
||||
#define RT2573_LOGCWMIN(v) ((v) << 8)
|
||||
#define RT2573_LOGCWMAX(v) ((v) << 12)
|
||||
|
||||
uint8_t hdrlen;
|
||||
uint8_t xflags;
|
||||
#define RT2573_TX_HWSEQ (1 << 4)
|
||||
|
||||
uint8_t plcp_signal;
|
||||
uint8_t plcp_service;
|
||||
#define RT2573_PLCP_LENGEXT 0x80
|
||||
|
||||
uint8_t plcp_length_lo;
|
||||
uint8_t plcp_length_hi;
|
||||
|
||||
uint32_t iv;
|
||||
uint32_t eiv;
|
||||
|
||||
uint8_t offset;
|
||||
uint8_t qid;
|
||||
uint8_t txpower;
|
||||
#define RT2573_DEFAULT_TXPOWER 0
|
||||
|
||||
uint8_t reserved;
|
||||
} __packed;
|
||||
|
||||
struct rum_rx_desc {
|
||||
uint32_t flags;
|
||||
#define RT2573_RX_BUSY (1 << 0)
|
||||
#define RT2573_RX_DROP (1 << 1)
|
||||
#define RT2573_RX_UC2ME (1 << 2)
|
||||
#define RT2573_RX_MC (1 << 3)
|
||||
#define RT2573_RX_BC (1 << 4)
|
||||
#define RT2573_RX_MYBSS (1 << 5)
|
||||
#define RT2573_RX_CRC_ERROR (1 << 6)
|
||||
#define RT2573_RX_OFDM (1 << 7)
|
||||
|
||||
#define RT2573_RX_DEC_MASK (3 << 8)
|
||||
#define RT2573_RX_DEC_OK (0 << 8)
|
||||
|
||||
#define RT2573_RX_IV_ERROR (1 << 8)
|
||||
#define RT2573_RX_MIC_ERROR (2 << 8)
|
||||
#define RT2573_RX_KEY_ERROR (3 << 8)
|
||||
|
||||
#define RT2573_RX_KEY_PAIR (1 << 28)
|
||||
|
||||
#define RT2573_RX_CIP_MASK (7 << 29)
|
||||
#define RT2573_RX_CIP_MODE(m) ((m) << 29)
|
||||
|
||||
uint8_t rate;
|
||||
uint8_t rssi;
|
||||
uint8_t reserved1;
|
||||
uint8_t offset;
|
||||
uint32_t iv;
|
||||
uint32_t eiv;
|
||||
uint32_t reserved2[2];
|
||||
} __packed;
|
||||
|
||||
#define RT2573_RF1 0
|
||||
#define RT2573_RF2 2
|
||||
#define RT2573_RF3 1
|
||||
#define RT2573_RF4 3
|
||||
|
||||
#define RT2573_EEPROM_MACBBP 0x0000
|
||||
#define RT2573_EEPROM_ADDRESS 0x0004
|
||||
#define RT2573_EEPROM_ANTENNA 0x0020
|
||||
#define RT2573_EEPROM_CONFIG2 0x0022
|
||||
#define RT2573_EEPROM_BBP_BASE 0x0026
|
||||
#define RT2573_EEPROM_TXPOWER 0x0046
|
||||
#define RT2573_EEPROM_FREQ_OFFSET 0x005e
|
||||
#define RT2573_EEPROM_RSSI_2GHZ_OFFSET 0x009a
|
||||
#define RT2573_EEPROM_RSSI_5GHZ_OFFSET 0x009c
|
||||
@@ -0,0 +1,186 @@
|
||||
/* $FreeBSD$ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2005, 2006 Damien Bergamini <damien.bergamini@free.fr>
|
||||
* Copyright (c) 2006 Niall O'Higgins <niallo@openbsd.org>
|
||||
*
|
||||
* Permission to use, copy, modify, and distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#define RUM_TX_LIST_COUNT 8
|
||||
#define RUM_TX_MINFREE 2
|
||||
|
||||
struct rum_rx_radiotap_header {
|
||||
struct ieee80211_radiotap_header wr_ihdr;
|
||||
uint64_t wr_tsf;
|
||||
uint8_t wr_flags;
|
||||
uint8_t wr_rate;
|
||||
uint16_t wr_chan_freq;
|
||||
uint16_t wr_chan_flags;
|
||||
int8_t wr_antsignal;
|
||||
int8_t wr_antnoise;
|
||||
uint8_t wr_antenna;
|
||||
} __packed __aligned(8);
|
||||
|
||||
#define RT2573_RX_RADIOTAP_PRESENT \
|
||||
((1 << IEEE80211_RADIOTAP_TSFT) | \
|
||||
(1 << IEEE80211_RADIOTAP_FLAGS) | \
|
||||
(1 << IEEE80211_RADIOTAP_RATE) | \
|
||||
(1 << IEEE80211_RADIOTAP_CHANNEL) | \
|
||||
(1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) | \
|
||||
(1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) | \
|
||||
(1 << IEEE80211_RADIOTAP_ANTENNA) | \
|
||||
0)
|
||||
|
||||
struct rum_tx_radiotap_header {
|
||||
struct ieee80211_radiotap_header wt_ihdr;
|
||||
uint8_t wt_flags;
|
||||
uint8_t wt_rate;
|
||||
uint16_t wt_chan_freq;
|
||||
uint16_t wt_chan_flags;
|
||||
uint8_t wt_antenna;
|
||||
} __packed;
|
||||
|
||||
#define RT2573_TX_RADIOTAP_PRESENT \
|
||||
((1 << IEEE80211_RADIOTAP_FLAGS) | \
|
||||
(1 << IEEE80211_RADIOTAP_RATE) | \
|
||||
(1 << IEEE80211_RADIOTAP_CHANNEL) | \
|
||||
(1 << IEEE80211_RADIOTAP_ANTENNA))
|
||||
|
||||
struct rum_softc;
|
||||
|
||||
struct rum_tx_data {
|
||||
STAILQ_ENTRY(rum_tx_data) next;
|
||||
struct rum_softc *sc;
|
||||
struct rum_tx_desc desc;
|
||||
struct mbuf *m;
|
||||
struct ieee80211_node *ni;
|
||||
int rate;
|
||||
};
|
||||
typedef STAILQ_HEAD(, rum_tx_data) rum_txdhead;
|
||||
|
||||
union sec_param {
|
||||
struct ieee80211_key key;
|
||||
uint8_t macaddr[IEEE80211_ADDR_LEN];
|
||||
struct ieee80211vap *vap;
|
||||
};
|
||||
#define CMD_FUNC_PROTO void (*func)(struct rum_softc *, \
|
||||
union sec_param *, uint8_t)
|
||||
|
||||
struct rum_cmdq {
|
||||
union sec_param data;
|
||||
uint8_t rvp_id;
|
||||
|
||||
CMD_FUNC_PROTO;
|
||||
};
|
||||
#define RUM_CMDQ_SIZE 16
|
||||
|
||||
struct rum_vap {
|
||||
struct ieee80211vap vap;
|
||||
struct mbuf *bcn_mbuf;
|
||||
struct usb_callout ratectl_ch;
|
||||
struct task ratectl_task;
|
||||
uint8_t maxretry;
|
||||
|
||||
int (*newstate)(struct ieee80211vap *,
|
||||
enum ieee80211_state, int);
|
||||
void (*bmiss)(struct ieee80211vap *);
|
||||
void (*recv_mgmt)(struct ieee80211_node *,
|
||||
struct mbuf *, int,
|
||||
const struct ieee80211_rx_stats *,
|
||||
int, int);
|
||||
};
|
||||
#define RUM_VAP(vap) ((struct rum_vap *)(vap))
|
||||
|
||||
enum {
|
||||
RUM_BULK_WR,
|
||||
RUM_BULK_RD,
|
||||
RUM_N_TRANSFER = 2,
|
||||
};
|
||||
|
||||
struct rum_softc {
|
||||
struct ieee80211com sc_ic;
|
||||
struct ieee80211_ratectl_tx_stats sc_txs;
|
||||
struct mbufq sc_snd;
|
||||
device_t sc_dev;
|
||||
struct usb_device *sc_udev;
|
||||
|
||||
struct usb_xfer *sc_xfer[RUM_N_TRANSFER];
|
||||
|
||||
uint8_t rf_rev;
|
||||
uint8_t rffreq;
|
||||
|
||||
struct rum_tx_data tx_data[RUM_TX_LIST_COUNT];
|
||||
rum_txdhead tx_q;
|
||||
rum_txdhead tx_free;
|
||||
int tx_nfree;
|
||||
struct rum_rx_desc sc_rx_desc;
|
||||
|
||||
struct mtx sc_mtx;
|
||||
|
||||
int sc_sleep_end;
|
||||
int sc_sleep_time;
|
||||
uint8_t last_rx_flags;
|
||||
|
||||
struct rum_cmdq cmdq[RUM_CMDQ_SIZE];
|
||||
struct mtx cmdq_mtx;
|
||||
struct task cmdq_task;
|
||||
uint8_t cmdq_first;
|
||||
uint8_t cmdq_last;
|
||||
|
||||
uint32_t sta[6];
|
||||
uint32_t rf_regs[4];
|
||||
uint8_t txpow[44];
|
||||
u_int sc_detached:1,
|
||||
sc_running:1,
|
||||
sc_sleeping:1,
|
||||
sc_clr_shkeys:1;
|
||||
|
||||
uint8_t sc_bssid[IEEE80211_ADDR_LEN];
|
||||
struct wmeParams wme_params[WME_NUM_AC];
|
||||
|
||||
uint8_t vap_key_count[1];
|
||||
uint64_t keys_bmap;
|
||||
|
||||
struct {
|
||||
uint8_t val;
|
||||
uint8_t reg;
|
||||
} __packed bbp_prom[16];
|
||||
|
||||
int hw_radio;
|
||||
int rx_ant;
|
||||
int tx_ant;
|
||||
int nb_ant;
|
||||
int ext_2ghz_lna;
|
||||
int ext_5ghz_lna;
|
||||
int rssi_2ghz_corr;
|
||||
int rssi_5ghz_corr;
|
||||
uint8_t bbp17;
|
||||
|
||||
struct rum_rx_radiotap_header sc_rxtap;
|
||||
struct rum_tx_radiotap_header sc_txtap;
|
||||
};
|
||||
|
||||
#define RUM_LOCK_INIT(sc) \
|
||||
mtx_init(&(sc)->sc_mtx, device_get_nameunit((sc)->sc_dev), \
|
||||
MTX_NETWORK_LOCK, MTX_DEF);
|
||||
#define RUM_LOCK(sc) mtx_lock(&(sc)->sc_mtx)
|
||||
#define RUM_UNLOCK(sc) mtx_unlock(&(sc)->sc_mtx)
|
||||
#define RUM_LOCK_ASSERT(sc) mtx_assert(&(sc)->sc_mtx, MA_OWNED)
|
||||
#define RUM_LOCK_DESTROY(sc) mtx_destroy(&(sc)->sc_mtx)
|
||||
|
||||
#define RUM_CMDQ_LOCK_INIT(sc) \
|
||||
mtx_init(&(sc)->cmdq_mtx, "cmdq lock", NULL, MTX_DEF)
|
||||
#define RUM_CMDQ_LOCK(sc) mtx_lock(&(sc)->cmdq_mtx)
|
||||
#define RUM_CMDQ_UNLOCK(sc) mtx_unlock(&(sc)->cmdq_mtx)
|
||||
#define RUM_CMDQ_LOCK_DESTROY(sc) mtx_destroy(&(sc)->cmdq_mtx)
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,268 @@
|
||||
/* $OpenBSD: if_runvar.h,v 1.3 2009/03/26 20:17:27 damien Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2008,2009 Damien Bergamini <damien.bergamini@free.fr>
|
||||
* ported to FreeBSD by Akinori Furukoshi <moonlightakkiy@yahoo.ca>
|
||||
* USB Consulting, Hans Petter Selasky <hselasky@freebsd.org>
|
||||
*
|
||||
* Permission to use, copy, modify, and distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
#ifndef _IF_RUNVAR_H_
|
||||
#define _IF_RUNVAR_H_
|
||||
|
||||
/* Support up to 4KB frames - useful for A-MSDU/FF. */
|
||||
#define RUN_MAX_RXSZ \
|
||||
MIN(4096, MJUMPAGESIZE)
|
||||
|
||||
/* Support up to 8KB frames - useful for A-MSDU/FF. */
|
||||
#define RUN_MAX_TXSZ \
|
||||
(sizeof (struct rt2870_txd) + \
|
||||
sizeof (struct rt2860_txwi) + \
|
||||
8192 + 11)
|
||||
|
||||
#define RUN_TX_TIMEOUT 5000 /* ms */
|
||||
|
||||
/* Tx ring count was 8/endpoint, now 32 for all 4 (or 6) endpoints. */
|
||||
#define RUN_TX_RING_COUNT 32
|
||||
#define RUN_RX_RING_COUNT 1
|
||||
|
||||
#define RT2870_WCID_MAX 64
|
||||
#define RUN_AID2WCID(aid) ((aid) & 0xff)
|
||||
|
||||
#define RUN_VAP_MAX 8
|
||||
|
||||
struct run_rx_radiotap_header {
|
||||
struct ieee80211_radiotap_header wr_ihdr;
|
||||
uint64_t wr_tsf;
|
||||
uint8_t wr_flags;
|
||||
uint8_t wr_rate;
|
||||
uint16_t wr_chan_freq;
|
||||
uint16_t wr_chan_flags;
|
||||
int8_t wr_dbm_antsignal;
|
||||
uint8_t wr_antenna;
|
||||
uint8_t wr_antsignal;
|
||||
} __packed __aligned(8);
|
||||
|
||||
#define RUN_RX_RADIOTAP_PRESENT \
|
||||
(1 << IEEE80211_RADIOTAP_TSFT | \
|
||||
1 << IEEE80211_RADIOTAP_FLAGS | \
|
||||
1 << IEEE80211_RADIOTAP_RATE | \
|
||||
1 << IEEE80211_RADIOTAP_CHANNEL | \
|
||||
1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL | \
|
||||
1 << IEEE80211_RADIOTAP_ANTENNA | \
|
||||
1 << IEEE80211_RADIOTAP_DB_ANTSIGNAL)
|
||||
|
||||
struct run_tx_radiotap_header {
|
||||
struct ieee80211_radiotap_header wt_ihdr;
|
||||
uint8_t wt_flags;
|
||||
uint8_t wt_rate;
|
||||
uint16_t wt_chan_freq;
|
||||
uint16_t wt_chan_flags;
|
||||
uint8_t wt_hwqueue;
|
||||
} __packed;
|
||||
|
||||
#define IEEE80211_RADIOTAP_HWQUEUE 15
|
||||
|
||||
#define RUN_TX_RADIOTAP_PRESENT \
|
||||
(1 << IEEE80211_RADIOTAP_FLAGS | \
|
||||
1 << IEEE80211_RADIOTAP_RATE | \
|
||||
1 << IEEE80211_RADIOTAP_CHANNEL | \
|
||||
1 << IEEE80211_RADIOTAP_HWQUEUE)
|
||||
|
||||
struct run_softc;
|
||||
|
||||
struct run_tx_data {
|
||||
STAILQ_ENTRY(run_tx_data) next;
|
||||
struct run_softc *sc;
|
||||
struct mbuf *m;
|
||||
struct ieee80211_node *ni;
|
||||
uint32_t align[0]; /* dummy field */
|
||||
uint8_t desc[sizeof(struct rt2870_txd) +
|
||||
sizeof(struct rt2860_txwi)];
|
||||
uint8_t ridx;
|
||||
};
|
||||
STAILQ_HEAD(run_tx_data_head, run_tx_data);
|
||||
|
||||
struct run_node {
|
||||
struct ieee80211_node ni;
|
||||
uint8_t amrr_ridx;
|
||||
uint8_t mgt_ridx;
|
||||
uint8_t fix_ridx;
|
||||
};
|
||||
#define RUN_NODE(ni) ((struct run_node *)(ni))
|
||||
|
||||
struct run_cmdq {
|
||||
void *arg0;
|
||||
void *arg1;
|
||||
void (*func)(void *);
|
||||
struct ieee80211_key *k;
|
||||
struct ieee80211_key key;
|
||||
uint8_t mac[IEEE80211_ADDR_LEN];
|
||||
uint8_t wcid;
|
||||
};
|
||||
|
||||
struct run_vap {
|
||||
struct ieee80211vap vap;
|
||||
struct mbuf *beacon_mbuf;
|
||||
|
||||
int (*newstate)(struct ieee80211vap *,
|
||||
enum ieee80211_state, int);
|
||||
void (*recv_mgmt)(struct ieee80211_node *,
|
||||
struct mbuf *, int,
|
||||
const struct ieee80211_rx_stats *,
|
||||
int, int);
|
||||
|
||||
uint8_t rvp_id;
|
||||
};
|
||||
#define RUN_VAP(vap) ((struct run_vap *)(vap))
|
||||
|
||||
/*
|
||||
* There are 7 bulk endpoints: 1 for RX
|
||||
* and 6 for TX (4 EDCAs + HCCA + Prio).
|
||||
* Update 03-14-2009: some devices like the Planex GW-US300MiniS
|
||||
* seem to have only 4 TX bulk endpoints (Fukaumi Naoki).
|
||||
*/
|
||||
enum {
|
||||
RUN_BULK_TX_BE, /* = WME_AC_BE */
|
||||
RUN_BULK_TX_BK, /* = WME_AC_BK */
|
||||
RUN_BULK_TX_VI, /* = WME_AC_VI */
|
||||
RUN_BULK_TX_VO, /* = WME_AC_VO */
|
||||
RUN_BULK_TX_HCCA,
|
||||
RUN_BULK_TX_PRIO,
|
||||
RUN_BULK_RX,
|
||||
RUN_N_XFER,
|
||||
};
|
||||
|
||||
#define RUN_EP_QUEUES RUN_BULK_RX
|
||||
|
||||
struct run_endpoint_queue {
|
||||
struct run_tx_data tx_data[RUN_TX_RING_COUNT];
|
||||
struct run_tx_data_head tx_qh;
|
||||
struct run_tx_data_head tx_fh;
|
||||
uint32_t tx_nfree;
|
||||
};
|
||||
|
||||
struct run_softc {
|
||||
struct mtx sc_mtx;
|
||||
struct ieee80211com sc_ic;
|
||||
struct ieee80211_ratectl_tx_stats sc_txs;
|
||||
struct mbufq sc_snd;
|
||||
device_t sc_dev;
|
||||
struct usb_device *sc_udev;
|
||||
int sc_need_fwload;
|
||||
|
||||
int sc_flags;
|
||||
#define RUN_FLAG_FWLOAD_NEEDED 0x01
|
||||
#define RUN_RUNNING 0x02
|
||||
|
||||
uint16_t wcid_stats[RT2870_WCID_MAX + 1][3];
|
||||
#define RUN_TXCNT 0
|
||||
#define RUN_SUCCESS 1
|
||||
#define RUN_RETRY 2
|
||||
|
||||
int (*sc_srom_read)(struct run_softc *,
|
||||
uint16_t, uint16_t *);
|
||||
|
||||
uint16_t mac_ver;
|
||||
uint16_t mac_rev;
|
||||
uint16_t rf_rev;
|
||||
uint8_t freq;
|
||||
uint8_t ntxchains;
|
||||
uint8_t nrxchains;
|
||||
|
||||
uint8_t bbp25;
|
||||
uint8_t bbp26;
|
||||
uint8_t rf24_20mhz;
|
||||
uint8_t rf24_40mhz;
|
||||
uint8_t patch_dac;
|
||||
uint8_t rfswitch;
|
||||
uint8_t ext_2ghz_lna;
|
||||
uint8_t ext_5ghz_lna;
|
||||
uint8_t calib_2ghz;
|
||||
uint8_t calib_5ghz;
|
||||
uint8_t txmixgain_2ghz;
|
||||
uint8_t txmixgain_5ghz;
|
||||
int8_t txpow1[54];
|
||||
int8_t txpow2[54];
|
||||
int8_t txpow3[54];
|
||||
int8_t rssi_2ghz[3];
|
||||
int8_t rssi_5ghz[3];
|
||||
uint8_t lna[4];
|
||||
|
||||
struct {
|
||||
uint8_t reg;
|
||||
uint8_t val;
|
||||
} bbp[10], rf[10];
|
||||
uint8_t leds;
|
||||
uint16_t led[3];
|
||||
uint32_t txpow20mhz[5];
|
||||
uint32_t txpow40mhz_2ghz[5];
|
||||
uint32_t txpow40mhz_5ghz[5];
|
||||
|
||||
struct run_endpoint_queue sc_epq[RUN_EP_QUEUES];
|
||||
|
||||
struct task ratectl_task;
|
||||
struct usb_callout ratectl_ch;
|
||||
uint8_t ratectl_run;
|
||||
#define RUN_RATECTL_OFF 0
|
||||
|
||||
/* need to be power of 2, otherwise RUN_CMDQ_GET fails */
|
||||
#define RUN_CMDQ_MAX 16
|
||||
#define RUN_CMDQ_MASQ (RUN_CMDQ_MAX - 1)
|
||||
struct run_cmdq cmdq[RUN_CMDQ_MAX];
|
||||
struct task cmdq_task;
|
||||
uint32_t cmdq_store;
|
||||
uint8_t cmdq_exec;
|
||||
uint8_t cmdq_run;
|
||||
uint8_t cmdq_key_set;
|
||||
#define RUN_CMDQ_ABORT 0
|
||||
#define RUN_CMDQ_GO 1
|
||||
|
||||
struct usb_xfer *sc_xfer[RUN_N_XFER];
|
||||
|
||||
struct mbuf *rx_m;
|
||||
|
||||
uint8_t fifo_cnt;
|
||||
|
||||
uint8_t running;
|
||||
uint8_t runbmap;
|
||||
uint8_t ap_running;
|
||||
uint8_t adhoc_running;
|
||||
uint8_t sta_running;
|
||||
uint8_t rvp_cnt;
|
||||
uint8_t rvp_bmap;
|
||||
uint8_t sc_detached;
|
||||
|
||||
uint8_t sc_bssid[IEEE80211_ADDR_LEN];
|
||||
|
||||
union {
|
||||
struct run_rx_radiotap_header th;
|
||||
uint8_t pad[64];
|
||||
} sc_rxtapu;
|
||||
#define sc_rxtap sc_rxtapu.th
|
||||
|
||||
union {
|
||||
struct run_tx_radiotap_header th;
|
||||
uint8_t pad[64];
|
||||
} sc_txtapu;
|
||||
#define sc_txtap sc_txtapu.th
|
||||
};
|
||||
|
||||
#define RUN_LOCK(sc) mtx_lock(&(sc)->sc_mtx)
|
||||
#define RUN_UNLOCK(sc) mtx_unlock(&(sc)->sc_mtx)
|
||||
#define RUN_LOCK_ASSERT(sc, t) mtx_assert(&(sc)->sc_mtx, t)
|
||||
|
||||
#endif /* _IF_RUNVAR_H_ */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,210 @@
|
||||
/* $FreeBSD$ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2005, 2006
|
||||
* Damien Bergamini <damien.bergamini@free.fr>
|
||||
*
|
||||
* Permission to use, copy, modify, and distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#define RAL_NOISE_FLOOR -95
|
||||
#define RAL_RSSI_CORR 120
|
||||
|
||||
#define RAL_RX_DESC_SIZE (sizeof (struct ural_rx_desc))
|
||||
#define RAL_TX_DESC_SIZE (sizeof (struct ural_tx_desc))
|
||||
#define RAL_FRAME_SIZE 0x780 /* NOTE: using 0x980 does not work */
|
||||
|
||||
#define RAL_CONFIG_NO 1
|
||||
#define RAL_IFACE_INDEX 0
|
||||
|
||||
#define RAL_VENDOR_REQUEST 0x01
|
||||
#define RAL_WRITE_MAC 0x02
|
||||
#define RAL_READ_MAC 0x03
|
||||
#define RAL_WRITE_MULTI_MAC 0x06
|
||||
#define RAL_READ_MULTI_MAC 0x07
|
||||
#define RAL_READ_EEPROM 0x09
|
||||
|
||||
/*
|
||||
* MAC registers.
|
||||
*/
|
||||
#define RAL_MAC_CSR0 0x0400 /* ASIC Version */
|
||||
#define RAL_MAC_CSR1 0x0402 /* System control */
|
||||
#define RAL_MAC_CSR2 0x0404 /* MAC addr0 */
|
||||
#define RAL_MAC_CSR3 0x0406 /* MAC addr1 */
|
||||
#define RAL_MAC_CSR4 0x0408 /* MAC addr2 */
|
||||
#define RAL_MAC_CSR5 0x040a /* BSSID0 */
|
||||
#define RAL_MAC_CSR6 0x040c /* BSSID1 */
|
||||
#define RAL_MAC_CSR7 0x040e /* BSSID2 */
|
||||
#define RAL_MAC_CSR8 0x0410 /* Max frame length */
|
||||
#define RAL_MAC_CSR9 0x0412 /* Timer control */
|
||||
#define RAL_MAC_CSR10 0x0414 /* Slot time */
|
||||
#define RAL_MAC_CSR11 0x0416 /* IFS */
|
||||
#define RAL_MAC_CSR12 0x0418 /* EIFS */
|
||||
#define RAL_MAC_CSR13 0x041a /* Power mode0 */
|
||||
#define RAL_MAC_CSR14 0x041c /* Power mode1 */
|
||||
#define RAL_MAC_CSR15 0x041e /* Power saving transition0 */
|
||||
#define RAL_MAC_CSR16 0x0420 /* Power saving transition1 */
|
||||
#define RAL_MAC_CSR17 0x0422 /* Power state control */
|
||||
#define RAL_MAC_CSR18 0x0424 /* Auto wake-up control */
|
||||
#define RAL_MAC_CSR19 0x0426 /* GPIO control */
|
||||
#define RAL_MAC_CSR20 0x0428 /* LED control0 */
|
||||
#define RAL_MAC_CSR22 0x042c /* XXX not documented */
|
||||
|
||||
/*
|
||||
* Tx/Rx Registers.
|
||||
*/
|
||||
#define RAL_TXRX_CSR0 0x0440 /* Security control */
|
||||
#define RAL_TXRX_CSR2 0x0444 /* Rx control */
|
||||
#define RAL_TXRX_CSR5 0x044a /* CCK Tx BBP ID0 */
|
||||
#define RAL_TXRX_CSR6 0x044c /* CCK Tx BBP ID1 */
|
||||
#define RAL_TXRX_CSR7 0x044e /* OFDM Tx BBP ID0 */
|
||||
#define RAL_TXRX_CSR8 0x0450 /* OFDM Tx BBP ID1 */
|
||||
#define RAL_TXRX_CSR10 0x0454 /* Auto responder control */
|
||||
#define RAL_TXRX_CSR11 0x0456 /* Auto responder basic rate */
|
||||
#define RAL_TXRX_CSR18 0x0464 /* Beacon interval */
|
||||
#define RAL_TXRX_CSR19 0x0466 /* Beacon/sync control */
|
||||
#define RAL_TXRX_CSR20 0x0468 /* Beacon alignment */
|
||||
#define RAL_TXRX_CSR21 0x046a /* XXX not documented */
|
||||
|
||||
/*
|
||||
* Security registers.
|
||||
*/
|
||||
#define RAL_SEC_CSR0 0x0480 /* Shared key 0, word 0 */
|
||||
|
||||
/*
|
||||
* PHY registers.
|
||||
*/
|
||||
#define RAL_PHY_CSR2 0x04c4 /* Tx MAC configuration */
|
||||
#define RAL_PHY_CSR4 0x04c8 /* Interface configuration */
|
||||
#define RAL_PHY_CSR5 0x04ca /* BBP Pre-Tx CCK */
|
||||
#define RAL_PHY_CSR6 0x04cc /* BBP Pre-Tx OFDM */
|
||||
#define RAL_PHY_CSR7 0x04ce /* BBP serial control */
|
||||
#define RAL_PHY_CSR8 0x04d0 /* BBP serial status */
|
||||
#define RAL_PHY_CSR9 0x04d2 /* RF serial control0 */
|
||||
#define RAL_PHY_CSR10 0x04d4 /* RF serial control1 */
|
||||
|
||||
/*
|
||||
* Statistics registers.
|
||||
*/
|
||||
#define RAL_STA_CSR0 0x04e0 /* FCS error */
|
||||
|
||||
#define RAL_DISABLE_RX (1 << 0)
|
||||
#define RAL_DROP_CRC (1 << 1)
|
||||
#define RAL_DROP_PHY (1 << 2)
|
||||
#define RAL_DROP_CTL (1 << 3)
|
||||
#define RAL_DROP_NOT_TO_ME (1 << 4)
|
||||
#define RAL_DROP_TODS (1 << 5)
|
||||
#define RAL_DROP_BAD_VERSION (1 << 6)
|
||||
#define RAL_DROP_MULTICAST (1 << 9)
|
||||
#define RAL_DROP_BROADCAST (1 << 10)
|
||||
|
||||
#define RAL_SHORT_PREAMBLE (1 << 2)
|
||||
|
||||
#define RAL_RESET_ASIC (1 << 0)
|
||||
#define RAL_RESET_BBP (1 << 1)
|
||||
#define RAL_HOST_READY (1 << 2)
|
||||
|
||||
#define RAL_ENABLE_TSF (1 << 0)
|
||||
#define RAL_ENABLE_TSF_SYNC(x) (((x) & 0x3) << 1)
|
||||
#define RAL_ENABLE_TBCN (1 << 3)
|
||||
#define RAL_ENABLE_BEACON_GENERATOR (1 << 4)
|
||||
|
||||
#define RAL_RF_AWAKE (3 << 7)
|
||||
#define RAL_BBP_AWAKE (3 << 5)
|
||||
|
||||
#define RAL_BBP_WRITE (1 << 15)
|
||||
#define RAL_BBP_BUSY (1 << 0)
|
||||
|
||||
#define RAL_RF1_AUTOTUNE 0x08000
|
||||
#define RAL_RF3_AUTOTUNE 0x00040
|
||||
|
||||
#define RAL_RF_2522 0x00
|
||||
#define RAL_RF_2523 0x01
|
||||
#define RAL_RF_2524 0x02
|
||||
#define RAL_RF_2525 0x03
|
||||
#define RAL_RF_2525E 0x04
|
||||
#define RAL_RF_2526 0x05
|
||||
/* dual-band RF */
|
||||
#define RAL_RF_5222 0x10
|
||||
|
||||
#define RAL_BBP_VERSION 0
|
||||
#define RAL_BBP_TX 2
|
||||
#define RAL_BBP_RX 14
|
||||
|
||||
#define RAL_BBP_ANTA 0x00
|
||||
#define RAL_BBP_DIVERSITY 0x01
|
||||
#define RAL_BBP_ANTB 0x02
|
||||
#define RAL_BBP_ANTMASK 0x03
|
||||
#define RAL_BBP_FLIPIQ 0x04
|
||||
|
||||
#define RAL_JAPAN_FILTER 0x08
|
||||
|
||||
struct ural_tx_desc {
|
||||
uint32_t flags;
|
||||
#define RAL_TX_RETRY(x) ((x) << 4)
|
||||
#define RAL_TX_MORE_FRAG (1 << 8)
|
||||
#define RAL_TX_ACK (1 << 9)
|
||||
#define RAL_TX_TIMESTAMP (1 << 10)
|
||||
#define RAL_TX_OFDM (1 << 11)
|
||||
#define RAL_TX_NEWSEQ (1 << 12)
|
||||
|
||||
#define RAL_TX_IFS_MASK 0x00006000
|
||||
#define RAL_TX_IFS_BACKOFF (0 << 13)
|
||||
#define RAL_TX_IFS_SIFS (1 << 13)
|
||||
#define RAL_TX_IFS_NEWBACKOFF (2 << 13)
|
||||
#define RAL_TX_IFS_NONE (3 << 13)
|
||||
|
||||
uint16_t wme;
|
||||
#define RAL_LOGCWMAX(x) (((x) & 0xf) << 12)
|
||||
#define RAL_LOGCWMIN(x) (((x) & 0xf) << 8)
|
||||
#define RAL_AIFSN(x) (((x) & 0x3) << 6)
|
||||
#define RAL_IVOFFSET(x) (((x) & 0x3f))
|
||||
|
||||
uint16_t reserved1;
|
||||
uint8_t plcp_signal;
|
||||
uint8_t plcp_service;
|
||||
#define RAL_PLCP_LENGEXT 0x80
|
||||
|
||||
uint8_t plcp_length_lo;
|
||||
uint8_t plcp_length_hi;
|
||||
uint32_t iv;
|
||||
uint32_t eiv;
|
||||
} __packed;
|
||||
|
||||
struct ural_rx_desc {
|
||||
uint32_t flags;
|
||||
#define RAL_RX_CRC_ERROR (1 << 5)
|
||||
#define RAL_RX_OFDM (1 << 6)
|
||||
#define RAL_RX_PHY_ERROR (1 << 7)
|
||||
|
||||
uint8_t rssi;
|
||||
uint8_t rate;
|
||||
uint16_t reserved;
|
||||
|
||||
uint32_t iv;
|
||||
uint32_t eiv;
|
||||
} __packed;
|
||||
|
||||
#define RAL_RF_LOBUSY (1 << 15)
|
||||
#define RAL_RF_BUSY (1U << 31)
|
||||
#define RAL_RF_20BIT (20 << 24)
|
||||
|
||||
#define RAL_RF1 0
|
||||
#define RAL_RF2 2
|
||||
#define RAL_RF3 1
|
||||
#define RAL_RF4 3
|
||||
|
||||
#define RAL_EEPROM_ADDRESS 0x0004
|
||||
#define RAL_EEPROM_TXPOWER 0x003c
|
||||
#define RAL_EEPROM_CONFIG0 0x0016
|
||||
#define RAL_EEPROM_BBP_BASE 0x001c
|
||||
@@ -0,0 +1,135 @@
|
||||
/* $FreeBSD$ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2005
|
||||
* Damien Bergamini <damien.bergamini@free.fr>
|
||||
*
|
||||
* Permission to use, copy, modify, and distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#define RAL_TX_LIST_COUNT 8
|
||||
#define RAL_TX_MINFREE 2
|
||||
|
||||
#define URAL_SCAN_START 1
|
||||
#define URAL_SCAN_END 2
|
||||
#define URAL_SET_CHANNEL 3
|
||||
|
||||
struct ural_rx_radiotap_header {
|
||||
struct ieee80211_radiotap_header wr_ihdr;
|
||||
uint8_t wr_flags;
|
||||
uint8_t wr_rate;
|
||||
uint16_t wr_chan_freq;
|
||||
uint16_t wr_chan_flags;
|
||||
int8_t wr_antsignal;
|
||||
int8_t wr_antnoise;
|
||||
uint8_t wr_antenna;
|
||||
} __packed __aligned(8);
|
||||
|
||||
#define RAL_RX_RADIOTAP_PRESENT \
|
||||
((1 << IEEE80211_RADIOTAP_FLAGS) | \
|
||||
(1 << IEEE80211_RADIOTAP_RATE) | \
|
||||
(1 << IEEE80211_RADIOTAP_CHANNEL) | \
|
||||
(1 << IEEE80211_RADIOTAP_ANTENNA) | \
|
||||
(1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) | \
|
||||
(1 << IEEE80211_RADIOTAP_DBM_ANTNOISE))
|
||||
|
||||
struct ural_tx_radiotap_header {
|
||||
struct ieee80211_radiotap_header wt_ihdr;
|
||||
uint8_t wt_flags;
|
||||
uint8_t wt_rate;
|
||||
uint16_t wt_chan_freq;
|
||||
uint16_t wt_chan_flags;
|
||||
uint8_t wt_antenna;
|
||||
} __packed;
|
||||
|
||||
#define RAL_TX_RADIOTAP_PRESENT \
|
||||
((1 << IEEE80211_RADIOTAP_FLAGS) | \
|
||||
(1 << IEEE80211_RADIOTAP_RATE) | \
|
||||
(1 << IEEE80211_RADIOTAP_CHANNEL) | \
|
||||
(1 << IEEE80211_RADIOTAP_ANTENNA))
|
||||
|
||||
struct ural_softc;
|
||||
|
||||
struct ural_tx_data {
|
||||
STAILQ_ENTRY(ural_tx_data) next;
|
||||
struct ural_softc *sc;
|
||||
struct ural_tx_desc desc;
|
||||
struct mbuf *m;
|
||||
struct ieee80211_node *ni;
|
||||
int rate;
|
||||
};
|
||||
typedef STAILQ_HEAD(, ural_tx_data) ural_txdhead;
|
||||
|
||||
struct ural_vap {
|
||||
struct ieee80211vap vap;
|
||||
|
||||
struct usb_callout ratectl_ch;
|
||||
struct task ratectl_task;
|
||||
|
||||
int (*newstate)(struct ieee80211vap *,
|
||||
enum ieee80211_state, int);
|
||||
};
|
||||
#define URAL_VAP(vap) ((struct ural_vap *)(vap))
|
||||
|
||||
enum {
|
||||
URAL_BULK_WR,
|
||||
URAL_BULK_RD,
|
||||
URAL_N_TRANSFER = 2,
|
||||
};
|
||||
|
||||
struct ural_softc {
|
||||
struct ieee80211com sc_ic;
|
||||
struct ieee80211_ratectl_tx_stats sc_txs;
|
||||
struct mbufq sc_snd;
|
||||
device_t sc_dev;
|
||||
struct usb_device *sc_udev;
|
||||
|
||||
uint32_t asic_rev;
|
||||
uint8_t rf_rev;
|
||||
|
||||
struct usb_xfer *sc_xfer[URAL_N_TRANSFER];
|
||||
|
||||
struct ural_tx_data tx_data[RAL_TX_LIST_COUNT];
|
||||
ural_txdhead tx_q;
|
||||
ural_txdhead tx_free;
|
||||
int tx_nfree;
|
||||
struct ural_rx_desc sc_rx_desc;
|
||||
|
||||
struct mtx sc_mtx;
|
||||
|
||||
uint16_t sta[11];
|
||||
uint32_t rf_regs[4];
|
||||
uint8_t txpow[14];
|
||||
u_int sc_detached:1,
|
||||
sc_running:1;
|
||||
|
||||
uint8_t sc_bssid[IEEE80211_ADDR_LEN];
|
||||
|
||||
struct {
|
||||
uint8_t val;
|
||||
uint8_t reg;
|
||||
} __packed bbp_prom[16];
|
||||
|
||||
int led_mode;
|
||||
int hw_radio;
|
||||
int rx_ant;
|
||||
int tx_ant;
|
||||
int nb_ant;
|
||||
|
||||
struct ural_rx_radiotap_header sc_rxtap;
|
||||
struct ural_tx_radiotap_header sc_txtap;
|
||||
};
|
||||
|
||||
#define RAL_LOCK(sc) mtx_lock(&(sc)->sc_mtx)
|
||||
#define RAL_UNLOCK(sc) mtx_unlock(&(sc)->sc_mtx)
|
||||
#define RAL_LOCK_ASSERT(sc, t) mtx_assert(&(sc)->sc_mtx, t)
|
||||
@@ -0,0 +1 @@
|
||||
#include <sys/epoch.h>
|
||||
@@ -25,19 +25,42 @@
|
||||
#include <dev/ral/rt2860var.h>
|
||||
|
||||
|
||||
HAIKU_FBSD_WLAN_DRIVER_GLUE(ralinkwifi, ral, pci)
|
||||
HAIKU_FBSD_WLAN_DRIVERS_GLUE(ralinkwifi)
|
||||
HAIKU_DRIVER_REQUIREMENTS(FBSD_WLAN);
|
||||
HAIKU_FIRMWARE_VERSION(0);
|
||||
HAIKU_FIRMWARE_NAME_MAP({
|
||||
{"rt2561fw", "rt2561.ucode"},
|
||||
{"rt2561sfw", "rt2561s.ucode"},
|
||||
{"rt2661fw", "rt2661.ucode"},
|
||||
{"rt2860fw", "rt2860.ucode"}
|
||||
{"rt2860fw", "rt2860.ucode"},
|
||||
{"runfw", "rt2870.ucode"},
|
||||
});
|
||||
|
||||
NO_HAIKU_FBSD_MII_DRIVER();
|
||||
NO_HAIKU_REENABLE_INTERRUPTS();
|
||||
|
||||
extern driver_t* DRIVER_MODULE_NAME(ral, pci);
|
||||
extern driver_t* DRIVER_MODULE_NAME(ural, uhub);
|
||||
extern driver_t* DRIVER_MODULE_NAME(run, uhub);
|
||||
extern driver_t* DRIVER_MODULE_NAME(rum, uhub);
|
||||
|
||||
|
||||
status_t
|
||||
__haiku_handle_fbsd_drivers_list(status_t (*handler)(driver_t *[], driver_t *[]))
|
||||
{
|
||||
driver_t *pci_drivers[] = {
|
||||
DRIVER_MODULE_NAME(ral, pci),
|
||||
NULL
|
||||
};
|
||||
driver_t *usb_drivers[] = {
|
||||
DRIVER_MODULE_NAME(ural, uhub),
|
||||
DRIVER_MODULE_NAME(run, uhub),
|
||||
DRIVER_MODULE_NAME(rum, uhub),
|
||||
NULL
|
||||
};
|
||||
return (*handler)(pci_drivers, usb_drivers);
|
||||
}
|
||||
|
||||
|
||||
#define RT2661_INT_MASK_CSR 0x346c
|
||||
#define RT2661_MCU_INT_MASK_CSR 0x0018
|
||||
|
||||
Reference in New Issue
Block a user