Whitespace cleanup only.
This commit is contained in:
Michael Lotz
@@ -19,75 +19,84 @@
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/* The following two macros are taken from FreeBSD... */
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.macro PUSHFRAMEINSVC
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stmdb sp, {r0-r3} /* Save 4 registers */
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mov r0, lr /* Save xxx32 r14 */
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mov r1, sp /* Save xxx32 sp */
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mrs r3, spsr /* Save xxx32 spsr */
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mrs r2, cpsr /* Get the CPSR */
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bic r2, r2, #(CPSR_MODE_MASK)/* Fix for SVC mode */
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orr r2, r2, #(CPSR_MODE_SVC)
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msr cpsr_c, r2 /* Punch into SVC mode */
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mov r2, sp /* Save SVC sp */
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str r0, [sp, #-4]! /* Push return address */
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str lr, [sp, #-4]! /* Push SVC lr */
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str r2, [sp, #-4]! /* Push SVC sp */
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msr spsr_all, r3 /* Restore correct spsr */
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ldmdb r1, {r0-r3} /* Restore 4 regs from xxx mode */
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sub sp, sp, #(4*15) /* Adjust the stack pointer */
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stmia sp, {r0-r12} /* Push the user mode registers */
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add r0, sp, #(4*13) /* Adjust the stack pointer */
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stmia r0, {r13-r14}^ /* Push the user mode registers */
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mov r0, r0 /* NOP for previous instruction */
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mrs r0, spsr_all
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str r0, [sp, #-4]! /* Save spsr */
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.endm
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.macro PUSHFRAMEINSVC
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stmdb sp, {r0-r3} /* Save 4 registers */
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mov r0, lr /* Save xxx32 r14 */
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mov r1, sp /* Save xxx32 sp */
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mrs r3, spsr /* Save xxx32 spsr */
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mrs r2, cpsr /* Get the CPSR */
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bic r2, r2, #(CPSR_MODE_MASK) /* Fix for SVC mode */
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orr r2, r2, #(CPSR_MODE_SVC)
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msr cpsr_c, r2 /* Punch into SVC mode */
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mov r2, sp /* Save SVC sp */
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str r0, [sp, #-4]! /* Push return address */
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str lr, [sp, #-4]! /* Push SVC lr */
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str r2, [sp, #-4]! /* Push SVC sp */
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msr spsr_all, r3 /* Restore correct spsr */
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ldmdb r1, {r0-r3} /* Restore 4 regs from xxx mode */
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sub sp, sp, #(4*15) /* Adjust the stack pointer */
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stmia sp, {r0-r12} /* Push the user mode registers */
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add r0, sp, #(4*13) /* Adjust the stack pointer */
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stmia r0, {r13-r14}^ /* Push the user mode registers */
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mov r0, r0 /* NOP for previous instruction */
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mrs r0, spsr_all
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str r0, [sp, #-4]! /* Save spsr */
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.endm
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.macro PULLFRAMEFROMSVCANDEXIT
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ldr r0, [sp], #0x0004 /* Get the SPSR from stack */
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msr spsr_all, r0 /* restore SPSR */
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ldmia sp, {r0-r14}^ /* Restore registers (usr mode) */
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mov r0, r0 /* NOP for previous instruction */
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add sp, sp, #(4*15) /* Adjust the stack pointer */
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ldmia sp, {sp, lr, pc}^ /* Restore lr and exit */
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.endm
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.macro PULLFRAMEFROMSVCANDEXIT
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ldr r0, [sp], #0x0004 /* Get the SPSR from stack */
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msr spsr_all, r0 /* restore SPSR */
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ldmia sp, {r0-r14}^ /* Restore registers (usr mode) */
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mov r0, r0 /* NOP for previous instruction */
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add sp, sp, #(4*15) /* Adjust the stack pointer */
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ldmia sp, {sp, lr, pc}^ /* Restore lr and exit */
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.endm
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.text
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.text
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.globl _vectors_start
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_vectors_start:
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ldr pc, _arm_reset
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ldr pc, _arm_undefined
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ldr pc, _arm_syscall
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ldr pc, _arm_prefetch_abort
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ldr pc, _arm_data_abort
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ldr pc, _arm_reserved
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ldr pc, _arm_irq
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ldr pc, _arm_fiq
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ldr pc, _arm_reset
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ldr pc, _arm_undefined
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ldr pc, _arm_syscall
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ldr pc, _arm_prefetch_abort
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ldr pc, _arm_data_abort
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ldr pc, _arm_reserved
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ldr pc, _arm_irq
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ldr pc, _arm_fiq
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_arm_reset:
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.word arm_reserved // actually reset, but not used when mapped
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_arm_undefined:
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.word arm_undefined
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.word arm_reserved // actually reset, but not used when mapped
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_arm_undefined:
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.word arm_undefined
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_arm_syscall:
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.word arm_syscall
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.word arm_syscall
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_arm_prefetch_abort:
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.word arm_prefetch_abort
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.word arm_prefetch_abort
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_arm_data_abort:
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.word arm_data_abort
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.word arm_data_abort
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_arm_reserved:
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.word arm_reserved
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_arm_irq:
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.word arm_irq
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_arm_fiq:
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.word arm_fiq
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.word arm_reserved
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_arm_irq:
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.word arm_irq
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_arm_fiq:
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.word arm_fiq
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.globl _vectors_end
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_vectors_end:
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.rept 64
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.word 0xdeadbeef
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.endr
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abort_stack:
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.word . - 4
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.word 0xdeadbeef
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@@ -95,6 +104,7 @@ abort_stack:
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.rept 64
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.word 0xcafebabe
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.endr
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irq_stack:
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.word . - 4
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.word 0xcafebabe
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@@ -102,6 +112,7 @@ irq_stack:
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.rept 64
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.word 0xaaaabbbb
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.endr
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fiq_stack:
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.word . - 4
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.word 0xaaaabbbb
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@@ -109,6 +120,7 @@ fiq_stack:
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.rept 64
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.word 0xccccdddd
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.endr
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und_stack:
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.word . - 4
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.word 0xccccdddd
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@@ -136,8 +148,8 @@ FUNCTION_END(arm_syscall)
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FUNCTION(arm_prefetch_abort):
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#ifdef __XSCALE__
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nop /* Make absolutely sure any pending */
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nop /* imprecise aborts have occurred. */
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nop /* Make absolutely sure any pending */
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nop /* imprecise aborts have occurred. */
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#endif
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add lr, lr, #4
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PUSHFRAMEINSVC
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@@ -151,8 +163,8 @@ FUNCTION_END(arm_prefetch_abort)
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FUNCTION(arm_data_abort):
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#ifdef __XSCALE__
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nop /* Make absolutely sure any pending */
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nop /* imprecise aborts have occurred. */
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nop /* Make absolutely sure any pending */
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nop /* imprecise aborts have occurred. */
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#endif
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sub lr, lr, #8 /* Adjust the lr */
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PUSHFRAMEINSVC
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@@ -167,11 +179,12 @@ FUNCTION(arm_reserved):
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b .
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FUNCTION_END(arm_reserved)
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FUNCTION(arm_irq):
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sub lr, lr, #4
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PUSHFRAMEINSVC
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mov r0, sp /* iframe */
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mov r0, sp /* iframe */
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bl arch_arm_irq
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PULLFRAMEFROMSVCANDEXIT
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@@ -182,7 +195,7 @@ FUNCTION(arm_fiq):
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sub lr, lr, #4
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PUSHFRAMEINSVC
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mov r0, sp /* iframe */
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mov r0, sp /* iframe */
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bl arch_arm_fiq
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PULLFRAMEFROMSVCANDEXIT
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