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Whitespace cleanup only.

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This commit is contained in:
Michael Lotz
2012-12-04 23:38:09 +01:00
parent f0422c6f9f
commit 2b5d52a174
1 changed files with 72 additions and 59 deletions
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src/system/kernel/arch/arm/arch_exceptions.S
+72 -59
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@@ -19,75 +19,84 @@
/* The following two macros are taken from FreeBSD... */ /* The following two macros are taken from FreeBSD... */
.macro PUSHFRAMEINSVC .macro PUSHFRAMEINSVC
stmdb sp, {r0-r3} /* Save 4 registers */ stmdb sp, {r0-r3} /* Save 4 registers */
mov r0, lr /* Save xxx32 r14 */ mov r0, lr /* Save xxx32 r14 */
mov r1, sp /* Save xxx32 sp */ mov r1, sp /* Save xxx32 sp */
mrs r3, spsr /* Save xxx32 spsr */ mrs r3, spsr /* Save xxx32 spsr */
mrs r2, cpsr /* Get the CPSR */ mrs r2, cpsr /* Get the CPSR */
bic r2, r2, #(CPSR_MODE_MASK)/* Fix for SVC mode */ bic r2, r2, #(CPSR_MODE_MASK) /* Fix for SVC mode */
orr r2, r2, #(CPSR_MODE_SVC) orr r2, r2, #(CPSR_MODE_SVC)
msr cpsr_c, r2 /* Punch into SVC mode */ msr cpsr_c, r2 /* Punch into SVC mode */
mov r2, sp /* Save SVC sp */ mov r2, sp /* Save SVC sp */
str r0, [sp, #-4]! /* Push return address */ str r0, [sp, #-4]! /* Push return address */
str lr, [sp, #-4]! /* Push SVC lr */ str lr, [sp, #-4]! /* Push SVC lr */
str r2, [sp, #-4]! /* Push SVC sp */ str r2, [sp, #-4]! /* Push SVC sp */
msr spsr_all, r3 /* Restore correct spsr */ msr spsr_all, r3 /* Restore correct spsr */
ldmdb r1, {r0-r3} /* Restore 4 regs from xxx mode */ ldmdb r1, {r0-r3} /* Restore 4 regs from xxx mode */
sub sp, sp, #(4*15) /* Adjust the stack pointer */ sub sp, sp, #(4*15) /* Adjust the stack pointer */
stmia sp, {r0-r12} /* Push the user mode registers */ stmia sp, {r0-r12} /* Push the user mode registers */
add r0, sp, #(4*13) /* Adjust the stack pointer */ add r0, sp, #(4*13) /* Adjust the stack pointer */
stmia r0, {r13-r14}^ /* Push the user mode registers */ stmia r0, {r13-r14}^ /* Push the user mode registers */
mov r0, r0 /* NOP for previous instruction */ mov r0, r0 /* NOP for previous instruction */
mrs r0, spsr_all mrs r0, spsr_all
str r0, [sp, #-4]! /* Save spsr */ str r0, [sp, #-4]! /* Save spsr */
.endm .endm
.macro PULLFRAMEFROMSVCANDEXIT .macro PULLFRAMEFROMSVCANDEXIT
ldr r0, [sp], #0x0004 /* Get the SPSR from stack */ ldr r0, [sp], #0x0004 /* Get the SPSR from stack */
msr spsr_all, r0 /* restore SPSR */ msr spsr_all, r0 /* restore SPSR */
ldmia sp, {r0-r14}^ /* Restore registers (usr mode) */ ldmia sp, {r0-r14}^ /* Restore registers (usr mode) */
mov r0, r0 /* NOP for previous instruction */ mov r0, r0 /* NOP for previous instruction */
add sp, sp, #(4*15) /* Adjust the stack pointer */ add sp, sp, #(4*15) /* Adjust the stack pointer */
ldmia sp, {sp, lr, pc}^ /* Restore lr and exit */ ldmia sp, {sp, lr, pc}^ /* Restore lr and exit */
.endm .endm
.text .text
.globl _vectors_start .globl _vectors_start
_vectors_start: _vectors_start:
ldr pc, _arm_reset ldr pc, _arm_reset
ldr pc, _arm_undefined ldr pc, _arm_undefined
ldr pc, _arm_syscall ldr pc, _arm_syscall
ldr pc, _arm_prefetch_abort ldr pc, _arm_prefetch_abort
ldr pc, _arm_data_abort ldr pc, _arm_data_abort
ldr pc, _arm_reserved ldr pc, _arm_reserved
ldr pc, _arm_irq ldr pc, _arm_irq
ldr pc, _arm_fiq ldr pc, _arm_fiq
_arm_reset: _arm_reset:
.word arm_reserved // actually reset, but not used when mapped .word arm_reserved // actually reset, but not used when mapped
_arm_undefined:
.word arm_undefined _arm_undefined:
.word arm_undefined
_arm_syscall: _arm_syscall:
.word arm_syscall .word arm_syscall
_arm_prefetch_abort: _arm_prefetch_abort:
.word arm_prefetch_abort .word arm_prefetch_abort
_arm_data_abort: _arm_data_abort:
.word arm_data_abort .word arm_data_abort
_arm_reserved: _arm_reserved:
.word arm_reserved .word arm_reserved
_arm_irq:
.word arm_irq _arm_irq:
_arm_fiq: .word arm_irq
.word arm_fiq
_arm_fiq:
.word arm_fiq
.globl _vectors_end .globl _vectors_end
_vectors_end: _vectors_end:
.rept 64 .rept 64
.word 0xdeadbeef .word 0xdeadbeef
.endr .endr
abort_stack: abort_stack:
.word . - 4 .word . - 4
.word 0xdeadbeef .word 0xdeadbeef
@@ -95,6 +104,7 @@ abort_stack:
.rept 64 .rept 64
.word 0xcafebabe .word 0xcafebabe
.endr .endr
irq_stack: irq_stack:
.word . - 4 .word . - 4
.word 0xcafebabe .word 0xcafebabe
@@ -102,6 +112,7 @@ irq_stack:
.rept 64 .rept 64
.word 0xaaaabbbb .word 0xaaaabbbb
.endr .endr
fiq_stack: fiq_stack:
.word . - 4 .word . - 4
.word 0xaaaabbbb .word 0xaaaabbbb
@@ -109,6 +120,7 @@ fiq_stack:
.rept 64 .rept 64
.word 0xccccdddd .word 0xccccdddd
.endr .endr
und_stack: und_stack:
.word . - 4 .word . - 4
.word 0xccccdddd .word 0xccccdddd
@@ -136,8 +148,8 @@ FUNCTION_END(arm_syscall)
FUNCTION(arm_prefetch_abort): FUNCTION(arm_prefetch_abort):
#ifdef __XSCALE__ #ifdef __XSCALE__
nop /* Make absolutely sure any pending */ nop /* Make absolutely sure any pending */
nop /* imprecise aborts have occurred. */ nop /* imprecise aborts have occurred. */
#endif #endif
add lr, lr, #4 add lr, lr, #4
PUSHFRAMEINSVC PUSHFRAMEINSVC
@@ -151,8 +163,8 @@ FUNCTION_END(arm_prefetch_abort)
FUNCTION(arm_data_abort): FUNCTION(arm_data_abort):
#ifdef __XSCALE__ #ifdef __XSCALE__
nop /* Make absolutely sure any pending */ nop /* Make absolutely sure any pending */
nop /* imprecise aborts have occurred. */ nop /* imprecise aborts have occurred. */
#endif #endif
sub lr, lr, #8 /* Adjust the lr */ sub lr, lr, #8 /* Adjust the lr */
PUSHFRAMEINSVC PUSHFRAMEINSVC
@@ -167,11 +179,12 @@ FUNCTION(arm_reserved):
b . b .
FUNCTION_END(arm_reserved) FUNCTION_END(arm_reserved)
FUNCTION(arm_irq): FUNCTION(arm_irq):
sub lr, lr, #4 sub lr, lr, #4
PUSHFRAMEINSVC PUSHFRAMEINSVC
mov r0, sp /* iframe */ mov r0, sp /* iframe */
bl arch_arm_irq bl arch_arm_irq
PULLFRAMEFROMSVCANDEXIT PULLFRAMEFROMSVCANDEXIT
@@ -182,7 +195,7 @@ FUNCTION(arm_fiq):
sub lr, lr, #4 sub lr, lr, #4
PUSHFRAMEINSVC PUSHFRAMEINSVC
mov r0, sp /* iframe */ mov r0, sp /* iframe */
bl arch_arm_fiq bl arch_arm_fiq
PULLFRAMEFROMSVCANDEXIT PULLFRAMEFROMSVCANDEXIT