added parial memory pitch programming: lowres virtual width screens can be used now.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@13663 a95241bf-73f2-0310-859d-f6bbb57e9c96
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@@ -204,7 +204,7 @@ status_t SET_DISPLAY_MODE(display_mode *mode_to_set)
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si->interlaced_tv_mode = true;
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si->interlaced_tv_mode = true;
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*/
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*/
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/*set the display(s) pitches*/
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/*set the display(s) pitches*/
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// head1_set_display_pitch ();
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head1_set_display_pitch ();
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//fixme: seperate for real dualhead modes:
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//fixme: seperate for real dualhead modes:
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//we need a secondary si->fbc!
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//we need a secondary si->fbc!
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// head2_set_display_pitch ();
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// head2_set_display_pitch ();
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@@ -217,11 +217,11 @@ status_t SET_DISPLAY_MODE(display_mode *mode_to_set)
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{
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{
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case DUALHEAD_ON:
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case DUALHEAD_ON:
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case DUALHEAD_SWITCH:
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case DUALHEAD_SWITCH:
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// head1_set_display_start(startadd,colour_depth1);
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head1_set_display_start(startadd,colour_depth1);
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// head2_set_display_start(startadd_right,colour_depth2);
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// head2_set_display_start(startadd_right,colour_depth2);
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break;
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break;
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case DUALHEAD_CLONE:
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case DUALHEAD_CLONE:
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// head1_set_display_start(startadd,colour_depth1);
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head1_set_display_start(startadd,colour_depth1);
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// head2_set_display_start(startadd,colour_depth2);
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// head2_set_display_start(startadd,colour_depth2);
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break;
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break;
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}
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}
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@@ -291,7 +291,7 @@ status = B_OK;
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// head1_mode(colour_mode,1.0);
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// head1_mode(colour_mode,1.0);
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/* set the display pitch */
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/* set the display pitch */
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// head1_set_display_pitch();
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head1_set_display_pitch();
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/* tell the card what memory to display */
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/* tell the card what memory to display */
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head1_set_display_start(startadd,colour_depth1);
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head1_set_display_start(startadd,colour_depth1);
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@@ -578,21 +578,19 @@ status_t eng_crtc_dpms_fetch(bool *display, bool *h, bool *v)
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status_t eng_crtc_set_display_pitch()
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status_t eng_crtc_set_display_pitch()
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{
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{
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uint32 offset;
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uint16 offset;
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LOG(4,("CRTC: setting card pitch (offset between lines)\n"));
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LOG(4,("CRTC: setting card pitch (offset between lines)\n"));
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/* figure out offset value hardware needs */
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/* figure out offset value hardware needs */
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offset = si->fbc.bytes_per_row / 8;
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offset = si->fbc.bytes_per_row >> 3;
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LOG(2,("CRTC: offset register set to: $%04x\n", offset));
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LOG(2,("CRTC: offset register set to: $%04x\n", offset));
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/* enable access to primary head */
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set_crtc_owner(0);
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/* program the card */
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/* program the card */
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// fixme: lowbyte register may not be programmed with value 0xff. Prevent that...
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CRTCW(PITCHL, (offset & 0x00ff));
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CRTCW(PITCHL, (offset & 0x00ff));
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CRTCW(REPAINT0, ((CRTCR(REPAINT0) & 0x1f) | ((offset & 0x0700) >> 3)));
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//fixme: there is a high-byte register somewhere that needs to be pgm'd!!!
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return B_OK;
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return B_OK;
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}
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}
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