added via accelerant, a copy of skeleton driver yet.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@13585 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
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/*
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Copyright 1999, Be Incorporated. All Rights Reserved.
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This file may be used under the terms of the Be Sample Code License.
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Other authors:
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Mark Watson
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Rudolf Cornelissen 9/2002-5/2003
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*/
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#define MODULE_BIT 0x02000000
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#include "acc_std.h"
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/*
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Return the current display mode. The only time you might return an
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error is if a mode hasn't been set. Or if the system hands you a NULL pointer.
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*/
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status_t GET_DISPLAY_MODE(display_mode *current_mode)
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{
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/* check for NULL pointer */
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if (current_mode == NULL) return B_ERROR;
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*current_mode = si->dm;
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return B_OK;
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}
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/* Return the frame buffer configuration information. */
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status_t GET_FRAME_BUFFER_CONFIG(frame_buffer_config *afb)
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{
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/* check for NULL pointer */
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if (afb == NULL) return B_ERROR;
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*afb = si->fbc;
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return B_OK;
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}
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/* Return the maximum and minium pixelclock limits for the specified mode. */
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/* NOTE:
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* Due to BeOS constraints output for all heads will be limited to the head with
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* the least capabilities. */
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status_t GET_PIXEL_CLOCK_LIMITS(display_mode *dm, uint32 *low, uint32 *high)
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{
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uint32 max_pclk = 0;
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uint32 min_pclk = 0;
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/* check for NULL pointers */
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if ((dm == NULL) || (low == NULL) || (high == NULL)) return B_ERROR;
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/* specify requested info */
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if (dm->flags & DUALHEAD_BITS)
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{
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/* dualhead mode */
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/* find min. value */
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switch (si->ps.card_type)
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{
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default:
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*low = ((si->ps.min_video_vco * 1000) / 16);
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break;
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}
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/* find max. value:
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* using decondary DAC specs because they could be narrower (twinview) */
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switch (dm->space)
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{
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case B_CMAP8:
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max_pclk = si->ps.max_dac2_clock_8;
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break;
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case B_RGB15_LITTLE:
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case B_RGB16_LITTLE:
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max_pclk = si->ps.max_dac2_clock_16;
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break;
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case B_RGB24_LITTLE:
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max_pclk = si->ps.max_dac2_clock_24;
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break;
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case B_RGB32_LITTLE:
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/* specially noted because of RAM speed constraints! */
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max_pclk = si->ps.max_dac2_clock_32dh;
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break;
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default:
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/* use fail-safe value */
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max_pclk = si->ps.max_dac2_clock_32dh;
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break;
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}
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/* return values in kHz */
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*high = max_pclk * 1000;
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}
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else
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{
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/* singlehead mode */
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/* find min. value */
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switch (si->ps.card_type)
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{
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default:
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*low = ((si->ps.min_pixel_vco * 1000) / 16);
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break;
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}
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/* find max. value: depends on which head is used as primary head */
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if (!si->ps.crtc2_prim)
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{
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switch (dm->space)
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{
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case B_CMAP8:
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max_pclk = si->ps.max_dac1_clock_8;
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break;
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case B_RGB15_LITTLE:
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case B_RGB16_LITTLE:
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max_pclk = si->ps.max_dac1_clock_16;
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break;
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case B_RGB24_LITTLE:
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max_pclk = si->ps.max_dac1_clock_24;
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break;
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case B_RGB32_LITTLE:
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max_pclk = si->ps.max_dac1_clock_32;
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break;
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default:
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/* use fail-safe value */
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max_pclk = si->ps.max_dac1_clock_32;
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break;
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}
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}
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else
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{
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switch (dm->space)
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{
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case B_CMAP8:
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max_pclk = si->ps.max_dac2_clock_8;
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break;
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case B_RGB15_LITTLE:
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case B_RGB16_LITTLE:
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max_pclk = si->ps.max_dac2_clock_16;
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break;
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case B_RGB24_LITTLE:
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max_pclk = si->ps.max_dac2_clock_24;
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break;
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case B_RGB32_LITTLE:
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max_pclk = si->ps.max_dac2_clock_32;
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break;
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default:
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/* use fail-safe value */
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max_pclk = si->ps.max_dac2_clock_32;
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break;
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}
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}
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/* return values in kHz */
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*high = max_pclk * 1000;
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}
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/* clamp lower limit to 48Hz vertical refresh for now.
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* Apparantly the BeOS screenprefs app does limit the upper refreshrate to 90Hz,
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* while it does not limit the lower refreshrate. */
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min_pclk = ((uint32)dm->timing.h_total * (uint32)dm->timing.v_total * 48) / 1000;
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if (min_pclk > *low) *low = min_pclk;
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return B_OK;
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}
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/* Return the semaphore id that will be used to signal a vertical sync occured. */
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sem_id ACCELERANT_RETRACE_SEMAPHORE(void)
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{
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// return si->vblank;
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return B_ERROR;
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}
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