pch_thermal: driver for intel pch thermal devices
Change-Id: I7b750957727d222b464acf3b84fb9a9d6efee9b5 Reviewed-on: https://review.haiku-os.org/c/haiku/+/2385 Reviewed-by: Jérôme Duval <[email protected]>
This commit is contained in:
Jérôme Duval
@@ -5,4 +5,5 @@ SubInclude HAIKU_TOP src add-ons kernel drivers power acpi_battery ;
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SubInclude HAIKU_TOP src add-ons kernel drivers power acpi_button ;
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SubInclude HAIKU_TOP src add-ons kernel drivers power acpi_lid ;
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SubInclude HAIKU_TOP src add-ons kernel drivers power acpi_thermal ;
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SubInclude HAIKU_TOP src add-ons kernel drivers power pch_thermal ;
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SubInclude HAIKU_TOP src add-ons kernel drivers power x86_cpuidle ;
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@@ -0,0 +1,76 @@
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/*
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* Copyright 2006-2008, Haiku, Inc. All Rights Reserved.
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* Distributed under the terms of the MIT License.
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*
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* Authors:
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* Axel Dörfler, [email protected]
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*/
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#ifndef AREA_KEEPER_H
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#define AREA_KEEPER_H
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#include <KernelExport.h>
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#include <OS.h>
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#include <util/kernel_cpp.h>
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class AreaKeeper {
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public:
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AreaKeeper();
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~AreaKeeper();
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area_id Create(const char *name, void **_virtualAddress, uint32 spec,
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size_t size, uint32 lock, uint32 protection);
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area_id Map(const char *name, phys_addr_t physicalAddress,
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size_t numBytes, uint32 spec, uint32 protection,
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void **_virtualAddress);
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status_t InitCheck() { return fArea < B_OK ? (status_t)fArea : B_OK; }
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void Detach();
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private:
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area_id fArea;
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};
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AreaKeeper::AreaKeeper()
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:
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fArea(-1)
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{
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}
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AreaKeeper::~AreaKeeper()
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{
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if (fArea >= B_OK)
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delete_area(fArea);
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}
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area_id
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AreaKeeper::Create(const char *name, void **_virtualAddress, uint32 spec,
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size_t size, uint32 lock, uint32 protection)
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{
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fArea = create_area(name, _virtualAddress, spec, size, lock, protection);
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return fArea;
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}
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area_id
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AreaKeeper::Map(const char *name, phys_addr_t physicalAddress, size_t numBytes,
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uint32 spec, uint32 protection, void **_virtualAddress)
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{
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fArea = map_physical_memory(name, physicalAddress, numBytes, spec,
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protection, _virtualAddress);
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return fArea;
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}
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void
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AreaKeeper::Detach()
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{
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fArea = -1;
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}
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#endif // AREA_KEEPER_H
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@@ -0,0 +1,8 @@
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SubDir HAIKU_TOP src add-ons kernel drivers power pch_thermal ;
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UsePrivateKernelHeaders ;
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KernelAddon pch_thermal :
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pch_thermal.cpp
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;
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@@ -0,0 +1,412 @@
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/*
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* Copyright 2020, Jérôme Duval, [email protected].
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*
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* Distributed under the terms of the MIT License.
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*
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* PCH Thermal driver.
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*/
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#include <Drivers.h>
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#include <Errors.h>
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#include <KernelExport.h>
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#include <PCI.h>
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#include <bus/PCI.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include "AreaKeeper.h"
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#include "pch_thermal.h"
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#define PCH_THERMAL_MODULE_NAME "drivers/power/pch_thermal/driver_v1"
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#define PCH_THERMAL_DEVICE_MODULE_NAME "drivers/power/pch_thermal/device_v1"
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/* Base Namespace devices are published to */
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#define PCH_THERMAL_BASENAME "power/pch_thermal/%d"
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// name of pnp generator of path ids
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#define PCH_THERMAL_PATHID_GENERATOR "pch_thermal/path_id"
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static device_manager_info *sDeviceManager;
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//#define TRACE_PCH_THERMAL
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#ifdef TRACE_PCH_THERMAL
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# define TRACE(x...) dprintf("pch_thermal: " x)
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#else
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# define TRACE(x...)
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#endif
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#define ERROR(x...) dprintf("pch_thermal: " x)
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#define write8(address, data) \
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(*((volatile uint8*)(address)) = (data))
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#define read8(address) \
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(*((volatile uint8*)(address)))
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#define write16(address, data) \
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(*((volatile uint16*)(address)) = (data))
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#define read16(address) \
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(*((volatile uint16*)(address)))
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#define write32(address, data) \
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(*((volatile uint32*)(address)) = (data))
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#define read32(address) \
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(*((volatile uint32*)(address)))
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typedef struct pch_thermal_device_info {
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device_node *node;
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pci_device_module_info *pci;
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pci_device *pci_cookie;
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addr_t registers;
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area_id registers_area;
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uint32 criticalTemp;
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uint32 hotTemp;
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uint32 passiveTemp;
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} pch_thermal_device_info;
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status_t pch_thermal_control(void* _cookie, uint32 op, void* arg, size_t len);
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static status_t
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pch_thermal_open(void *_cookie, const char *path, int flags, void** cookie)
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{
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pch_thermal_device_info *device = (pch_thermal_device_info *)_cookie;
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TRACE("pch_thermal_open %p\n", device);
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*cookie = device;
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return B_OK;
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}
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static status_t
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pch_thermal_read(void* _cookie, off_t position, void *buf, size_t* num_bytes)
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{
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pch_thermal_device_info* device = (pch_thermal_device_info*)_cookie;
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TRACE("pch_thermal_read %p\n", device);
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pch_thermal_type therm_info;
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if (*num_bytes < 1)
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return B_IO_ERROR;
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if (position == 0) {
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size_t max_len = *num_bytes;
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char *str = (char *)buf;
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TRACE("pch_thermal: read()\n");
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pch_thermal_control(device, drvOpGetThermalType, &therm_info, 0);
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snprintf(str, max_len, " Critical Temperature: %" B_PRIu32 ".%"
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B_PRIu32 " C\n", (therm_info.critical_temp / 10),
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(therm_info.critical_temp % 10));
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max_len -= strlen(str);
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str += strlen(str);
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snprintf(str, max_len, " Current Temperature: %" B_PRIu32 ".%"
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B_PRIu32 " C\n", (therm_info.current_temp / 10),
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(therm_info.current_temp % 10));
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if (therm_info.hot_temp > 0) {
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max_len -= strlen(str);
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str += strlen(str);
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snprintf(str, max_len, " Hot Temperature: %" B_PRIu32 ".%"
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B_PRIu32 " C\n", (therm_info.hot_temp / 10),
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(therm_info.hot_temp % 10));
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}
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*num_bytes = strlen((char *)buf);
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} else {
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*num_bytes = 0;
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}
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return B_OK;
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}
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static status_t
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pch_thermal_write(void* cookie, off_t position, const void* buffer,
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size_t* num_bytes)
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{
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return B_ERROR;
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}
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status_t
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pch_thermal_control(void* _cookie, uint32 op, void* arg, size_t len)
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{
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pch_thermal_device_info* device = (pch_thermal_device_info*)_cookie;
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status_t err = B_ERROR;
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pch_thermal_type *att = NULL;
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switch (op) {
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case drvOpGetThermalType: {
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att = (pch_thermal_type *)arg;
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// Read basic temperature thresholds.
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att->critical_temp = device->criticalTemp;
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att->hot_temp = device->hotTemp;
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uint16 temp = read16(device->registers + PCH_THERMAL_TEMP);
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temp = (temp >> PCH_THERMAL_TEMP_TSR_SHIFT)
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& PCH_THERMAL_TEMP_TSR_MASK;
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att->current_temp = (uint32)temp * 10 / 2 - 500;
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err = B_OK;
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break;
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}
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}
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return err;
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}
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static status_t
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pch_thermal_close (void* cookie)
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{
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return B_OK;
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}
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static status_t
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pch_thermal_free (void* cookie)
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{
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return B_OK;
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}
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// #pragma mark - driver module API
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static float
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pch_thermal_support(device_node *parent)
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{
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const char *bus;
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// make sure parent is really the PCI bus manager
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if (sDeviceManager->get_attr_string(parent, B_DEVICE_BUS, &bus, false))
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return -1;
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if (strcmp(bus, "pci"))
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return 0.0;
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uint16 vendorID;
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uint16 deviceID;
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// get vendor and device ID
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if (sDeviceManager->get_attr_uint16(parent, B_DEVICE_VENDOR_ID, &vendorID,
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false) != B_OK
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|| sDeviceManager->get_attr_uint16(parent, B_DEVICE_ID, &deviceID,
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false) != B_OK) {
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return -1;
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}
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// check whether it's really a PCH thermal device
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if (vendorID != 0x8086)
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return 0.0;
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const uint16 devices[] = { 0x9c24, 0x8c24, 0x9ca4, 0x9d31, 0xa131, 0x9df9,
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0xa379, 0x06f9, 0 };
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for (const uint16* device = devices; *device != 0; device++) {
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if (*device == deviceID)
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return 0.6;
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}
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return 0.0;
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}
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static status_t
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pch_thermal_register_device(device_node *node)
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{
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device_attr attrs[] = {
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{ B_DEVICE_PRETTY_NAME, B_STRING_TYPE, { string: "PCH Thermal" }},
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{ NULL }
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};
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return sDeviceManager->register_node(node, PCH_THERMAL_MODULE_NAME, attrs,
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NULL, NULL);
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}
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static status_t
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pch_thermal_init_driver(device_node *node, void **_driverCookie)
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{
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*_driverCookie = node;
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return B_OK;
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}
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static void
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pch_thermal_uninit_driver(void *driverCookie)
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{
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}
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static status_t
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pch_thermal_register_child_devices(void *_cookie)
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{
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device_node *node = (device_node*)_cookie;
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int path_id;
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char name[128];
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path_id = sDeviceManager->create_id(PCH_THERMAL_PATHID_GENERATOR);
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if (path_id < 0) {
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ERROR("pch_thermal_register_child_devices: couldn't create a path_id"
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"\n");
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return B_ERROR;
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}
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snprintf(name, sizeof(name), PCH_THERMAL_BASENAME, path_id);
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return sDeviceManager->publish_device(node, name,
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PCH_THERMAL_DEVICE_MODULE_NAME);
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}
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static status_t
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pch_thermal_init_device(void *_cookie, void **cookie)
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{
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device_node *node = (device_node *)_cookie;
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pch_thermal_device_info *device;
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device_node *parent;
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status_t status = B_NO_INIT;
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device = (pch_thermal_device_info *)calloc(1, sizeof(*device));
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if (device == NULL)
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return B_NO_MEMORY;
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device->node = node;
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parent = sDeviceManager->get_parent_node(node);
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sDeviceManager->get_driver(parent, (driver_module_info **)&device->pci,
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(void **)&device->pci_cookie);
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sDeviceManager->put_node(parent);
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struct pci_info info;
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device->pci->get_pci_info(device->pci_cookie, &info);
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// map the registers (low + high for 64-bit when requested)
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phys_addr_t physicalAddress = info.u.h0.base_registers[0];
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physicalAddress &= PCI_address_memory_32_mask;
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if ((info.u.h0.base_register_flags[0] & 0xc) == PCI_address_type_64)
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physicalAddress += (phys_addr_t)info.u.h0.base_registers[1] << 32;
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size_t mapSize = info.u.h0.base_register_sizes[0];
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AreaKeeper mmioMapper;
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device->registers_area = mmioMapper.Map("intel PCH thermal mmio",
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physicalAddress, mapSize, B_ANY_KERNEL_ADDRESS,
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B_KERNEL_READ_AREA | B_KERNEL_WRITE_AREA, (void**)&device->registers);
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if (mmioMapper.InitCheck() < B_OK) {
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ERROR("could not map memory I/O!\n");
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status = device->registers_area;
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goto err;
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}
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{
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bool enabled = false;
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uint8 tsel = read8(device->registers + PCH_THERMAL_TSEL);
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if ((tsel & PCH_THERMAL_TSEL_ETS) != 0)
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enabled = true;
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if (!enabled) {
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if ((tsel & PCH_THERMAL_TSEL_PLDB) != 0) {
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status = B_DEVICE_NOT_FOUND;
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goto err;
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}
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write8(device->registers + PCH_THERMAL_TSEL,
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tsel | PCH_THERMAL_TSEL_ETS);
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if ((tsel & PCH_THERMAL_TSEL_ETS) == 0) {
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status = B_DEVICE_NOT_FOUND;
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goto err;
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}
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}
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// read config temperatures
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uint16 ctt = read16(device->registers + PCH_THERMAL_CTT);
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ctt = (ctt >> PCH_THERMAL_CTT_CTRIP_SHIFT) & PCH_THERMAL_CTT_CTRIP_MASK;
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device->criticalTemp = (ctt != 0) ? (uint32)ctt * 10 / 2 - 500 : 0;
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uint16 phl = read16(device->registers + PCH_THERMAL_PHL);
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phl = (phl >> PCH_THERMAL_PHL_PHLL_SHIFT) & PCH_THERMAL_PHL_PHLL_MASK;
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device->hotTemp = (phl != 0) ? (uint32)phl * 10 / 2 - 500 : 0;
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}
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TRACE("pch_thermal_init_device %p\n", device);
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|
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mmioMapper.Detach();
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*cookie = device;
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return B_OK;
|
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|
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err:
|
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free(device);
|
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return status;
|
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}
|
||||
|
||||
|
||||
static void
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pch_thermal_uninit_device(void *_cookie)
|
||||
{
|
||||
pch_thermal_device_info *device = (pch_thermal_device_info *)_cookie;
|
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TRACE("pch_thermal_uninit_device %p\n", device);
|
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delete_area(device->registers_area);
|
||||
free(device);
|
||||
}
|
||||
|
||||
|
||||
|
||||
module_dependency module_dependencies[] = {
|
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{ B_DEVICE_MANAGER_MODULE_NAME, (module_info **)&sDeviceManager },
|
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{}
|
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};
|
||||
|
||||
|
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driver_module_info pch_thermal_driver_module = {
|
||||
{
|
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PCH_THERMAL_MODULE_NAME,
|
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0,
|
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NULL
|
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},
|
||||
|
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pch_thermal_support,
|
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pch_thermal_register_device,
|
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pch_thermal_init_driver,
|
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pch_thermal_uninit_driver,
|
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pch_thermal_register_child_devices,
|
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NULL, // rescan
|
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NULL, // removed
|
||||
};
|
||||
|
||||
|
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struct device_module_info pch_thermal_device_module = {
|
||||
{
|
||||
PCH_THERMAL_DEVICE_MODULE_NAME,
|
||||
0,
|
||||
NULL
|
||||
},
|
||||
|
||||
pch_thermal_init_device,
|
||||
pch_thermal_uninit_device,
|
||||
NULL,
|
||||
|
||||
pch_thermal_open,
|
||||
pch_thermal_close,
|
||||
pch_thermal_free,
|
||||
pch_thermal_read,
|
||||
pch_thermal_write,
|
||||
NULL,
|
||||
pch_thermal_control,
|
||||
|
||||
NULL,
|
||||
NULL
|
||||
};
|
||||
|
||||
module_info *modules[] = {
|
||||
(module_info *)&pch_thermal_driver_module,
|
||||
(module_info *)&pch_thermal_device_module,
|
||||
NULL
|
||||
};
|
||||
@@ -0,0 +1,94 @@
|
||||
/*
|
||||
* Copyright 2020, Jérôme Duval, [email protected].
|
||||
*
|
||||
* Distributed under the terms of the MIT License.
|
||||
*/
|
||||
#ifndef _PCH_THERMAL_H
|
||||
#define _PCH_THERMAL_H
|
||||
|
||||
|
||||
enum { /* ioctl op-codes */
|
||||
drvOpGetThermalType = B_DEVICE_OP_CODES_END + 10001,
|
||||
};
|
||||
|
||||
|
||||
struct pch_thermal_type {
|
||||
/* Required fields for thermal devices */
|
||||
uint32 critical_temp;
|
||||
uint32 current_temp;
|
||||
|
||||
/* Optional HOT temp, S4 sleep threshold */
|
||||
uint32 hot_temp;
|
||||
};
|
||||
|
||||
// Registers
|
||||
#define PCH_THERMAL_TEMP 0x00
|
||||
#define PCH_THERMAL_TEMP_TSR_SHIFT 0
|
||||
#define PCH_THERMAL_TEMP_TSR_MASK 0xff
|
||||
#define PCH_THERMAL_TSC 0x04
|
||||
#define PCH_THERMAL_TSC_CPDE (1 << 0)
|
||||
#define PCH_THERMAL_TSC_PLDB (1 << 7)
|
||||
#define PCH_THERMAL_TSS 0x06
|
||||
#define PCH_THERMAL_TSS_SMIS (1 << 2)
|
||||
#define PCH_THERMAL_TSS_GPES (1 << 3)
|
||||
#define PCH_THERMAL_TSS_TSDSS (1 << 4)
|
||||
#define PCH_THERMAL_TSEL 0x08
|
||||
#define PCH_THERMAL_TSEL_ETS (1 << 0)
|
||||
#define PCH_THERMAL_TSEL_PLDB (1 << 7)
|
||||
#define PCH_THERMAL_TSREL 0x0a
|
||||
#define PCH_THERMAL_TSREL_ESTR (1 << 0)
|
||||
#define PCH_THERMAL_TSREL_PLDB (1 << 7)
|
||||
#define PCH_THERMAL_TSMIC 0x0c
|
||||
#define PCH_THERMAL_TSMIC_ATST (1 << 0)
|
||||
#define PCH_THERMAL_TSMIC_PLDB (1 << 7)
|
||||
#define PCH_THERMAL_CTT 0x10
|
||||
#define PCH_THERMAL_CTT_CTRIP_SHIFT 0
|
||||
#define PCH_THERMAL_CTT_CTRIP_MASK 0x1ff
|
||||
#define PCH_THERMAL_TAHV 0x14
|
||||
#define PCH_THERMAL_TAHV_AH_SHIFT 0
|
||||
#define PCH_THERMAL_TAHV_AH_MASK 0x1ff
|
||||
#define PCH_THERMAL_TALV 0x18
|
||||
#define PCH_THERMAL_TALV_AL_SHIFT 0
|
||||
#define PCH_THERMAL_TALV_AL_MASK 0x1ff
|
||||
#define PCH_THERMAL_TSPM 0x1c
|
||||
#define PCH_THERMAL_TSPM_LTT_SHIFT 0
|
||||
#define PCH_THERMAL_TSPM_LTT_MASK 0x1ff
|
||||
#define PCH_THERMAL_TSPM_MAXTSST_SHIFT 9
|
||||
#define PCH_THERMAL_TSPM_MAXTSST_MASK 0xf
|
||||
#define PCH_THERMAL_TSPM_DTSSIC0 (1 << 13)
|
||||
#define PCH_THERMAL_TSPM_DTSSS0EN (1 << 14)
|
||||
#define PCH_THERMAL_TSPM_TSPMLOCK (1 << 15)
|
||||
#define PCH_THERMAL_TL 0x40
|
||||
#define PCH_THERMAL_TL_T0L_SHIFT 0
|
||||
#define PCH_THERMAL_TL_T0L_MASK 0x1ff
|
||||
#define PCH_THERMAL_TL_T1L_SHIFT 10
|
||||
#define PCH_THERMAL_TL_T1L_MASK 0x1ff
|
||||
#define PCH_THERMAL_TL_T2L_SHIFT 20
|
||||
#define PCH_THERMAL_TL_T2L_MASK 0x1ff
|
||||
#define PCH_THERMAL_TL_TTEN (1 << 29)
|
||||
#define PCH_THERMAL_TL_TT13EN (1 << 30)
|
||||
#define PCH_THERMAL_TL_TTL (1 << 31)
|
||||
#define PCH_THERMAL_TL2 0x50
|
||||
#define PCH_THERMAL_TL2_TL2LOCK_SHIFT 15
|
||||
#define PCH_THERMAL_TL2_PCMTEN_SHIFT 16
|
||||
#define PCH_THERMAL_PHL 0x60
|
||||
#define PCH_THERMAL_PHL_PHLL_SHIFT 0
|
||||
#define PCH_THERMAL_PHL_PHLL_MASK 0x1ff
|
||||
#define PCH_THERMAL_PHL_PHLE (1 << 15)
|
||||
#define PCH_THERMAL_PHLC 0x62
|
||||
#define PCH_THERMAL_PHLC_PHLL (1 << 0)
|
||||
#define PCH_THERMAL_TAS 0x80
|
||||
#define PCH_THERMAL_TAS_ALHE (1 << 0)
|
||||
#define PCH_THERMAL_TAS_AHLE (1 << 1)
|
||||
#define PCH_THERMAL_TSPIEN 0x82
|
||||
#define PCH_THERMAL_TSPIEN_ALHEN (1 << 0)
|
||||
#define PCH_THERMAL_TSPIEN_AHLEN (1 << 1)
|
||||
#define PCH_THERMAL_TSGPEN 0x84
|
||||
#define PCH_THERMAL_TSGPEN_ALHEN (1 << 0)
|
||||
#define PCH_THERMAL_TSGPEN_AHLEN (1 << 1)
|
||||
#define PCH_THERMAL_TCFD 0xf0
|
||||
#define PCH_THERMAL_TCFD_TCD (1 << 0)
|
||||
|
||||
|
||||
#endif // _PCH_THERMAL_H
|
||||
|
||||
Reference in New Issue
Block a user