Updated x86_64 fenv.h and added fenv.c.
This commit is contained in:
Alex Smith
@@ -111,7 +111,8 @@ feclearexcept(int __excepts)
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static __inline int
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fegetexceptflag(fexcept_t *__flagp, int __excepts)
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{
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int __mxcsr, __status;
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uint32_t __mxcsr;
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uint16_t __status;
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__stmxcsr(&__mxcsr);
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__fnstsw(&__status);
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@@ -125,7 +126,8 @@ int feraiseexcept(int __excepts);
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static __inline int
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fetestexcept(int __excepts)
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{
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int __mxcsr, __status;
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uint32_t __mxcsr;
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uint16_t __status;
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__stmxcsr(&__mxcsr);
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__fnstsw(&__status);
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@@ -135,7 +137,7 @@ fetestexcept(int __excepts)
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static __inline int
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fegetround(void)
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{
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int __control;
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uint16_t __control;
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/*
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* We assume that the x87 and the SSE unit agree on the
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@@ -150,7 +152,8 @@ fegetround(void)
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static __inline int
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fesetround(int __round)
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{
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int __mxcsr, __control;
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uint32_t __mxcsr;
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uint16_t __control;
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if (__round & ~_ROUND_MASK)
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return (-1);
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@@ -198,7 +201,7 @@ int fedisableexcept(int __mask);
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static __inline int
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fegetexcept(void)
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{
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int __control;
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uint16_t __control;
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/*
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* We assume that the masks for the x87 and the SSE unit are
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@@ -0,0 +1,218 @@
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/*-
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)npx.h 5.3 (Berkeley) 1/18/91
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* $FreeBSD$
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*/
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/*
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* Floating Point Data Structures and Constants
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* W. Jolitz 1/90
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*/
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#ifndef _X86_FPU_H_
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#define _X86_FPU_H_
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#define __aligned(x) __attribute__((__aligned__(x)))
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/* Environment information of floating point unit. */
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struct env87 {
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int32_t en_cw; /* control word (16bits) */
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int32_t en_sw; /* status word (16bits) */
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int32_t en_tw; /* tag word (16bits) */
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int32_t en_fip; /* fp instruction pointer */
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uint16_t en_fcs; /* fp code segment selector */
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uint16_t en_opcode; /* opcode last executed (11 bits) */
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int32_t en_foo; /* fp operand offset */
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int32_t en_fos; /* fp operand segment selector */
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};
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/* Contents of each x87 floating point accumulator. */
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struct fpacc87 {
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uint8_t fp_bytes[10];
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};
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/* Floating point context. (i386 fnsave/frstor) */
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struct save87 {
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struct env87 sv_env; /* floating point control/status */
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struct fpacc87 sv_ac[8]; /* accumulator contents, 0-7 */
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uint8_t sv_pad0[4]; /* saved status word (now unused) */
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/*
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* Bogus padding for emulators. Emulators should use their own
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* struct and arrange to store into this struct (ending here)
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* before it is inspected for ptracing or for core dumps. Some
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* emulators overwrite the whole struct. We have no good way of
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* knowing how much padding to leave. Leave just enough for the
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* GPL emulator's i387_union (176 bytes total).
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*/
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uint8_t sv_pad[64]; /* padding; used by emulators */
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};
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/* Contents of each SSE extended accumulator. */
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struct xmmacc {
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uint8_t xmm_bytes[16];
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};
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/* Contents of the upper 16 bytes of each AVX extended accumulator. */
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struct ymmacc {
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uint8_t ymm_bytes[16];
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};
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/* Rename structs below depending on machine architecture. */
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#ifdef __i386__
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#define __envxmm32 envxmm
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#else
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#define __envxmm32 envxmm32
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#define __envxmm64 envxmm
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#endif
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struct __envxmm32 {
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uint16_t en_cw; /* control word (16bits) */
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uint16_t en_sw; /* status word (16bits) */
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uint16_t en_tw; /* tag word (16bits) */
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uint16_t en_opcode; /* opcode last executed (11 bits) */
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uint32_t en_fip; /* fp instruction pointer */
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uint16_t en_fcs; /* fp code segment selector */
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uint16_t en_pad0; /* padding */
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uint32_t en_foo; /* fp operand offset */
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uint16_t en_fos; /* fp operand segment selector */
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uint16_t en_pad1; /* padding */
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uint32_t en_mxcsr; /* SSE control/status register */
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uint32_t en_mxcsr_mask; /* valid bits in mxcsr */
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};
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struct __envxmm64 {
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uint16_t en_cw; /* control word (16bits) */
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uint16_t en_sw; /* status word (16bits) */
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uint8_t en_tw; /* tag word (8bits) */
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uint8_t en_zero;
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uint16_t en_opcode; /* opcode last executed (11 bits ) */
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uint64_t en_rip; /* fp instruction pointer */
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uint64_t en_rdp; /* fp operand pointer */
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uint32_t en_mxcsr; /* SSE control/status register */
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uint32_t en_mxcsr_mask; /* valid bits in mxcsr */
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};
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/* Floating point context. (i386 fxsave/fxrstor) */
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struct savexmm {
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struct __envxmm32 sv_env;
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struct {
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struct fpacc87 fp_acc;
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uint8_t fp_pad[6]; /* padding */
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} sv_fp[8];
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struct xmmacc sv_xmm[8];
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uint8_t sv_pad[224];
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} __aligned(16);
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#ifdef __i386__
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union savefpu {
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struct save87 sv_87;
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struct savexmm sv_xmm;
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};
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#else
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/* Floating point context. (amd64 fxsave/fxrstor) */
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struct savefpu {
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struct __envxmm64 sv_env;
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struct {
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struct fpacc87 fp_acc;
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uint8_t fp_pad[6]; /* padding */
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} sv_fp[8];
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struct xmmacc sv_xmm[16];
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uint8_t sv_pad[96];
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} __aligned(16);
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#endif
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struct xstate_hdr {
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uint64_t xstate_bv;
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uint8_t xstate_rsrv0[16];
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uint8_t xstate_rsrv[40];
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};
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struct savexmm_xstate {
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struct xstate_hdr sx_hd;
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struct ymmacc sx_ymm[16];
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};
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struct savexmm_ymm {
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struct __envxmm32 sv_env;
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struct {
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struct fpacc87 fp_acc;
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int8_t fp_pad[6]; /* padding */
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} sv_fp[8];
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struct xmmacc sv_xmm[16];
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uint8_t sv_pad[96];
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struct savexmm_xstate sv_xstate;
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} __aligned(64);
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struct savefpu_xstate {
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struct xstate_hdr sx_hd;
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struct ymmacc sx_ymm[16];
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};
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struct savefpu_ymm {
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struct __envxmm64 sv_env;
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struct {
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struct fpacc87 fp_acc;
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int8_t fp_pad[6]; /* padding */
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} sv_fp[8];
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struct xmmacc sv_xmm[16];
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uint8_t sv_pad[96];
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struct savefpu_xstate sv_xstate;
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} __aligned(64);
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#undef __envxmm32
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#undef __envxmm64
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/*
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* The hardware default control word for i387's and later coprocessors is
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* 0x37F, giving:
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*
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* round to nearest
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* 64-bit precision
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* all exceptions masked.
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*
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* FreeBSD/i386 uses 53 bit precision for things like fadd/fsub/fsqrt etc
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* because of the difference between memory and fpu register stack arguments.
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* If its using an intermediate fpu register, it has 80/64 bits to work
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* with. If it uses memory, it has 64/53 bits to work with. However,
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* gcc is aware of this and goes to a fair bit of trouble to make the
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* best use of it.
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*
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* This is mostly academic for AMD64, because the ABI prefers the use
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* SSE2 based math. For FreeBSD/amd64, we go with the default settings.
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*/
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#define __INITIAL_FPUCW__ 0x037F
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#define __INITIAL_FPUCW_I386__ 0x127F
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#define __INITIAL_NPXCW__ __INITIAL_FPUCW_I386__
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#define __INITIAL_MXCSR__ 0x1F80
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#define __INITIAL_MXCSR_MASK__ 0xFFBF
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#endif /* !_X86_FPU_H_ */
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@@ -3,7 +3,7 @@
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#if defined(__INTEL__)
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# include <arch/x86/fenv.h>
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#elif defined(_x86_64_)
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#elif defined(__x86_64__)
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# include <arch/x86_64/fenv.h>
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#elif defined(__ARM__)
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# include <arch/arm/fenv.h>
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@@ -8,7 +8,7 @@ local genericSources =
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;
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MergeObject posix_arch_$(TARGET_ARCH).o :
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#fenv.c
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fenv.c
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sigsetjmp.S
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siglongjmp.S
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@@ -0,0 +1,158 @@
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/*-
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* Copyright (c) 2004-2005 David Schultz <[email protected]>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/cdefs.h>
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#include <sys/types.h>
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#include <posix/fenv.h>
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#include <arch/x86_64/fpu.h>
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const fenv_t __fe_dfl_env = {
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{ 0xffff0000 | __INITIAL_FPUCW__,
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0xffff0000,
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0xffffffff,
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{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff }
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},
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__INITIAL_MXCSR__
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};
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extern inline int feclearexcept(int __excepts);
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extern inline int fegetexceptflag(fexcept_t *__flagp, int __excepts);
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int
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fesetexceptflag(const fexcept_t *flagp, int excepts)
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{
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fenv_t env;
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__fnstenv(&env.__x87);
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env.__x87.__status &= ~excepts;
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env.__x87.__status |= *flagp & excepts;
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__fldenv(env.__x87);
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__stmxcsr(&env.__mxcsr);
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env.__mxcsr &= ~excepts;
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env.__mxcsr |= *flagp & excepts;
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__ldmxcsr(env.__mxcsr);
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return (0);
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}
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int
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feraiseexcept(int excepts)
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{
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fexcept_t ex = excepts;
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fesetexceptflag(&ex, excepts);
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__fwait();
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return (0);
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}
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extern inline int fetestexcept(int __excepts);
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extern inline int fegetround(void);
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extern inline int fesetround(int __round);
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int
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fegetenv(fenv_t *envp)
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{
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__fnstenv(&envp->__x87);
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__stmxcsr(&envp->__mxcsr);
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/*
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* fnstenv masks all exceptions, so we need to restore the
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* control word to avoid this side effect.
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*/
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__fldcw(envp->__x87.__control);
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return (0);
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}
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int
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feholdexcept(fenv_t *envp)
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{
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uint32_t mxcsr;
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__stmxcsr(&mxcsr);
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__fnstenv(&envp->__x87);
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__fnclex();
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envp->__mxcsr = mxcsr;
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mxcsr &= ~FE_ALL_EXCEPT;
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mxcsr |= FE_ALL_EXCEPT << _SSE_EMASK_SHIFT;
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__ldmxcsr(mxcsr);
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return (0);
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}
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extern inline int fesetenv(const fenv_t *__envp);
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int
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feupdateenv(const fenv_t *envp)
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{
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uint32_t mxcsr;
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uint16_t status;
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__fnstsw(&status);
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__stmxcsr(&mxcsr);
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fesetenv(envp);
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feraiseexcept((mxcsr | status) & FE_ALL_EXCEPT);
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return (0);
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}
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int
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__feenableexcept(int mask)
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{
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uint32_t mxcsr, omask;
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uint16_t control;
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mask &= FE_ALL_EXCEPT;
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__fnstcw(&control);
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__stmxcsr(&mxcsr);
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omask = ~(control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT;
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control &= ~mask;
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__fldcw(control);
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mxcsr &= ~(mask << _SSE_EMASK_SHIFT);
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__ldmxcsr(mxcsr);
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return (omask);
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}
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int
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__fedisableexcept(int mask)
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{
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uint32_t mxcsr, omask;
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uint16_t control;
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mask &= FE_ALL_EXCEPT;
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__fnstcw(&control);
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__stmxcsr(&mxcsr);
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omask = ~(control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT;
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control |= mask;
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__fldcw(control);
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mxcsr |= mask << _SSE_EMASK_SHIFT;
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__ldmxcsr(mxcsr);
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return (omask);
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}
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__weak_reference(__feenableexcept, feenableexcept);
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__weak_reference(__fedisableexcept, fedisableexcept);
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