Some ppc fixes for #4115, patch by kallisti5 (without the #ifdef _BOOT_MODE):

- stubbed out arch_cpu_init_percpu(),
- make atomic ops declarations extern "C",
- move calls to [i]sync inside the asm code that needs it.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@32067 a95241bf-73f2-0310-859d-f6bbb57e9c96

headers/private/kernel/user_atomic.h

@@ -9,6 +9,10 @@
  * in userspace, they are implemented as these syscalls.
  */
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 int32 _user_atomic_set(vint32 *value, int32 newValue);
 int32 _user_atomic_test_and_set(vint32 *value, int32 newValue, int32 testAgainst);
 int32 _user_atomic_add(vint32 *value, int32 addValue);
@@ -23,4 +27,9 @@ int64 _user_atomic_and64(vint64 *value, int64 andValue);
 int64 _user_atomic_or64(vint64 *value, int64 orValue);	
 int64 _user_atomic_get64(vint64 *value);
 
+#ifdef __cplusplus
+}
+#endif
+
+
 #endif	/* _KERNEL_USER_ATOMIC_H */

src/system/boot/platform/openfirmware/arch/ppc/mmu.cpp

@@ -991,12 +991,8 @@ arch_mmu_init(void)
 	// set up new page table and turn on translation again
 
 	for (int32 i = 0; i < 16; i++) {
-		isync();
-
 		ppc_set_segment_register((void *)(i * 0x10000000), sSegments[i]);
 			// one segment describes 256 MB of memory
-
-		ppc_sync();
 	}
 
 	ppc_set_page_table(physicalTable, tableSize);

src/system/kernel/arch/ppc/arch_asm.S

@@ -26,6 +26,7 @@ FUNCTION(arch_int_enable_interrupts):
 		// sets bit 15, EE
 
 	mtmsr	%r3							// put it back into the msr
+	isync
 	blr
 
 
@@ -40,6 +41,7 @@ FUNCTION(arch_int_disable_interrupts):
 		// clears bit 15, EE
 
 	mtmsr	%r4							// put it back into the msr
+	isync
 	blr
 
 
@@ -53,6 +55,7 @@ FUNCTION(arch_int_restore_interrupts):
 		// clear or set bit 15, EE to the same state as in r3, oldState
 
 	mtmsr	%r4
+	isync
 	blr
 
 /* bool arch_int_are_interrupts_enabled(void) */
@@ -175,7 +178,9 @@ FUNCTION(gethid0):
 
 // void sethid0(unsigned int val);
 FUNCTION(sethid0):
+	isync
 	mtspr		1008, %r3
+	isync
 	blr
 
 // unsigned int getl2cr();
@@ -185,7 +190,9 @@ FUNCTION(getl2cr):
 
 // void setl2cr(unsigned int val);
 FUNCTION(setl2cr):
+	isync
 	mtspr		1017, %r3
+	isync
 	blr
 
 	

src/system/kernel/arch/ppc/arch_cpu.cpp

@@ -47,6 +47,16 @@ arch_cpu_init_post_vm(kernel_args *args)
 	return B_OK;
 }
 
+status_t
+arch_cpu_init_percpu(kernel_args *args, int curr_cpu)
+{
+        //detect_cpu(curr_cpu);
+
+        // we only support one on ppc anyway at the moment...
+	//XXX: WRITEME
+        return 0;
+}
+
 status_t
 arch_cpu_init_post_modules(kernel_args *args)
 {

src/system/kernel/arch/ppc/arch_cpu_asm.S

@@ -31,7 +31,9 @@ FUNCTION(get_sr):
  *			   r3					 r4
  */
 FUNCTION(set_sr):
+	isync
 	mtsrin	%r4, %r3
+	isync
 	blr
 
 /* uint32 get_msr(void);
@@ -45,6 +47,7 @@ FUNCTION(get_msr):
  */
 FUNCTION(set_msr):
 	mtmsr	%r3
+	isync
 	blr
 
 /* uint32 get_pvr(void);