modified the 100kHz timing inside the DDC common accelerant code. If delays with values near the timer resolution are required, the values should always have one resolution step added since otherwise the minimum delay isn't quaranteed. the 400khz timing needs fixing as well I guess... This modification fixes at least ticket #4084 where a DDC monitor isn't detected otherwise.

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@32540 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Rudolf Cornelissen
2009-08-20 16:41:39 +00:00
parent f72c42f862
commit 4caccc456d
+4 -4
View File
@@ -33,10 +33,10 @@ const static i2c_timing kTiming100k = {
.low = 5,
.high = 4,
.su_sta = 5,
.hd_dat = 0,
.su_dat = 1,
.r = 1,
.f = 1,
.hd_dat = 1,
.su_dat = 2,
.r = 2,
.f = 2,
.su_sto = 4,
// as these are unspecified, we use half a clock cycle as a safe guess