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@@ -3,7 +3,7 @@
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* Distributed under the terms of the MIT License.
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*
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* Support for i915 chipset and up based on the X driver,
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* Copyright 2006 Intel Corporation.
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* Copyright 2006-2007 Intel Corporation.
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*
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* Authors:
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* Axel Dörfler, [email protected]
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@@ -18,6 +18,7 @@
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#include <string.h>
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#include <math.h>
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#include <create_display_modes.h>
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#include <ddc.h>
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#include <edid.h>
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@@ -31,12 +32,6 @@ extern "C" void _sPrintf(const char *format, ...);
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#endif
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#define POSITIVE_SYNC \
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(B_POSITIVE_HSYNC | B_POSITIVE_VSYNC)
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#define MODE_FLAGS \
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(B_8_BIT_DAC | B_HARDWARE_CURSOR | B_PARALLEL_ACCESS | B_DPMS | B_SUPPORTS_OVERLAYS)
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struct display_registers {
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uint32 pll;
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uint32 divisors;
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@@ -73,45 +68,6 @@ struct pll_limits {
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uint32 max_vco;
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};
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static const display_mode kBaseModeList[] = {
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{{25175, 640, 656, 752, 800, 350, 387, 389, 449, B_POSITIVE_HSYNC}, B_CMAP8, 640, 350, 0, 0, MODE_FLAGS}, /* 640x350 - www.epanorama.net/documents/pc/vga_timing.html) */
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{{25175, 640, 656, 752, 800, 400, 412, 414, 449, B_POSITIVE_VSYNC}, B_CMAP8, 640, 400, 0, 0, MODE_FLAGS}, /* 640x400 - www.epanorama.net/documents/pc/vga_timing.html) */
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{{25175, 640, 656, 752, 800, 480, 490, 492, 525, 0}, B_CMAP8, 640, 480, 0, 0, MODE_FLAGS}, /* Vesa_Monitor_@60Hz_(640X480X8.Z1) */
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{{27500, 640, 672, 768, 864, 480, 488, 494, 530, 0}, B_CMAP8, 640, 480, 0, 0, MODE_FLAGS}, /* 640X480X60Hz */
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{{30500, 640, 672, 768, 864, 480, 517, 523, 588, 0}, B_CMAP8, 640, 480, 0, 0, MODE_FLAGS}, /* SVGA_640X480X60HzNI */
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{{31500, 640, 664, 704, 832, 480, 489, 492, 520, 0}, B_CMAP8, 640, 480, 0, 0, MODE_FLAGS}, /* Vesa_Monitor_@70-72Hz_(640X480X8.Z1) */
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{{31500, 640, 656, 720, 840, 480, 481, 484, 500, 0}, B_CMAP8, 640, 480, 0, 0, MODE_FLAGS}, /* Vesa_Monitor_@75Hz_(640X480X8.Z1) */
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{{36000, 640, 696, 752, 832, 480, 481, 484, 509, 0}, B_CMAP8, 640, 480, 0, 0, MODE_FLAGS}, /* Vesa_Monitor_@85Hz_(640X480X8.Z1) */
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{{38100, 800, 832, 960, 1088, 600, 602, 606, 620, 0}, B_CMAP8, 800, 600, 0, 0, MODE_FLAGS}, /* SVGA_800X600X56HzNI */
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{{40000, 800, 840, 968, 1056, 600, 601, 605, 628, POSITIVE_SYNC}, B_CMAP8, 800, 600, 0, 0, MODE_FLAGS}, /* Vesa_Monitor_@60Hz_(800X600X8.Z1) */
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{{49500, 800, 816, 896, 1056, 600, 601, 604, 625, POSITIVE_SYNC}, B_CMAP8, 800, 600, 0, 0, MODE_FLAGS}, /* Vesa_Monitor_@75Hz_(800X600X8.Z1) */
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{{50000, 800, 856, 976, 1040, 600, 637, 643, 666, POSITIVE_SYNC}, B_CMAP8, 800, 600, 0, 0, MODE_FLAGS}, /* Vesa_Monitor_@70-72Hz_(800X600X8.Z1) */
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{{56250, 800, 832, 896, 1048, 600, 601, 604, 631, POSITIVE_SYNC}, B_CMAP8, 800, 600, 0, 0, MODE_FLAGS}, /* Vesa_Monitor_@85Hz_(800X600X8.Z1) */
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{{65000, 1024, 1048, 1184, 1344, 768, 771, 777, 806, 0}, B_CMAP8, 1024, 768, 0, 0, MODE_FLAGS}, /* Vesa_Monitor_@60Hz_(1024X768X8.Z1) */
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{{75000, 1024, 1048, 1184, 1328, 768, 771, 777, 806, 0}, B_CMAP8, 1024, 768, 0, 0, MODE_FLAGS}, /* Vesa_Monitor_@70-72Hz_(1024X768X8.Z1) */
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{{78750, 1024, 1040, 1136, 1312, 768, 769, 772, 800, POSITIVE_SYNC}, B_CMAP8, 1024, 768, 0, 0, MODE_FLAGS}, /* Vesa_Monitor_@75Hz_(1024X768X8.Z1) */
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{{94500, 1024, 1072, 1168, 1376, 768, 769, 772, 808, POSITIVE_SYNC}, B_CMAP8, 1024, 768, 0, 0, MODE_FLAGS}, /* Vesa_Monitor_@85Hz_(1024X768X8.Z1) */
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{{94200, 1152, 1184, 1280, 1472, 864, 865, 868, 914, POSITIVE_SYNC}, B_CMAP8, 1152, 864, 0, 0, MODE_FLAGS}, /* Vesa_Monitor_@70Hz_(1152X864X8.Z1) */
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{{108000, 1152, 1216, 1344, 1600, 864, 865, 868, 900, POSITIVE_SYNC}, B_CMAP8, 1152, 864, 0, 0, MODE_FLAGS}, /* Vesa_Monitor_@75Hz_(1152X864X8.Z1) */
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{{121500, 1152, 1216, 1344, 1568, 864, 865, 868, 911, POSITIVE_SYNC}, B_CMAP8, 1152, 864, 0, 0, MODE_FLAGS}, /* Vesa_Monitor_@85Hz_(1152X864X8.Z1) */
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{{108000, 1280, 1328, 1440, 1688, 1024, 1025, 1028, 1066, POSITIVE_SYNC}, B_CMAP8, 1280, 1024, 0, 0, MODE_FLAGS}, /* Vesa_Monitor_@60Hz_(1280X1024X8.Z1) */
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{{135000, 1280, 1296, 1440, 1688, 1024, 1025, 1028, 1066, POSITIVE_SYNC}, B_CMAP8, 1280, 1024, 0, 0, MODE_FLAGS}, /* Vesa_Monitor_@75Hz_(1280X1024X8.Z1) */
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{{157500, 1280, 1344, 1504, 1728, 1024, 1025, 1028, 1072, POSITIVE_SYNC}, B_CMAP8, 1280, 1024, 0, 0, MODE_FLAGS}, /* Vesa_Monitor_@85Hz_(1280X1024X8.Z1) */
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{{106500, 1440, 1520, 1672, 1904, 900, 901, 904, 932, POSITIVE_SYNC}, B_CMAP8, 1440, 900, 0, 0, MODE_FLAGS}, /* Vesa_Monitor_@60Hz_(1440X900) */
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{{162000, 1600, 1664, 1856, 2160, 1200, 1201, 1204, 1250, POSITIVE_SYNC}, B_CMAP8, 1600, 1200, 0, 0, MODE_FLAGS}, /* Vesa_Monitor_@60Hz_(1600X1200X8.Z1) */
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{{175500, 1600, 1664, 1856, 2160, 1200, 1201, 1204, 1250, POSITIVE_SYNC}, B_CMAP8, 1600, 1200, 0, 0, MODE_FLAGS}, /* Vesa_Monitor_@65Hz_(1600X1200X8.Z1) */
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{{189000, 1600, 1664, 1856, 2160, 1200, 1201, 1204, 1250, POSITIVE_SYNC}, B_CMAP8, 1600, 1200, 0, 0, MODE_FLAGS}, /* Vesa_Monitor_@70Hz_(1600X1200X8.Z1) */
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{{202500, 1600, 1664, 1856, 2160, 1200, 1201, 1204, 1250, POSITIVE_SYNC}, B_CMAP8, 1600, 1200, 0, 0, MODE_FLAGS}, /* Vesa_Monitor_@75Hz_(1600X1200X8.Z1) */
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{{216000, 1600, 1664, 1856, 2160, 1200, 1201, 1204, 1250, POSITIVE_SYNC}, B_CMAP8, 1600, 1200, 0, 0, MODE_FLAGS}, /* Vesa_Monitor_@80Hz_(1600X1200X8.Z1) */
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{{229500, 1600, 1664, 1856, 2160, 1200, 1201, 1204, 1250, POSITIVE_SYNC}, B_CMAP8, 1600, 1200, 0, 0, MODE_FLAGS}, /* Vesa_Monitor_@85Hz_(1600X1200X8.Z1) */
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{{147100, 1680, 1784, 1968, 2256, 1050, 1051, 1054, 1087, POSITIVE_SYNC}, B_CMAP8, 1680, 1050, 0, 0, MODE_FLAGS}, /* Vesa_Monitor_@60Hz_(1680X1050) */
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};
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static const uint32 kNumBaseModes = sizeof(kBaseModeList) / sizeof(display_mode);
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static const uint32 kMaxNumModes = kNumBaseModes * 4;
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static status_t
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get_i2c_signals(void* cookie, int* _clock, int* _data)
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@@ -189,55 +145,37 @@ set_frame_buffer_base()
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}
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/*!
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Creates the initial mode list of the primary accelerant.
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/*! Creates the initial mode list of the primary accelerant.
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It's called from intel_init_accelerant().
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*/
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status_t
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create_mode_list(void)
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{
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color_space spaces[4] = {B_RGB32_LITTLE, B_RGB16_LITTLE, B_RGB15_LITTLE, B_CMAP8};
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size_t size = ROUND_TO_PAGE_SIZE(kMaxNumModes * sizeof(display_mode));
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display_mode *list;
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gInfo->mode_list_area = create_area("intel extreme modes", (void **)&list, B_ANY_ADDRESS,
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size, B_NO_LOCK, B_READ_AREA | B_WRITE_AREA);
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if (gInfo->mode_list_area < B_OK)
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return gInfo->mode_list_area;
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// for now, just copy all of the modes with different color spaces
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const display_mode *source = kBaseModeList;
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uint32 count = 0;
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for (uint32 i = 0; i < kNumBaseModes; i++) {
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for (uint32 j = 0; j < (sizeof(spaces) / sizeof(color_space)); j++) {
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list[count] = *source;
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list[count].space = spaces[j];
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count++;
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}
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source++;
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}
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gInfo->mode_list = list;
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gInfo->shared_info->mode_list_area = gInfo->mode_list_area;
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gInfo->shared_info->mode_count = count;
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edid1_info edid;
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i2c_bus bus;
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bus.cookie = (void*)INTEL_I2C_IO_A;
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bus.set_signals = &set_i2c_signals;
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bus.get_signals = &get_i2c_signals;
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ddc2_init_timing(&bus);
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if (ddc2_read_edid1(&bus, &edid, NULL, NULL) == B_OK) {
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edid_dump(&edid);
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if (ddc2_read_edid1(&bus, &gInfo->edid_info, NULL, NULL) == B_OK) {
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edid_dump(&gInfo->edid_info);
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gInfo->has_edid = true;
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} else {
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TRACE(("intel_extreme: getting EDID failed!\n"));
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}
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display_mode *list;
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uint32 count = 0;
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gInfo->mode_list_area = create_display_modes("intel extreme modes",
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gInfo->has_edid ? &gInfo->edid_info : NULL, NULL, 0, NULL, 0, NULL,
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&list, &count);
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if (gInfo->mode_list_area < B_OK)
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return gInfo->mode_list_area;
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gInfo->mode_list = list;
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gInfo->shared_info->mode_list_area = gInfo->mode_list_area;
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gInfo->shared_info->mode_count = count;
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return B_OK;
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}
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@@ -454,7 +392,6 @@ intel_set_display_mode(display_mode *mode)
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uint32 colorMode, bytesPerRow, bitsPerPixel;
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get_color_space_format(target, colorMode, bytesPerRow, bitsPerPixel);
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debug_printf("new resolution: %ux%ux%lu\n", target.timing.h_display, target.timing.v_display, bitsPerPixel);
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#if 0
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static bool first = true;
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if (first) {
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@@ -472,7 +409,6 @@ if (first) {
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first = false;
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}
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#endif
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//return B_ERROR;
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intel_shared_info &sharedInfo = *gInfo->shared_info;
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Autolock locker(sharedInfo.accelerant_lock);
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@@ -541,7 +477,6 @@ if (first) {
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pll |= DISPLAY_PLL_POST1_DIVIDE_2;
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}
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debug_printf("PLL is %#lx, write: %#lx\n", read32(INTEL_DISPLAY_A_PLL), pll);
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write32(INTEL_DISPLAY_A_PLL, pll);
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read32(INTEL_DISPLAY_A_PLL);
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spin(150);
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@@ -710,6 +645,22 @@ intel_get_display_mode(display_mode *_currentMode)
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return B_OK;
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}
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#ifdef __HAIKU__
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status_t
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intel_get_edid_info(void* info, size_t size, uint32* _version)
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{
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if (!gInfo->has_edid)
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return B_ERROR;
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if (size < sizeof(struct edid1_info))
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return B_BUFFER_OVERFLOW;
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memcpy(info, &gInfo->edid_info, sizeof(struct edid1_info));
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*_version = EDID_VERSION_1;
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return B_OK;
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}
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#endif // __HAIKU__
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status_t
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intel_get_frame_buffer_config(frame_buffer_config *config)
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