kernel/arm: reserve interrupts for GICv2

This works similarly on the 32-bit and 64-bit ARM port.

Other architectures call reserve_io_interrupt_vectors() when
initializing the interrupt controller (e.g. PIC, APIC etc.)
so let's do the same on ARM.

Change-Id: If5a360cf23fd01d97d2f20702785bc5da0190052
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5566
Tested-by: Commit checker robot <[email protected]>
Reviewed-by: Fredrik Holmqvist <[email protected]>

src/system/kernel/arch/arm/arch_int_gicv2.cpp

@@ -14,6 +14,8 @@
 GICv2InterruptController::GICv2InterruptController(uint32_t gicd_addr, uint32_t gicc_addr)
 : InterruptController()
 {
+	reserve_io_interrupt_vectors(1020, 0, INTERRUPT_TYPE_IRQ);
+
 	area_id gicd_area = vm_map_physical_memory(B_SYSTEM_TEAM, "intc-gicv2-gicd",
 		(void**)&fGicdRegs, B_ANY_KERNEL_ADDRESS, GICD_REG_SIZE,
 		B_KERNEL_READ_AREA | B_KERNEL_WRITE_AREA,

src/system/kernel/arch/arm/arch_timer_generic.cpp

@@ -81,7 +81,6 @@ ARMGenericTimer::ARMGenericTimer()
 {
 	Clear();
 
-	reserve_io_interrupt_vectors(1, TIMER_IRQ, INTERRUPT_TYPE_IRQ);
 	install_io_interrupt_handler(TIMER_IRQ,
 		&ARMGenericTimer::_InterruptWrapper, this, 0);
 

src/system/kernel/arch/arm64/arch_int.cpp

@@ -63,7 +63,6 @@ arch_int_assign_to_cpu(int32 irq, int32 cpu)
 status_t
 arch_int_init(kernel_args *args)
 {
-	reserve_io_interrupt_vectors(128, 32, INTERRUPT_TYPE_IRQ);
 	return B_OK;
 }
 

src/system/kernel/arch/arm64/arch_timer.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright 2019 Haiku, Inc. All Rights Reserved.
+ * Copyright 2019-2022 Haiku, Inc. All Rights Reserved.
  * Distributed under the terms of the MIT License.
  */
 #include <boot/stage2.h>
@@ -53,7 +53,6 @@ arch_init_timer(kernel_args *args)
 	sTimerMaxInterval = INT32_MAX / sTimerTicksUS;
 
 	WRITE_SPECIALREG(CNTP_CTL_EL0, TIMER_MASKED);
-	reserve_io_interrupt_vectors(1, TIMER_IRQ, INTERRUPT_TYPE_IRQ);
 	install_io_interrupt_handler(TIMER_IRQ, &arch_timer_interrupt, NULL, 0);
 
 	return B_OK;