intel_extreme: Clean up PLL reg defines
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@@ -467,7 +467,7 @@ struct intel_free_graphics_memory {
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#define GEN4_HDMI_PORT_B (0x1140 | REGS_NORTH_PIPE_AND_PORT)
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#define GEN4_HDMI_PORT_C (0x1160 | REGS_NORTH_PIPE_AND_PORT)
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#define GEN4_HDMI_PORT_D (0x116C | REGS_NORTH_PIPE_AND_PORT)
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#define CHV_HDMI_PORT_D (0x116C | REGS_NORTH_PIPE_AND_PORT)
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#define INTEL_DISPLAY_PORT_A (0x4000 | REGS_NORTH_PIPE_AND_PORT)
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#define INTEL_DISPLAY_PORT_B (0x4100 | REGS_NORTH_PIPE_AND_PORT)
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@@ -539,10 +539,12 @@ struct intel_free_graphics_memory {
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// PLL registers
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#define INTEL_DISPLAY_A_PLL (0x6014 | REGS_SOUTH_SHARED)
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#define INTEL_DISPLAY_B_PLL (0x6018 | REGS_SOUTH_SHARED)
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#define INTEL_DISPLAY_A_PLL_MULTIPLIER_DIVISOR \
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(0x601c | REGS_SOUTH_SHARED)
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#define INTEL_DISPLAY_B_PLL_MULTIPLIER_DIVISOR \
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(0x6020 | REGS_SOUTH_SHARED)
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#define CHV_DISPLAY_C_PLL (0x6030 | REGS_SOUTH_SHARED)
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#define INTEL_DISPLAY_A_PLL_MULTIPLIER_DIVISOR (INTEL_DISPLAY_A_PLL + 0x8)
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#define INTEL_DISPLAY_B_PLL_MULTIPLIER_DIVISOR (INTEL_DISPLAY_B_PLL + 0x8)
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#define CHV_DISPLAY_C_PLL_MULTIPLIER_DIVISOR (CHV_DISPLAY_C_PLL + 0xc)
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#define INTEL_DISPLAY_A_PLL_DIVISOR_0 (0x6040 | REGS_SOUTH_SHARED)
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#define INTEL_DISPLAY_A_PLL_DIVISOR_1 (0x6044 | REGS_SOUTH_SHARED)
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#define INTEL_DISPLAY_B_PLL_DIVISOR_0 (0x6048 | REGS_SOUTH_SHARED)
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