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intel_extreme: Correct LVDS DPLL mode on gen 3

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Alexander von Gluck IV
2016-01-03 15:22:38 -06:00
parent 2bf16c66b5
commit 5b0b486be4
1 changed files with 1 additions and 1 deletions
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src/add-ons/accelerants/intel_extreme/Ports.cpp
+1 -1
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@@ -556,7 +556,7 @@ LVDSPort::SetDisplayMode(display_mode* target, uint32 colorMode)
uint32 extraPLLFlags = 0; uint32 extraPLLFlags = 0;
// DPLL mode LVDS for i915+ // DPLL mode LVDS for i915+
if (gInfo->shared_info->device_type.Generation() >= 4) if (gInfo->shared_info->device_type.Generation() >= 3)
extraPLLFlags |= DISPLAY_PLL_MODE_LVDS; extraPLLFlags |= DISPLAY_PLL_MODE_LVDS;
// Program pipe PLL's (pixel_clock is *always* the hardware pixel clock) // Program pipe PLL's (pixel_clock is *always* the hardware pixel clock)