ac97 capabilities detection,
special Realtek ALC650 support. git-svn-id: file:///srv/svn/repos/haiku/trunk/current@3184 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
beveloper
@@ -85,6 +85,7 @@ typedef struct
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void default_init(ac97_dev *dev);
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void ad1886_init(ac97_dev *dev);
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void alc650_init(ac97_dev *dev);
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void default_amp_enable(ac97_dev *dev, bool onoff);
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void cs4299_amp_enable(ac97_dev *dev, bool onoff);
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@@ -94,6 +95,7 @@ bool default_reg_is_valid(ac97_dev *dev, uint8 reg);
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codec_ops default_ops = { default_init, default_amp_enable, default_reg_is_valid };
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codec_ops ad1886_ops = { ad1886_init, default_amp_enable, default_reg_is_valid };
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codec_ops cs4299_ops = { default_init, cs4299_amp_enable, default_reg_is_valid };
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codec_ops alc650_ops = { alc650_init, default_amp_enable, default_reg_is_valid };
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codec_table codecs[] =
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{
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@@ -144,14 +146,8 @@ codec_table codecs[] =
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{ 0x41445372, 0xffffffff, &default_ops, "Analog Devices AD1981A SoundMAX"B_UTF8_REGISTERED },
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{ 0x414c4320, 0xfffffff0, &default_ops, "Avance Logic (Realtek) ALC100/ALC100P, RL5383/RL5522" },
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{ 0x414c4730, 0xffffffff, &default_ops, "Avance Logic (Realtek) ALC101" },
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#if 0
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{ 0x414c4710, 0xffffffff, &default_ops, "Avance Logic (Realtek) ALC200/ALC200A" }, /* datasheet says id2 = 4710 */
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{ 0x414c4710, 0xffffffff, &default_ops, "Avance Logic (Realtek) ALC201/ALC201A" }, /* 4710 or 4720 */
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{ 0x414c4720, 0xffffffff, &default_ops, "Avance Logic (Realtek) ALC650" }, /* datasheet says id2 = 4720 */
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#else
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{ 0x414c4710, 0xffffffff, &default_ops, "Avance Logic (Realtek) ALC200/ALC200A or ALC201/ALC201A" },
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{ 0x414c4720, 0xffffffff, &default_ops, "Avance Logic (Realtek) ALC650 or ALC201/ALC201A" },
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#endif
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{ 0x414c4710, 0xffffffff, &default_ops, "Avance Logic (Realtek) ALC200/ALC200A, ALC201/ALC201A" }, /* 0x4710 = ALC201 */
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{ 0x414c4720, 0xffffffff, &alc650_ops, "Avance Logic (Realtek) ALC650" }, /* 0x4720 = ALC650 */
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{ 0x414c4740, 0xffffffff, &default_ops, "Avance Logic (Realtek) ALC202/ALC202A" },
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/* Vendors only: */
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{ 0x41445300, 0xffffff00, &default_ops, "Analog Devices" },
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@@ -205,13 +201,28 @@ ac97_attach(ac97_dev **_dev, codec_reg_read reg_read, codec_reg_write reg_write,
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LOG(("codec reset\n"));
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ac97_reg_uncached_write(dev, AC97_RESET, 0x0000);
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snooze(50000); // 50 ms
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dev->codec_3d_stereo_enhancement = stereo_enhancement_technique[(ac97_reg_cached_read(dev, AC97_RESET) >> 10) & 31];
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dev->capabilities = 0;
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ac97_reg_update_bits(dev, AC97_EXTENDED_STAT_CTRL, 1, 1); // enable variable rate audio
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ac97_detect_capabilities(dev);
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dev->init(dev);
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dev->amp_enable(dev, true);
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ac97_reg_update_bits(dev, 0x2a, 1, 1); // enable VRA
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dev->codec_3d_stereo_enhancement = stereo_enhancement_technique[(ac97_reg_cached_read(dev, AC97_RESET) >> 10) & 31];
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/* set defaults, PCM-out and CD-out enabled */
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ac97_reg_update(dev, AC97_CENTER_LFE_VOLUME, 0x0000); /* set LFE & center volume 0dB */
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ac97_reg_update(dev, AC97_SURR_VOLUME, 0x0000); /* set surround volume 0dB */
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ac97_reg_update(dev, AC97_MASTER_VOLUME, 0x0000); /* set master output 0dB */
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ac97_reg_update(dev, AC97_AUX_OUT_VOLUME, 0x0000); /* set aux output 0dB */
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ac97_reg_update(dev, AC97_MONO_VOLUME, 0x0000); /* set mono output 0dB */
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ac97_reg_update(dev, AC97_CD_VOLUME, 0x0808); /* enable cd */
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ac97_reg_update(dev, AC97_PCM_OUT_VOLUME, 0x0808); /* enable pcm */
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ac97_dump_capabilities(dev);
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}
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void
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@@ -296,11 +307,18 @@ ac97_set_rate(ac97_dev *dev, uint8 reg, uint32 rate)
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{
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uint32 value;
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uint32 old;
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value = (rate * dev->clock) / 48000;
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LOG(("ac97_set_rate: clock = %d, rate = %d, value = %d\n",dev->clock, rate, value));
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value = (uint32)((rate * (uint64)dev->clock) / 48000); /* use 64 bit calculation for rates 96000 or higher */
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LOG(("ac97_set_rate: clock = %d, rate = %d, value = %d\n", dev->clock, rate, value));
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/* if double rate audio is currently enabled, divide value by 2 */
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if (ac97_reg_cached_read(dev, AC97_EXTENDED_STAT_CTRL) & 0x0002)
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value /= 2;
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if (value > 0xffff)
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return false;
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old = ac97_reg_cached_read(dev, reg);
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ac97_reg_cached_write(dev, reg, value);
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if (value != ac97_reg_uncached_read(dev, reg)) {
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@@ -312,14 +330,189 @@ ac97_set_rate(ac97_dev *dev, uint8 reg, uint32 rate)
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return true;
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}
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bool
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ac97_get_rate(ac97_dev *dev, uint8 reg, uint32 *rate)
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{
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uint32 value;
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value = ac97_reg_cached_read(dev, reg);
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if (value == 0)
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return false;
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*rate = (value * 48000) / dev->clock;
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return true;
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}
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void
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ac97_set_clock(ac97_dev *dev, uint32 clock)
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{
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LOG(("ac97_set_clock: clock = %d\n", clock));
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dev->clock = clock;
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ac97_detect_rates(dev);
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ac97_dump_capabilities(dev);
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}
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void
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ac97_detect_capabilities(ac97_dev *dev)
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{
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uint16 val;
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val = ac97_reg_cached_read(dev, AC97_RESET);
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if (val & 0x0001)
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dev->capabilities |= CAP_PCM_MIC;
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if (val & 0x0004)
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dev->capabilities |= CAP_BASS_TREBLE_CTRL;
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if (val & 0x0008)
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dev->capabilities |= CAP_SIMULATED_STEREO;
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if (val & 0x0010)
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dev->capabilities |= CAP_HEADPHONE_OUT;
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if (val & 0x0020)
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dev->capabilities |= CAP_LAUDNESS;
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if (val & 0x0040)
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dev->capabilities |= CAP_DAC_18BIT;
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if (val & 0x0080)
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dev->capabilities |= CAP_DAC_20BIT;
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if (val & 0x0100)
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dev->capabilities |= CAP_ADC_18BIT;
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if (val & 0x0200)
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dev->capabilities |= CAP_ADC_20BIT;
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if (val & 0x7C00)
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dev->capabilities |= CAP_3D_ENHANCEMENT;
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val = ac97_reg_cached_read(dev, AC97_EXTENDED_ID);
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if (val & EXID_VRA)
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dev->capabilities |= CAP_VARIABLE_PCM;
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if (val & EXID_DRA)
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dev->capabilities |= CAP_DOUBLE_PCM;
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if (val & EXID_SPDIF)
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dev->capabilities |= CAP_SPDIF;
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if (val & EXID_VRM)
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dev->capabilities |= CAP_VARIABLE_MIC;
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if (val & EXID_CDAC)
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dev->capabilities |= CAP_CENTER_DAC;
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if (val & EXID_SDAC)
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dev->capabilities |= CAP_SURR_DAC;
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if (val & EXID_LDAC)
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dev->capabilities |= CAP_LFE_DAC;
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if (val & EXID_AMAP)
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dev->capabilities |= CAP_AMAP;
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if (val & (EXID_REV0 | EXID_REV1) == 0)
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dev->capabilities |= CAP_REV21;
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if (val & (EXID_REV0 | EXID_REV1) == EXID_REV0)
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dev->capabilities |= CAP_REV22;
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if (val & (EXID_REV0 | EXID_REV1) == EXID_REV1)
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dev->capabilities |= CAP_REV23;
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ac97_detect_rates(dev);
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}
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void
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ac97_detect_rates(ac97_dev *dev)
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{
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uint32 oldrate;
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dev->capabilities &= ~CAP_PCM_RATE_MASK;
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if (!ac97_get_rate(dev, AC97_PCM_FRONT_DAC_RATE, &oldrate))
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oldrate = 48000;
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if (ac97_set_rate(dev, AC97_PCM_FRONT_DAC_RATE, 20000))
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dev->capabilities |= CAP_PCM_RATE_CONTINUOUS;
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if (ac97_set_rate(dev, AC97_PCM_FRONT_DAC_RATE, 8000))
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dev->capabilities |= CAP_PCM_RATE_8000;
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if (ac97_set_rate(dev, AC97_PCM_FRONT_DAC_RATE, 11025))
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dev->capabilities |= CAP_PCM_RATE_11025;
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if (ac97_set_rate(dev, AC97_PCM_FRONT_DAC_RATE, 12000))
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dev->capabilities |= CAP_PCM_RATE_12000;
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if (ac97_set_rate(dev, AC97_PCM_FRONT_DAC_RATE, 16000))
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dev->capabilities |= CAP_PCM_RATE_16000;
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if (ac97_set_rate(dev, AC97_PCM_FRONT_DAC_RATE, 22050))
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dev->capabilities |= CAP_PCM_RATE_22050;
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if (ac97_set_rate(dev, AC97_PCM_FRONT_DAC_RATE, 24000))
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dev->capabilities |= CAP_PCM_RATE_24000;
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if (ac97_set_rate(dev, AC97_PCM_FRONT_DAC_RATE, 32000))
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dev->capabilities |= CAP_PCM_RATE_32000;
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if (ac97_set_rate(dev, AC97_PCM_FRONT_DAC_RATE, 44100))
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dev->capabilities |= CAP_PCM_RATE_44100;
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if (ac97_set_rate(dev, AC97_PCM_FRONT_DAC_RATE, 48000))
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dev->capabilities |= CAP_PCM_RATE_48000;
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if (ac97_set_rate(dev, AC97_PCM_FRONT_DAC_RATE, 48000))
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dev->capabilities |= CAP_PCM_RATE_48000;
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if (ac97_set_rate(dev, AC97_PCM_FRONT_DAC_RATE, 88200))
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dev->capabilities |= CAP_PCM_RATE_88200;
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if (ac97_set_rate(dev, AC97_PCM_FRONT_DAC_RATE, 96000))
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dev->capabilities |= CAP_PCM_RATE_96000;
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ac97_set_rate(dev, AC97_PCM_FRONT_DAC_RATE, oldrate);
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}
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void
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ac97_dump_capabilities(ac97_dev *dev)
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{
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LOG(("AC97 capabilities:\n"));
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if (dev->capabilities & CAP_PCM_MIC)
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LOG(("CAP_PCM_MIC\n"));
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if (dev->capabilities & CAP_BASS_TREBLE_CTRL)
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LOG(("CAP_BASS_TREBLE_CTRL\n"));
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if (dev->capabilities & CAP_SIMULATED_STEREO)
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LOG(("CAP_SIMULATED_STEREO\n"));
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if (dev->capabilities & CAP_HEADPHONE_OUT)
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LOG(("CAP_HEADPHONE_OUT\n"));
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if (dev->capabilities & CAP_LAUDNESS)
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LOG(("CAP_LAUDNESS\n"));
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if (dev->capabilities & CAP_DAC_18BIT)
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LOG(("CAP_DAC_18BIT\n"));
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if (dev->capabilities & CAP_DAC_20BIT)
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LOG(("CAP_DAC_20BIT\n"));
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if (dev->capabilities & CAP_ADC_18BIT)
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LOG(("CAP_ADC_18BIT\n"));
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if (dev->capabilities & CAP_ADC_20BIT)
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LOG(("CAP_ADC_20BIT\n"));
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if (dev->capabilities & CAP_3D_ENHANCEMENT)
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LOG(("CAP_3D_ENHANCEMENT\n"));
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if (dev->capabilities & CAP_VARIABLE_PCM)
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LOG(("CAP_VARIABLE_PCM\n"));
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if (dev->capabilities & CAP_DOUBLE_PCM)
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LOG(("CAP_DOUBLE_PCM\n"));
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if (dev->capabilities & CAP_VARIABLE_MIC)
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LOG(("CAP_VARIABLE_MIC\n"));
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if (dev->capabilities & CAP_CENTER_DAC)
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LOG(("CAP_CENTER_DAC\n"));
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if (dev->capabilities & CAP_SURR_DAC)
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LOG(("CAP_SURR_DAC\n"));
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if (dev->capabilities & CAP_LFE_DAC)
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LOG(("CAP_LFE_DAC\n"));
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if (dev->capabilities & CAP_AMAP)
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LOG(("CAP_AMAP\n"));
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if (dev->capabilities & CAP_REV21)
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LOG(("CAP_REV21\n"));
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if (dev->capabilities & CAP_REV22)
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LOG(("CAP_REV22\n"));
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if (dev->capabilities & CAP_REV23)
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LOG(("CAP_REV23\n"));
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if (dev->capabilities & CAP_PCM_RATE_CONTINUOUS)
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LOG(("CAP_PCM_RATE_CONTINUOUS\n"));
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if (dev->capabilities & CAP_PCM_RATE_8000)
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LOG(("CAP_PCM_RATE_8000\n"));
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if (dev->capabilities & CAP_PCM_RATE_11025)
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LOG(("CAP_PCM_RATE_11025\n"));
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if (dev->capabilities & CAP_PCM_RATE_12000)
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LOG(("CAP_PCM_RATE_12000\n"));
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if (dev->capabilities & CAP_PCM_RATE_16000)
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LOG(("CAP_PCM_RATE_16000\n"));
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if (dev->capabilities & CAP_PCM_RATE_22050)
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LOG(("CAP_PCM_RATE_22050\n"));
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if (dev->capabilities & CAP_PCM_RATE_24000)
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LOG(("CAP_PCM_RATE_24000\n"));
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if (dev->capabilities & CAP_PCM_RATE_32000)
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LOG(("CAP_PCM_RATE_32000\n"));
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if (dev->capabilities & CAP_PCM_RATE_44100)
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LOG(("CAP_PCM_RATE_44100\n"));
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if (dev->capabilities & CAP_PCM_RATE_48000)
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LOG(("CAP_PCM_RATE_48000\n"));
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if (dev->capabilities & CAP_PCM_RATE_88200)
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LOG(("CAP_PCM_RATE_88200\n"));
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if (dev->capabilities & CAP_PCM_RATE_96000)
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LOG(("CAP_PCM_RATE_96000\n"));
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}
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/*************************************************
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*/
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@@ -390,3 +583,13 @@ void cs4299_amp_enable(ac97_dev *dev, bool yesno)
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else
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ac97_reg_cached_write(dev, 0x68, 0);
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}
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void alc650_init(ac97_dev *dev)
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{
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LOG(("alc650_init\n"));
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/* Surround, LFE and Center downmixed into Line-out,
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* Surround-out is duplicated Line-out.
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*/
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ac97_reg_cached_write(dev, AC97_ALC650_MULTI_CHAN_CTRL, 0x0007);
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}
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@@ -29,6 +29,7 @@
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#define _AC97_H_
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enum AC97_REGISTER {
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/* Baseline audio register set */
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AC97_RESET = 0x00,
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AC97_MASTER_VOLUME = 0x02,
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AC97_AUX_OUT_VOLUME = 0x04,
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@@ -49,11 +50,97 @@ enum AC97_REGISTER {
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AC97_3D_CONTROL = 0x22,
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AC97_PAGING = 0x24,
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AC97_POWERDOWN = 0x26,
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/* Extended audio register set */
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AC97_EXTENDED_ID = 0x28,
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AC97_EXTENDED_STAT_CTRL = 0x2A,
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AC97_PCM_FRONT_DAC_RATE = 0x2C,
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AC97_PCM_SURR_DAC_RATE = 0x2E,
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AC97_PCM_LFE_DAC_RATE = 0x30,
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AC97_PCM_L_R_DAC_RATE = 0x32,
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AC97_MIC_ADC_RATE = 0x34,
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AC97_CENTER_LFE_VOLUME = 0x36,
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AC97_SURR_VOLUME = 0x38,
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AC97_SPDIF_CONTROL = 0x3A,
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/* Vendor ID */
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AC97_VENDOR_ID1 = 0x7C,
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AC97_VENDOR_ID2 = 0x7E
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AC97_VENDOR_ID2 = 0x7E,
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/* Realtek ALC650 */
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AC97_ALC650_SPDIF_INPUT_CHAN_STATUS_LO = 0x60, /* only ALC650 Rev. E and later */
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AC97_ALC650_SPDIF_INPUT_CHAN_STATUS_HI = 0x62, /* only ALC650 Rev. E and later */
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AC97_ALC650_SURR_VOLUME = 0x64,
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AC97_ALC650_CEN_LFE_VOLUME = 0x66,
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AC97_ALC650_MULTI_CHAN_CTRL = 0x6A,
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AC97_ALC650_MISC_CONTROL = 0x74,
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AC97_ALC650_GPIO_SETUP = 0x76,
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AC97_ALC650_GPIO_STATUS = 0x78,
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AC97_ALC650_CLOCK_SOURCE = 0x7A
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};
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// AC97_EXTENDED_ID bits
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enum {
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EXID_VRA = 0x0001,
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EXID_DRA = 0x0002,
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EXID_SPDIF = 0x0004,
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EXID_VRM = 0x0008,
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EXID_DSA0 = 0x0010,
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EXID_DSA1 = 0x0020,
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EXID_CDAC = 0x0040,
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EXID_SDAC = 0x0080,
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EXID_LDAC = 0x0100,
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EXID_AMAP = 0x0200,
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EXID_REV0 = 0x0400,
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EXID_REV1 = 0x0800,
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EXID_bit12 = 0x1000,
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EXID_bit13 = 0x2000,
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EXID_ID0 = 0x4000,
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EXID_ID1 = 0x8000
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};
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// capabilities
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enum {
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CAP_PCM_MIC = 0x0000000000000001ULL, /* dedicated mic PCM channel */
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CAP_BASS_TREBLE_CTRL = 0x0000000000000002ULL,
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CAP_SIMULATED_STEREO = 0x0000000000000004ULL,
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CAP_HEADPHONE_OUT = 0x0000000000000008ULL,
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CAP_LAUDNESS = 0x0000000000000010ULL,
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CAP_DAC_18BIT = 0x0000000000000020ULL,
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CAP_DAC_20BIT = 0x0000000000000040ULL,
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CAP_ADC_18BIT = 0x0000000000000080ULL,
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CAP_ADC_20BIT = 0x0000000000000100ULL,
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CAP_3D_ENHANCEMENT = 0x0000000000000200ULL,
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CAP_VARIABLE_PCM = 0x0000000000000400ULL, /* variable rate PCM */
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CAP_DOUBLE_PCM = 0x0000000000000800ULL, /* double rate PCM */
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CAP_SPDIF = 0x0000000000001000ULL,
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CAP_VARIABLE_MIC = 0x0000000000002000ULL, /* variable rate mic PCM */
|
||||
CAP_CENTER_DAC = 0x0000000000004000ULL,
|
||||
CAP_SURR_DAC = 0x0000000000008000ULL,
|
||||
CAP_LFE_DAC = 0x0000000000010000ULL,
|
||||
CAP_AMAP = 0x0000000000020000ULL,
|
||||
CAP_REV21 = 0x0000000000040000ULL,
|
||||
CAP_REV22 = 0x0000000000080000ULL,
|
||||
CAP_REV23 = 0x0000000000100000ULL,
|
||||
CAP_PCM_RATE_CONTINUOUS = 0x0000000000200000ULL,
|
||||
CAP_PCM_RATE_8000 = 0x0000000000400000ULL,
|
||||
CAP_PCM_RATE_11025 = 0x0000000000800000ULL,
|
||||
CAP_PCM_RATE_12000 = 0x0000000001000000ULL,
|
||||
CAP_PCM_RATE_16000 = 0x0000000002000000ULL,
|
||||
CAP_PCM_RATE_22050 = 0x0000000004000000ULL,
|
||||
CAP_PCM_RATE_24000 = 0x0000000008000000ULL,
|
||||
CAP_PCM_RATE_32000 = 0x00000000100000000ULL,
|
||||
CAP_PCM_RATE_44100 = 0x00000000200000000ULL,
|
||||
CAP_PCM_RATE_48000 = 0x00000000400000000ULL,
|
||||
CAP_PCM_RATE_88200 = 0x00000000800000000ULL,
|
||||
CAP_PCM_RATE_96000 = 0x00000001000000000ULL,
|
||||
CAP_PCM_RATE_MASK = ( CAP_PCM_RATE_CONTINUOUS | CAP_PCM_RATE_8000 | CAP_PCM_RATE_11025 |
|
||||
CAP_PCM_RATE_12000 | CAP_PCM_RATE_16000 | CAP_PCM_RATE_22050 |
|
||||
CAP_PCM_RATE_24000 | CAP_PCM_RATE_32000 | CAP_PCM_RATE_44100 |
|
||||
CAP_PCM_RATE_48000 | CAP_PCM_RATE_88200 | CAP_PCM_RATE_96000)
|
||||
};
|
||||
|
||||
|
||||
struct ac97_dev;
|
||||
typedef struct ac97_dev ac97_dev;
|
||||
|
||||
@@ -71,7 +158,6 @@ typedef struct
|
||||
} codec_ops;
|
||||
|
||||
struct ac97_dev {
|
||||
uint32 capabilities;
|
||||
uint16 reg_cache[0x7f];
|
||||
|
||||
void * cookie;
|
||||
@@ -87,6 +173,8 @@ struct ac97_dev {
|
||||
codec_reg_write reg_write;
|
||||
|
||||
uint32 clock;
|
||||
uint64 capabilities;
|
||||
|
||||
};
|
||||
|
||||
|
||||
@@ -104,8 +192,13 @@ bool ac97_reg_update(ac97_dev *dev, uint8 reg, uint16 value);
|
||||
bool ac97_reg_update_bits(ac97_dev *dev, uint8 reg, uint16 mask, uint16 value);
|
||||
|
||||
bool ac97_set_rate(ac97_dev *dev, uint8 reg, uint32 rate);
|
||||
bool ac97_get_rate(ac97_dev *dev, uint8 reg, uint32 *rate);
|
||||
|
||||
void ac97_set_clock(ac97_dev *dev, uint32 clock);
|
||||
|
||||
void ac97_dump_capabilities(ac97_dev *dev);
|
||||
|
||||
void ac97_detect_capabilities(ac97_dev *dev);
|
||||
void ac97_detect_rates(ac97_dev *dev);
|
||||
|
||||
#endif
|
||||
|
||||
@@ -663,31 +663,6 @@ init_driver(void)
|
||||
/* calibrate the clock */
|
||||
ich_clock_calibrate();
|
||||
|
||||
LOG(("codec master output = %#04x\n", ac97_reg_uncached_read(config->ac97, 0x02)));
|
||||
LOG(("codec aux output = %#04x\n", ac97_reg_uncached_read(config->ac97, 0x04)));
|
||||
LOG(("codec mono output = %#04x\n", ac97_reg_uncached_read(config->ac97, 0x06)));
|
||||
LOG(("codec cd = %#04x\n", ac97_reg_uncached_read(config->ac97, 0x12)));
|
||||
LOG(("codec pcm = %#04x\n", ac97_reg_uncached_read(config->ac97, 0x18)));
|
||||
|
||||
LOG(("writing codec registers\n"));
|
||||
/* enable master output */
|
||||
ac97_reg_update(config->ac97, 0x02, 0x0000);
|
||||
/* enable aux output */
|
||||
ac97_reg_update(config->ac97, 0x04, 0x0000);
|
||||
/* enable mono output */
|
||||
ac97_reg_update(config->ac97, 0x06, 0x0000);
|
||||
|
||||
/* enable cd */
|
||||
ac97_reg_update(config->ac97, 0x12, 0x0808);
|
||||
/* enable pcm */
|
||||
ac97_reg_update(config->ac97, 0x18, 0x0808);
|
||||
|
||||
LOG(("codec master output = %#04x\n", ac97_reg_uncached_read(config->ac97, 0x02)));
|
||||
LOG(("codec aux output = %#04x\n", ac97_reg_uncached_read(config->ac97, 0x04)));
|
||||
LOG(("codec mono output = %#04x\n", ac97_reg_uncached_read(config->ac97, 0x06)));
|
||||
LOG(("codec cd = %#04x\n", ac97_reg_uncached_read(config->ac97, 0x12)));
|
||||
LOG(("codec pcm = %#04x\n", ac97_reg_uncached_read(config->ac97, 0x18)));
|
||||
|
||||
LOG(("init_driver finished!\n"));
|
||||
return B_OK;
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user