iprowifi3945: Replace with the OpenBSD driver.
According to the comments on #19588, this seems to be more reliable than the driver variants from FreeBSD or elsewhere. Change-Id: Icdc24683de3f588f51c4c08529aa6cab3a09c7fd Reviewed-on: https://review.haiku-os.org/c/haiku/+/9311 Reviewed-by: waddlesplash <[email protected]> Tested-by: Commit checker robot <[email protected]>
This commit is contained in:
Augustin Cavalier
committed by
waddlesplash
waddlesplash
parent
91bed92e07
commit
5cfaa09f1f
@@ -1,24 +1,22 @@
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SubDir HAIKU_TOP src add-ons kernel drivers network wlan iprowifi3945 ;
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UseHeaders [ FDirName $(HAIKU_TOP) src libs compat freebsd_network compat ]
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: true ;
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UseHeaders [ FDirName $(HAIKU_TOP) src libs compat freebsd_wlan ] : true ;
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UseHeaders [ FDirName $(HAIKU_TOP) src libs compat openbsd_network compat ] : true ;
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UseHeaders [ FDirName $(HAIKU_TOP) src libs compat openbsd_wlan ] : true ;
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UseHeaders [ FDirName $(HAIKU_TOP) src libs compat freebsd_network compat ] : true ;
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UsePrivateHeaders net system ;
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UsePrivateKernelHeaders ;
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SubDirCcFlags [ FDefines _KERNEL=1 FBSD_DRIVER=1 _XOPEN_SOURCE ]
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-Wno-format
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-Wno-unused
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-Wno-uninitialized ;
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SubDirCcFlags [ FDefines _KERNEL=1 _XOPEN_SOURCE ]
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-Wno-unused -Wno-sign-compare ;
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UseHeaders [ FDirName $(SUBDIR) ] : true ;
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SEARCH_SOURCE += [ FDirName $(SUBDIR) dev wpi ] ;
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SEARCH_SOURCE += [ FDirName $(SUBDIR) dev pci ] ;
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KernelAddon iprowifi3945 :
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if_wpi.c
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glue.c
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:
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freebsd_wlan.a
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openbsd_wlan.a
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libfreebsd_network.a
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;
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File diff suppressed because it is too large
Load Diff
+141
-333
@@ -1,6 +1,7 @@
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/* $OpenBSD: if_wpireg.h,v 1.28 2013/11/26 20:33:17 deraadt Exp $ */
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/*-
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* Copyright (c) 2006,2007
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* Copyright (c) 2006-2008
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* Damien Bergamini <damien.bergamini@free.fr>
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*
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* Permission to use, copy, modify, and distribute this software for any
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@@ -19,52 +20,37 @@
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#define WPI_TX_RING_COUNT 256
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#define WPI_TX_RING_LOMARK 192
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#define WPI_TX_RING_HIMARK 224
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#ifdef DIAGNOSTIC
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#define WPI_RX_RING_COUNT_LOG 8
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#else
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#define WPI_RX_RING_COUNT_LOG 6
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#endif
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#define WPI_RX_RING_COUNT (1 << WPI_RX_RING_COUNT_LOG)
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#define WPI_NTXQUEUES 8
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#define WPI_DRV_NTXQUEUES 5
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#define WPI_CMD_QUEUE_NUM 4
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#define WPI_NDMACHNLS 6
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/* Maximum scatter/gather. */
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#define WPI_MAX_SCATTER 4
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#define WPI_MAX_SCATTER 4
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/*
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* Rings must be aligned on a 16K boundary.
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*/
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#define WPI_RING_DMA_ALIGN 0x4000
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/* Maximum RX buffer size (larger than MCLBYTES.) */
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#define WPI_RBUF_SIZE (3 * 1024)
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/* Maximum Rx buffer size. */
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#define WPI_RBUF_SIZE ( 3 * 1024 ) /* XXX 3000 but must be aligned */
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/* Base Address Register. */
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#define WPI_PCI_BAR0 PCI_MAPREG_START
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/*
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* Control and status registers.
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*/
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#define WPI_HW_IF_CONFIG 0x000
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#define WPI_INT 0x008
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#define WPI_INT_MASK 0x00c
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#define WPI_MASK 0x00c
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#define WPI_FH_INT 0x010
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#define WPI_GPIO_IN 0x018
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#define WPI_RESET 0x020
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#define WPI_GP_CNTRL 0x024
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#define WPI_EEPROM 0x02c
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#define WPI_EEPROM_GP 0x030
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#define WPI_GIO 0x03c
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#define WPI_UCODE_GP1 0x054
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#define WPI_UCODE_GP1_SET 0x058
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#define WPI_UCODE_GP1_CLR 0x05c
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#define WPI_UCODE_GP2 0x060
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#define WPI_GIO_CHICKEN 0x100
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#define WPI_ANA_PLL 0x20c
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#define WPI_DBG_HPET_MEM 0x240
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#define WPI_MEM_RADDR 0x40c
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#define WPI_MEM_WADDR 0x410
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#define WPI_MEM_WDATA 0x418
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@@ -74,10 +60,6 @@
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#define WPI_PRPH_WDATA 0x44c
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#define WPI_PRPH_RDATA 0x450
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#define WPI_HBUS_TARG_WRPTR 0x460
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/*
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* Flow-Handler registers.
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*/
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#define WPI_FH_CBBC_CTRL(qid) (0x940 + (qid) * 8)
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#define WPI_FH_CBBC_BASE(qid) (0x944 + (qid) * 8)
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#define WPI_FH_RX_CONFIG 0xc00
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@@ -91,6 +73,7 @@
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#define WPI_FH_MSG_CONFIG 0xe88
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#define WPI_FH_TX_STATUS 0xe90
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/*
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* NIC internal memory offsets.
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*/
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@@ -101,21 +84,21 @@
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#define WPI_ALM_SCHED_TXF5MF 0x2e20
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#define WPI_ALM_SCHED_SBYPASS_MODE1 0x2e2c
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#define WPI_ALM_SCHED_SBYPASS_MODE2 0x2e30
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#define WPI_APMG_CLK_CTRL 0x3000
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#define WPI_APMG_CLK_EN 0x3004
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#define WPI_APMG_CLK_ENA 0x3004
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#define WPI_APMG_CLK_DIS 0x3008
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#define WPI_APMG_RFKILL 0x3014
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#define WPI_APMG_PS 0x300c
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#define WPI_APMG_PCI_STT 0x3010
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#define WPI_APMG_RFKILL 0x3014
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#define WPI_BSM_WR_CTRL 0x3400
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#define WPI_BSM_WR_MEM_SRC 0x3404
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#define WPI_BSM_WR_MEM_DST 0x3408
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#define WPI_BSM_WR_DWCOUNT 0x340c
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#define WPI_BSM_SRAM_BASE 0x3800
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#define WPI_BSM_DRAM_TEXT_ADDR 0x3490
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#define WPI_BSM_DRAM_TEXT_SIZE 0x3494
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#define WPI_BSM_DRAM_DATA_ADDR 0x3498
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#define WPI_BSM_DRAM_DATA_SIZE 0x349c
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#define WPI_BSM_SRAM_BASE 0x3800
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/* Possible flags for register WPI_HW_IF_CONFIG. */
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#define WPI_HW_IF_CONFIG_ALM_MB (1 << 8)
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@@ -141,8 +124,8 @@
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#define WPI_RESET_STOP_MASTER (1 << 9)
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/* Possible flags for register WPI_GP_CNTRL. */
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#define WPI_GP_CNTRL_MAC_ACCESS_ENA (1 << 0)
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#define WPI_GP_CNTRL_MAC_CLOCK_READY (1 << 0)
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#define WPI_GP_CNTRL_MAC_ACCESS_ENA (1 << 0)
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#define WPI_GP_CNTRL_INIT_DONE (1 << 2)
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#define WPI_GP_CNTRL_MAC_ACCESS_REQ (1 << 3)
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#define WPI_GP_CNTRL_SLEEP (1 << 4)
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@@ -152,49 +135,45 @@
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/* Possible flags for register WPI_GIO_CHICKEN. */
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#define WPI_GIO_CHICKEN_L1A_NO_L0S_RX (1 << 23)
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#define WPI_GIO_CHICKEN_DIS_L0S_TIMER (1 << 29)
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/* Possible flags for register WPI_GIO. */
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#define WPI_GIO_L0S_ENA (1 << 1)
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/* Possible flags for register WPI_FH_RX_CONFIG. */
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#define WPI_FH_RX_CONFIG_DMA_ENA (1U << 31)
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#define WPI_FH_RX_CONFIG_RDRBD_ENA (1 << 29)
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#define WPI_FH_RX_CONFIG_WRSTATUS_ENA (1 << 27)
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#define WPI_FH_RX_CONFIG_MAXFRAG (1 << 24)
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#define WPI_FH_RX_CONFIG_NRBD(x) ((x) << 20)
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#define WPI_FH_RX_CONFIG_IRQ_DST_HOST (1 << 12)
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#define WPI_FH_RX_CONFIG_IRQ_TIMEOUT(x) ((x) << 4)
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#define WPI_FH_RX_CONFIG_DMA_ENA (1U << 31)
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#define WPI_FH_RX_CONFIG_RDRBD_ENA (1U << 29)
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#define WPI_FH_RX_CONFIG_WRSTATUS_ENA (1U << 27)
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#define WPI_FH_RX_CONFIG_MAXFRAG (1U << 24)
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#define WPI_FH_RX_CONFIG_NRBD(x) ((x) << 20)
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#define WPI_FH_RX_CONFIG_IRQ_DST_HOST (1U << 12)
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#define WPI_FH_RX_CONFIG_IRQ_RBTH(x) ((x) << 4)
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/* Possible flags for register WPI_ANA_PLL. */
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#define WPI_ANA_PLL_INIT (1 << 24)
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/* Possible flags for register WPI_UCODE_GP1*. */
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#define WPI_UCODE_GP1_MAC_SLEEP (1 << 0)
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/* Possible flags for register WPI_UCODE_GP1_CLR. */
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#define WPI_UCODE_GP1_RFKILL (1 << 1)
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#define WPI_UCODE_GP1_CMD_BLOCKED (1 << 2)
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/* Possible flags for register WPI_FH_RX_STATUS. */
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/* Possible flags for WPI_FH_RX_STATUS. */
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#define WPI_FH_RX_STATUS_IDLE (1 << 24)
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/* Possible flags for register WPI_BSM_WR_CTRL. */
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#define WPI_BSM_WR_CTRL_START_EN (1 << 30)
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#define WPI_BSM_WR_CTRL_START_EN (1U << 30)
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#define WPI_BSM_WR_CTRL_START (1U << 31)
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/* Possible flags for register WPI_INT. */
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#define WPI_INT_ALIVE (1 << 0)
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#define WPI_INT_WAKEUP (1 << 1)
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#define WPI_INT_SW_RX (1 << 3)
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#define WPI_INT_SW_ERR (1 << 25)
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#define WPI_INT_FH_TX (1 << 27)
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#define WPI_INT_HW_ERR (1 << 29)
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#define WPI_INT_ALIVE (1U << 0)
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#define WPI_INT_WAKEUP (1U << 1)
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#define WPI_INT_SW_RX (1U << 3)
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#define WPI_INT_RF_TOGGLED (1U << 7)
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#define WPI_INT_SW_ERR (1U << 25)
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#define WPI_INT_FH_TX (1U << 27)
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#define WPI_INT_HW_ERR (1U << 29)
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#define WPI_INT_FH_RX (1U << 31)
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/* Shortcut. */
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#define WPI_INT_MASK_DEF \
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(WPI_INT_SW_ERR | WPI_INT_HW_ERR | WPI_INT_FH_TX | \
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WPI_INT_FH_RX | WPI_INT_ALIVE | WPI_INT_WAKEUP | \
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WPI_INT_SW_RX)
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#define WPI_INT_MASK \
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(WPI_INT_SW_ERR | WPI_INT_HW_ERR | WPI_INT_FH_TX | \
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WPI_INT_FH_RX | WPI_INT_ALIVE | WPI_INT_WAKEUP | \
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WPI_INT_SW_RX | WPI_INT_RF_TOGGLED)
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/* Possible flags for register WPI_FH_INT. */
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#define WPI_FH_INT_RX_CHNL(x) (1 << ((x) + 16))
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@@ -212,148 +191,78 @@
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/* Possible flags for register WPI_EEPROM. */
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#define WPI_EEPROM_READ_VALID (1 << 0)
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#define WPI_EEPROM_CMD (1 << 1)
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/* Possible flags for register WPI_EEPROM_GP. */
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#define WPI_EEPROM_VERSION 0x00000007
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#define WPI_EEPROM_GP_IF_OWNER 0x00000180
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/* Possible flags for register WPI_APMG_PS. */
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#define WPI_APMG_PS_PWR_SRC_MASK (3 << 24)
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/* Possible flags for registers WPI_APMG_CLK_*. */
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#define WPI_APMG_CLK_CTRL_DMA_CLK_RQT (1 << 9)
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#define WPI_APMG_CLK_CTRL_BSM_CLK_RQT (1 << 11)
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/* Possible flags for register WPI_APMG_CLK_ENA/WPI_APMG_CLK_DIS. */
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#define WPI_APMG_CLK_DMA_CLK_RQT (1 << 9)
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#define WPI_APMG_CLK_BSM_CLK_RQT (1 << 11)
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/* Possible flags for register WPI_APMG_PCI_STT. */
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#define WPI_APMG_PCI_STT_L1A_DIS (1 << 11)
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struct wpi_shared {
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uint32_t txbase[WPI_NTXQUEUES];
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uint32_t txbase[8];
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uint32_t next;
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uint32_t reserved[2];
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} __packed;
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#define WPI_MAX_SEG_LEN 65520
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struct wpi_tx_desc {
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uint8_t reserved1[3];
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uint8_t nsegs;
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#define WPI_PAD32(x) (roundup2(x, 4) - (x))
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uint32_t flags;
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#define WPI_PAD32(x) ((((x) + 3) & ~3) - (x))
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struct {
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uint32_t addr;
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uint32_t len;
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} __packed segs[WPI_MAX_SCATTER];
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uint8_t reserved2[28];
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uint8_t reserved[28];
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} __packed;
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struct wpi_tx_stat {
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uint8_t rtsfailcnt;
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uint8_t ackfailcnt;
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uint8_t btkillcnt;
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uint8_t nrts;
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uint8_t retrycnt;
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uint8_t nkill;
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uint8_t rate;
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uint32_t duration;
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uint32_t status;
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#define WPI_TX_STATUS_SUCCESS 0x01
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#define WPI_TX_STATUS_DIRECT_DONE 0x02
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#define WPI_TX_STATUS_FAIL 0x80
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#define WPI_TX_STATUS_FAIL_SHORT_LIMIT 0x82
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#define WPI_TX_STATUS_FAIL_LONG_LIMIT 0x83
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#define WPI_TX_STATUS_FAIL_FIFO_UNDERRUN 0x84
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#define WPI_TX_STATUS_FAIL_MGMNT_ABORT 0x85
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#define WPI_TX_STATUS_FAIL_NEXT_FRAG 0x86
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#define WPI_TX_STATUS_FAIL_LIFE_EXPIRE 0x87
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#define WPI_TX_STATUS_FAIL_NODE_PS 0x88
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#define WPI_TX_STATUS_FAIL_ABORTED 0x89
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#define WPI_TX_STATUS_FAIL_BT_RETRY 0x8a
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#define WPI_TX_STATUS_FAIL_NODE_INVALID 0x8b
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#define WPI_TX_STATUS_FAIL_FRAG_DROPPED 0x8c
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#define WPI_TX_STATUS_FAIL_TID_DISABLE 0x8d
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#define WPI_TX_STATUS_FAIL_FRAME_FLUSHED 0x8e
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#define WPI_TX_STATUS_FAIL_INSUFFICIENT_CF_POLL 0x8f
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#define WPI_TX_STATUS_FAIL_TX_LOCKED 0x90
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#define WPI_TX_STATUS_FAIL_NO_BEACON_ON_RADAR 0x91
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} __packed;
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struct wpi_rx_desc {
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uint32_t len;
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uint8_t type;
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#define WPI_UC_READY 1
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#define WPI_ADD_NODE_DONE 24
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#define WPI_RX_DONE 27
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#define WPI_TX_DONE 28
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#define WPI_START_SCAN 130
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#define WPI_SCAN_RESULTS 131
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#define WPI_STOP_SCAN 132
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#define WPI_BEACON_SENT 144
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#define WPI_RX_STATISTICS 156
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#define WPI_BEACON_STATISTICS 157
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#define WPI_STATE_CHANGED 161
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#define WPI_BEACON_MISSED 162
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uint8_t flags;
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uint8_t idx;
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uint8_t qid;
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} __packed;
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#define WPI_RX_DESC_QID_MSK 0x07
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#define WPI_UNSOLICITED_RX_NOTIF 0x80
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struct wpi_rx_stat {
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uint8_t len;
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#define WPI_STAT_MAXLEN 20
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uint8_t id;
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uint8_t rssi; /* received signal strength */
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#define WPI_RSSI_OFFSET -95
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uint8_t agc; /* access gain control */
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uint16_t signal;
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uint16_t noise;
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} __packed;
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struct wpi_rx_head {
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uint16_t chan;
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uint16_t flags;
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#define WPI_STAT_FLAG_SHPREAMBLE (1 << 2)
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uint8_t reserved;
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uint8_t plcp;
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uint16_t len;
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} __packed;
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struct wpi_rx_tail {
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uint32_t flags;
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#define WPI_RX_NO_CRC_ERR (1 << 0)
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#define WPI_RX_NO_OVFL_ERR (1 << 1)
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/* shortcut for the above */
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#define WPI_RX_NOERROR (WPI_RX_NO_CRC_ERR | WPI_RX_NO_OVFL_ERR)
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#define WPI_RX_CIPHER_MASK (7 << 8)
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#define WPI_RX_CIPHER_CCMP (2 << 8)
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#define WPI_RX_DECRYPT_MASK (3 << 11)
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#define WPI_RX_DECRYPT_OK (3 << 11)
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uint64_t tstamp;
|
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uint32_t tbeacon;
|
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} __packed;
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struct wpi_tx_cmd {
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uint8_t code;
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#define WPI_CMD_RXON 16
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#define WPI_CMD_RXON_ASSOC 17
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#define WPI_CMD_ASSOCIATE 17
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#define WPI_CMD_EDCA_PARAMS 19
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#define WPI_CMD_TIMING 20
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#define WPI_CMD_ADD_NODE 24
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#define WPI_CMD_DEL_NODE 25
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#define WPI_CMD_TX_DATA 28
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#define WPI_CMD_MRR_SETUP 71
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#define WPI_CMD_SET_LED 72
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#define WPI_CMD_SET_POWER_MODE 119
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#define WPI_CMD_SCAN 128
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#define WPI_CMD_SCAN_ABORT 129
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#define WPI_CMD_SET_BEACON 145
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#define WPI_CMD_TXPOWER 151
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#define WPI_CMD_BT_COEX 155
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#define WPI_CMD_GET_STATISTICS 156
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uint8_t flags;
|
||||
uint8_t idx;
|
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@@ -367,16 +276,14 @@ struct wpi_rxon {
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uint16_t reserved1;
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uint8_t bssid[IEEE80211_ADDR_LEN];
|
||||
uint16_t reserved2;
|
||||
uint8_t wlap[IEEE80211_ADDR_LEN];
|
||||
uint16_t reserved3;
|
||||
uint32_t reserved3[2];
|
||||
uint8_t mode;
|
||||
#define WPI_MODE_HOSTAP 1
|
||||
#define WPI_MODE_STA 3
|
||||
#define WPI_MODE_IBSS 4
|
||||
#define WPI_MODE_MONITOR 6
|
||||
|
||||
uint8_t air;
|
||||
uint16_t reserved4;
|
||||
uint8_t reserved4[3];
|
||||
uint8_t ofdm_mask;
|
||||
uint8_t cck_mask;
|
||||
uint16_t associd;
|
||||
@@ -387,10 +294,9 @@ struct wpi_rxon {
|
||||
#define WPI_RXON_SHSLOT (1 << 4)
|
||||
#define WPI_RXON_SHPREAMBLE (1 << 5)
|
||||
#define WPI_RXON_NODIVERSITY (1 << 7)
|
||||
#define WPI_RXON_ANTENNA_A (1 << 8)
|
||||
#define WPI_RXON_ANTENNA_B (1 << 9)
|
||||
#define WPI_RXON_ANT_A (1 << 8)
|
||||
#define WPI_RXON_ANT_B (1 << 9)
|
||||
#define WPI_RXON_TSF (1 << 15)
|
||||
#define WPI_RXON_CTS_TO_SELF (1 << 30)
|
||||
|
||||
uint32_t filter;
|
||||
#define WPI_FILTER_PROMISC (1 << 0)
|
||||
@@ -398,14 +304,12 @@ struct wpi_rxon {
|
||||
#define WPI_FILTER_MULTICAST (1 << 2)
|
||||
#define WPI_FILTER_NODECRYPT (1 << 3)
|
||||
#define WPI_FILTER_BSS (1 << 5)
|
||||
#define WPI_FILTER_BEACON (1 << 6)
|
||||
#define WPI_FILTER_ASSOC (1 << 7) /* Accept associaton requests. */
|
||||
|
||||
uint8_t chan;
|
||||
uint16_t reserved5;
|
||||
uint8_t reserved6[3];
|
||||
} __packed;
|
||||
|
||||
/* Structure for command WPI_CMD_RXON_ASSOC. */
|
||||
/* Structure for command WPI_CMD_ASSOCIATE. */
|
||||
struct wpi_assoc {
|
||||
uint32_t flags;
|
||||
uint32_t filter;
|
||||
@@ -418,6 +322,7 @@ struct wpi_assoc {
|
||||
struct wpi_edca_params {
|
||||
uint32_t flags;
|
||||
#define WPI_EDCA_UPDATE (1 << 0)
|
||||
#define WPI_EDCA_TXOP (1 << 4)
|
||||
|
||||
struct {
|
||||
uint16_t cwmin;
|
||||
@@ -425,7 +330,7 @@ struct wpi_edca_params {
|
||||
uint8_t aifsn;
|
||||
uint8_t reserved;
|
||||
uint16_t txoplimit;
|
||||
} __packed ac[WME_NUM_AC];
|
||||
} __packed ac[EDCA_NUM_AC];
|
||||
} __packed;
|
||||
|
||||
/* Structure for command WPI_CMD_TIMING. */
|
||||
@@ -448,25 +353,22 @@ struct wpi_node_info {
|
||||
uint16_t reserved2;
|
||||
uint8_t id;
|
||||
#define WPI_ID_BSS 0
|
||||
#define WPI_ID_IBSS_MIN 2
|
||||
#define WPI_ID_IBSS_MAX 23
|
||||
#define WPI_ID_BROADCAST 24
|
||||
#define WPI_ID_UNDEFINED (uint8_t)-1
|
||||
|
||||
uint8_t flags;
|
||||
#define WPI_FLAG_KEY_SET (1 << 0)
|
||||
#define WPI_FLAG_SET_KEY (1 << 0)
|
||||
|
||||
uint16_t reserved3;
|
||||
uint16_t kflags;
|
||||
#define WPI_KFLAG_CCMP (1 << 1)
|
||||
#define WPI_KFLAG_KID(kid) ((kid) << 8)
|
||||
#define WPI_KFLAG_MULTICAST (1 << 14)
|
||||
|
||||
uint8_t tsc2;
|
||||
uint8_t reserved4;
|
||||
uint16_t ttak[5];
|
||||
uint16_t reserved5;
|
||||
uint8_t key[IEEE80211_KEYBUF_SIZE];
|
||||
uint8_t key[16];
|
||||
|
||||
uint32_t action;
|
||||
#define WPI_ACTION_SET_RATE (1 << 2)
|
||||
|
||||
@@ -483,14 +385,6 @@ struct wpi_node_info {
|
||||
uint16_t add_imm_start;
|
||||
} __packed;
|
||||
|
||||
/* Structure for command WPI_CMD_DEL_NODE. */
|
||||
struct wpi_cmd_del_node {
|
||||
uint8_t count;
|
||||
uint8_t reserved1[3];
|
||||
uint8_t macaddr[IEEE80211_ADDR_LEN];
|
||||
uint16_t reserved2;
|
||||
} __packed;
|
||||
|
||||
/* Structure for command WPI_CMD_TX_DATA. */
|
||||
struct wpi_cmd_data {
|
||||
uint16_t len;
|
||||
@@ -500,25 +394,22 @@ struct wpi_cmd_data {
|
||||
#define WPI_TX_NEED_CTS (1 << 2)
|
||||
#define WPI_TX_NEED_ACK (1 << 3)
|
||||
#define WPI_TX_FULL_TXOP (1 << 7)
|
||||
#define WPI_TX_BT_DISABLE (1 << 12) /* bluetooth coexistence */
|
||||
#define WPI_TX_BT_DISABLE (1 << 12) /* bluetooth coexistence */
|
||||
#define WPI_TX_AUTO_SEQ (1 << 13)
|
||||
#define WPI_TX_MORE_FRAG (1 << 14)
|
||||
#define WPI_TX_INSERT_TSTAMP (1 << 16)
|
||||
|
||||
uint8_t plcp;
|
||||
uint8_t id;
|
||||
uint8_t tid;
|
||||
uint8_t security;
|
||||
#define WPI_CIPHER_WEP 1
|
||||
#define WPI_CIPHER_WEP40 1
|
||||
#define WPI_CIPHER_CCMP 2
|
||||
#define WPI_CIPHER_TKIP 3
|
||||
#define WPI_CIPHER_WEP104 9
|
||||
|
||||
uint8_t key[IEEE80211_KEYBUF_SIZE];
|
||||
uint8_t tkip[IEEE80211_WEP_MICLEN];
|
||||
uint8_t tkip[IEEE80211_TKIP_MICLEN];
|
||||
uint32_t fnext;
|
||||
#define WPI_NEXT_STA_ID(id) ((id) << 8)
|
||||
|
||||
uint32_t lifetime;
|
||||
#define WPI_LIFETIME_INFINITE 0xffffffff
|
||||
|
||||
@@ -530,31 +421,6 @@ struct wpi_cmd_data {
|
||||
uint16_t txop;
|
||||
} __packed;
|
||||
|
||||
/* Structure for command WPI_CMD_SET_BEACON. */
|
||||
struct wpi_cmd_beacon {
|
||||
uint16_t len;
|
||||
uint16_t reserved1;
|
||||
uint32_t flags; /* same as wpi_cmd_data */
|
||||
uint8_t plcp;
|
||||
uint8_t id;
|
||||
uint8_t reserved2[30];
|
||||
uint32_t lifetime;
|
||||
uint8_t ofdm_mask;
|
||||
uint8_t cck_mask;
|
||||
uint16_t reserved3[3];
|
||||
uint16_t tim;
|
||||
uint8_t timsz;
|
||||
uint8_t reserved4;
|
||||
} __packed;
|
||||
|
||||
/* Structure for notification WPI_BEACON_MISSED. */
|
||||
struct wpi_beacon_missed {
|
||||
uint32_t consecutive;
|
||||
uint32_t total;
|
||||
uint32_t expected;
|
||||
uint32_t received;
|
||||
} __packed;
|
||||
|
||||
/* Structure for command WPI_CMD_MRR_SETUP. */
|
||||
#define WPI_RIDX_MAX 11
|
||||
struct wpi_mrr_setup {
|
||||
@@ -566,8 +432,6 @@ struct wpi_mrr_setup {
|
||||
uint8_t plcp;
|
||||
uint8_t flags;
|
||||
uint8_t ntries;
|
||||
#define WPI_NTRIES_DEFAULT 2
|
||||
|
||||
uint8_t next;
|
||||
} __packed rates[WPI_RIDX_MAX + 1];
|
||||
} __packed;
|
||||
@@ -586,20 +450,17 @@ struct wpi_cmd_led {
|
||||
|
||||
/* Structure for command WPI_CMD_SET_POWER_MODE. */
|
||||
struct wpi_pmgt_cmd {
|
||||
uint16_t flags;
|
||||
uint32_t flags;
|
||||
#define WPI_PS_ALLOW_SLEEP (1 << 0)
|
||||
#define WPI_PS_NOTIFY (1 << 1)
|
||||
#define WPI_PS_SLEEP_OVER_DTIM (1 << 2)
|
||||
#define WPI_PS_PCI_PMGT (1 << 3)
|
||||
|
||||
uint8_t reserved[2];
|
||||
uint32_t rxtimeout;
|
||||
uint32_t txtimeout;
|
||||
uint32_t intval[5];
|
||||
} __packed;
|
||||
|
||||
/* Structures for command WPI_CMD_SCAN. */
|
||||
#define WPI_SCAN_MAX_ESSIDS 4
|
||||
struct wpi_scan_essid {
|
||||
uint8_t id;
|
||||
uint8_t len;
|
||||
@@ -610,22 +471,17 @@ struct wpi_scan_hdr {
|
||||
uint16_t len;
|
||||
uint8_t reserved1;
|
||||
uint8_t nchan;
|
||||
uint16_t quiet_time; /* timeout in milliseconds */
|
||||
#define WPI_QUIET_TIME_DEFAULT 10
|
||||
|
||||
uint16_t quiet_threshold; /* min # of packets */
|
||||
uint16_t quiet_time;
|
||||
uint16_t quiet_threshold;
|
||||
uint16_t crc_threshold;
|
||||
uint16_t reserved2;
|
||||
uint32_t max_svc; /* background scans */
|
||||
uint32_t pause_svc; /* background scans */
|
||||
#define WPI_PAUSE_MAX_TIME ((1 << 20) - 1)
|
||||
#define WPI_PAUSE_SCAN(nbeacons, time) ((nbeacons << 24) | time)
|
||||
|
||||
uint32_t flags;
|
||||
uint32_t filter;
|
||||
|
||||
/* Followed by a struct wpi_cmd_data. */
|
||||
/* Followed by an array of 4 structs wpi_scan_essid. */
|
||||
/* Followed by an array of 4 structq wpi_scan_essid. */
|
||||
/* Followed by probe request body. */
|
||||
/* Followed by an array of ``nchan'' structs wpi_scan_chan. */
|
||||
} __packed;
|
||||
@@ -642,22 +498,9 @@ struct wpi_scan_chan {
|
||||
uint16_t passive; /* msecs */
|
||||
} __packed;
|
||||
|
||||
#define WPI_SCAN_CRC_TH_DEFAULT htole16(1)
|
||||
#define WPI_SCAN_CRC_TH_NEVER htole16(0xffff)
|
||||
|
||||
/* Maximum size of a scan command. */
|
||||
#define WPI_SCAN_MAXSZ (MCLBYTES - 4)
|
||||
|
||||
#define WPI_ACTIVE_DWELL_TIME_2GHZ (30) /* all times in msec */
|
||||
#define WPI_ACTIVE_DWELL_TIME_5GHZ (20)
|
||||
#define WPI_ACTIVE_DWELL_FACTOR_2GHZ ( 3)
|
||||
#define WPI_ACTIVE_DWELL_FACTOR_5GHZ ( 2)
|
||||
|
||||
#define WPI_PASSIVE_DWELL_TIME_2GHZ ( 20)
|
||||
#define WPI_PASSIVE_DWELL_TIME_5GHZ ( 10)
|
||||
#define WPI_PASSIVE_DWELL_BASE (100)
|
||||
#define WPI_CHANNEL_TUNE_TIME ( 6)
|
||||
|
||||
/* Structure for command WPI_CMD_TXPOWER. */
|
||||
struct wpi_cmd_txpower {
|
||||
uint8_t band;
|
||||
@@ -666,14 +509,12 @@ struct wpi_cmd_txpower {
|
||||
|
||||
uint8_t reserved;
|
||||
uint16_t chan;
|
||||
|
||||
struct {
|
||||
uint8_t plcp;
|
||||
uint8_t rf_gain;
|
||||
uint8_t dsp_gain;
|
||||
uint8_t reserved;
|
||||
} __packed rates[WPI_RIDX_MAX + 1];
|
||||
|
||||
} __packed;
|
||||
|
||||
/* Structure for command WPI_CMD_BT_COEX. */
|
||||
@@ -695,18 +536,55 @@ struct wpi_bluetooth {
|
||||
uint32_t kill_cts;
|
||||
} __packed;
|
||||
|
||||
/* Structures for WPI_RX_DONE notification. */
|
||||
struct wpi_rx_stat {
|
||||
uint8_t len;
|
||||
#define WPI_STAT_MAXLEN 20
|
||||
|
||||
uint8_t id;
|
||||
uint8_t rssi; /* received signal strength */
|
||||
#define WPI_RSSI_OFFSET 95
|
||||
|
||||
uint8_t agc; /* access gain control */
|
||||
uint16_t signal;
|
||||
uint16_t noise;
|
||||
} __packed;
|
||||
|
||||
struct wpi_rx_head {
|
||||
uint16_t chan;
|
||||
uint16_t flags;
|
||||
uint8_t reserved;
|
||||
uint8_t rate;
|
||||
uint16_t len;
|
||||
} __packed;
|
||||
|
||||
struct wpi_rx_tail {
|
||||
uint32_t flags;
|
||||
#define WPI_RX_NO_CRC_ERR (1 << 0)
|
||||
#define WPI_RX_NO_OVFL_ERR (1 << 1)
|
||||
/* Shortcut for the above. */
|
||||
#define WPI_RX_NOERROR (WPI_RX_NO_CRC_ERR | WPI_RX_NO_OVFL_ERR)
|
||||
#define WPI_RX_CIPHER_MASK (7 << 8)
|
||||
#define WPI_RX_CIPHER_CCMP (2 << 8)
|
||||
#define WPI_RX_DECRYPT_MASK (3 << 11)
|
||||
#define WPI_RX_DECRYPT_OK (3 << 11)
|
||||
|
||||
uint64_t tstamp;
|
||||
uint32_t tbeacon;
|
||||
} __packed;
|
||||
|
||||
/* Structure for WPI_UC_READY notification. */
|
||||
struct wpi_ucode_info {
|
||||
uint8_t minor;
|
||||
uint8_t major;
|
||||
uint16_t reserved1;
|
||||
uint32_t version;
|
||||
uint8_t revision[8];
|
||||
uint8_t type;
|
||||
uint8_t subtype;
|
||||
uint16_t reserved2;
|
||||
#define WPI_UCODE_INIT 9
|
||||
|
||||
uint16_t reserved;
|
||||
uint32_t logptr;
|
||||
uint32_t errptr;
|
||||
uint32_t tstamp;
|
||||
uint32_t timestamp;
|
||||
uint32_t valid;
|
||||
} __packed;
|
||||
|
||||
@@ -724,86 +602,14 @@ struct wpi_start_scan {
|
||||
struct wpi_stop_scan {
|
||||
uint8_t nchan;
|
||||
uint8_t status;
|
||||
#define WPI_SCAN_COMPLETED 1
|
||||
#define WPI_SCAN_ABORTED 2
|
||||
|
||||
uint8_t reserved;
|
||||
uint8_t chan;
|
||||
uint64_t tsf;
|
||||
} __packed;
|
||||
|
||||
/* Structures for WPI_{RX,BEACON}_STATISTICS notification. */
|
||||
struct wpi_rx_phy_stats {
|
||||
uint32_t ina;
|
||||
uint32_t fina;
|
||||
uint32_t bad_plcp;
|
||||
uint32_t bad_crc32;
|
||||
uint32_t overrun;
|
||||
uint32_t eoverrun;
|
||||
uint32_t good_crc32;
|
||||
uint32_t fa;
|
||||
uint32_t bad_fina_sync;
|
||||
uint32_t sfd_timeout;
|
||||
uint32_t fina_timeout;
|
||||
uint32_t no_rts_ack;
|
||||
uint32_t rxe_limit;
|
||||
uint32_t ack;
|
||||
uint32_t cts;
|
||||
} __packed;
|
||||
|
||||
struct wpi_rx_general_stats {
|
||||
uint32_t bad_cts;
|
||||
uint32_t bad_ack;
|
||||
uint32_t not_bss;
|
||||
uint32_t filtered;
|
||||
uint32_t bad_chan;
|
||||
} __packed;
|
||||
|
||||
struct wpi_rx_stats {
|
||||
struct wpi_rx_phy_stats ofdm;
|
||||
struct wpi_rx_phy_stats cck;
|
||||
struct wpi_rx_general_stats general;
|
||||
} __packed;
|
||||
|
||||
struct wpi_tx_stats {
|
||||
uint32_t preamble;
|
||||
uint32_t rx_detected;
|
||||
uint32_t bt_defer;
|
||||
uint32_t bt_kill;
|
||||
uint32_t short_len;
|
||||
uint32_t cts_timeout;
|
||||
uint32_t ack_timeout;
|
||||
uint32_t exp_ack;
|
||||
uint32_t ack;
|
||||
} __packed;
|
||||
|
||||
struct wpi_general_stats {
|
||||
uint32_t temp;
|
||||
uint32_t burst_check;
|
||||
uint32_t burst;
|
||||
uint32_t reserved[4];
|
||||
uint32_t sleep;
|
||||
uint32_t slot_out;
|
||||
uint32_t slot_idle;
|
||||
uint32_t ttl_tstamp;
|
||||
uint32_t tx_ant_a;
|
||||
uint32_t tx_ant_b;
|
||||
uint32_t exec;
|
||||
uint32_t probe;
|
||||
} __packed;
|
||||
|
||||
struct wpi_stats {
|
||||
uint32_t flags;
|
||||
struct wpi_rx_stats rx;
|
||||
struct wpi_tx_stats tx;
|
||||
struct wpi_general_stats general;
|
||||
} __packed;
|
||||
|
||||
/* Possible flags for command WPI_CMD_GET_STATISTICS. */
|
||||
#define WPI_STATISTICS_BEACON_DISABLE (1 << 1)
|
||||
|
||||
/* Firmware error dump entry. */
|
||||
struct wpi_fw_dump {
|
||||
struct wpi_fwdump {
|
||||
uint32_t desc;
|
||||
uint32_t time;
|
||||
uint32_t blink[2];
|
||||
@@ -813,31 +619,26 @@ struct wpi_fw_dump {
|
||||
|
||||
/* Firmware image file header. */
|
||||
struct wpi_firmware_hdr {
|
||||
#define WPI_FW_MINVERSION 2144
|
||||
#define WPI_FW_NAME "wpifw"
|
||||
|
||||
uint16_t driver;
|
||||
uint8_t minor;
|
||||
uint8_t major;
|
||||
uint32_t rtextsz;
|
||||
uint32_t rdatasz;
|
||||
uint32_t itextsz;
|
||||
uint32_t idatasz;
|
||||
uint32_t btextsz;
|
||||
uint32_t version;
|
||||
uint32_t main_textsz;
|
||||
uint32_t main_datasz;
|
||||
uint32_t init_textsz;
|
||||
uint32_t init_datasz;
|
||||
uint32_t boot_textsz;
|
||||
} __packed;
|
||||
|
||||
#define WPI_FW_TEXT_MAXSZ ( 80 * 1024 )
|
||||
#define WPI_FW_DATA_MAXSZ ( 32 * 1024 )
|
||||
#define WPI_FW_BOOT_TEXT_MAXSZ 1024
|
||||
#define WPI_FW_TEXT_MAXSZ (80 * 1024)
|
||||
#define WPI_FW_DATA_MAXSZ (32 * 1024)
|
||||
#define WPI_FW_BOOT_TEXT_MAXSZ 1024
|
||||
|
||||
#define WPI_FW_UPDATED (1U << 31 )
|
||||
#define WPI_FW_UPDATED (1U << 31)
|
||||
|
||||
/*
|
||||
* Offsets into EEPROM.
|
||||
*/
|
||||
#define WPI_EEPROM_MAC 0x015
|
||||
#define WPI_EEPROM_REVISION 0x035
|
||||
#define WPI_EEPROM_SKU_CAP 0x045
|
||||
#define WPI_EEPROM_CAPABILITIES 0x045
|
||||
#define WPI_EEPROM_TYPE 0x04a
|
||||
#define WPI_EEPROM_DOMAIN 0x060
|
||||
#define WPI_EEPROM_BAND1 0x063
|
||||
@@ -850,7 +651,7 @@ struct wpi_firmware_hdr {
|
||||
struct wpi_eeprom_chan {
|
||||
uint8_t flags;
|
||||
#define WPI_EEPROM_CHAN_VALID (1 << 0)
|
||||
#define WPI_EEPROM_CHAN_IBSS (1 << 1)
|
||||
#define WPI_EEPROM_CHAN_IBSS (1 << 1)
|
||||
#define WPI_EEPROM_CHAN_ACTIVE (1 << 3)
|
||||
#define WPI_EEPROM_CHAN_RADAR (1 << 4)
|
||||
|
||||
@@ -873,17 +674,15 @@ struct wpi_eeprom_group {
|
||||
int16_t temp;
|
||||
} __packed;
|
||||
|
||||
#define WPI_CHAN_BANDS_COUNT 5
|
||||
#define WPI_CHAN_BANDS_COUNT 5
|
||||
#define WPI_MAX_CHAN_PER_BAND 14
|
||||
static const struct wpi_chan_band {
|
||||
uint32_t addr; /* offset in EEPROM */
|
||||
uint8_t nchan;
|
||||
uint8_t chan[WPI_MAX_CHAN_PER_BAND];
|
||||
} wpi_bands[] = {
|
||||
/* 20MHz channels, 2GHz band. */
|
||||
} wpi_bands[5] = {
|
||||
{ WPI_EEPROM_BAND1, 14,
|
||||
{ 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 } },
|
||||
/* 20MHz channels, 5GHz band. */
|
||||
{ WPI_EEPROM_BAND2, 13,
|
||||
{ 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16 } },
|
||||
{ WPI_EEPROM_BAND3, 12,
|
||||
@@ -903,16 +702,25 @@ static const struct wpi_chan_band {
|
||||
#define WPI_RIDX_CCK2 9
|
||||
#define WPI_RIDX_CCK11 11
|
||||
|
||||
static const uint8_t wpi_ridx_to_plcp[] = {
|
||||
/* OFDM: IEEE Std 802.11a-1999, pp. 14 Table 80 */
|
||||
/* R1-R4 (ral/ural is R4-R1) */
|
||||
0xd, 0xf, 0x5, 0x7, 0x9, 0xb, 0x1, 0x3,
|
||||
/* CCK: device-dependent */
|
||||
10, 20, 55, 110
|
||||
static const struct wpi_rate {
|
||||
uint8_t rate;
|
||||
uint8_t plcp;
|
||||
} wpi_rates[WPI_RIDX_MAX + 1] = {
|
||||
{ 12, 0xd },
|
||||
{ 18, 0xf },
|
||||
{ 24, 0x5 },
|
||||
{ 36, 0x7 },
|
||||
{ 48, 0x9 },
|
||||
{ 72, 0xb },
|
||||
{ 96, 0x1 },
|
||||
{ 108, 0x3 },
|
||||
{ 2, 10 },
|
||||
{ 4, 20 },
|
||||
{ 11, 55 },
|
||||
{ 22, 110 }
|
||||
};
|
||||
|
||||
#define WPI_MAX_PWR_INDEX 77
|
||||
|
||||
/*
|
||||
* RF Tx gain values from highest to lowest power (values obtained from
|
||||
* the reference driver.)
|
||||
@@ -974,7 +782,7 @@ static const struct wpi_pmgt {
|
||||
uint32_t rxtimeout;
|
||||
uint32_t txtimeout;
|
||||
uint32_t intval[5];
|
||||
uint8_t skip_dtim;
|
||||
int skip_dtim;
|
||||
} wpi_pmgt[WPI_NDTIMRANGES][WPI_NPOWERLEVELS] = {
|
||||
/* DTIM <= 10 */
|
||||
{
|
||||
@@ -1019,7 +827,7 @@ static const char * const wpi_fw_errmsg[] = {
|
||||
|
||||
#define WPI_SETBITS(sc, reg, mask) \
|
||||
WPI_WRITE(sc, reg, WPI_READ(sc, reg) | (mask))
|
||||
|
||||
|
||||
#define WPI_CLRBITS(sc, reg, mask) \
|
||||
WPI_WRITE(sc, reg, WPI_READ(sc, reg) & ~(mask))
|
||||
|
||||
@@ -0,0 +1,208 @@
|
||||
/* $OpenBSD: if_wpivar.h,v 1.29 2020/10/11 07:05:29 mpi Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2006-2008
|
||||
* Damien Bergamini <damien.bergamini@free.fr>
|
||||
*
|
||||
* Permission to use, copy, modify, and distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
struct wpi_rx_radiotap_header {
|
||||
struct ieee80211_radiotap_header wr_ihdr;
|
||||
uint64_t wr_tsft;
|
||||
uint8_t wr_flags;
|
||||
uint8_t wr_rate;
|
||||
uint16_t wr_chan_freq;
|
||||
uint16_t wr_chan_flags;
|
||||
int8_t wr_dbm_antsignal;
|
||||
int8_t wr_dbm_antnoise;
|
||||
uint8_t wr_antenna;
|
||||
} __packed;
|
||||
|
||||
#define WPI_RX_RADIOTAP_PRESENT \
|
||||
((1 << IEEE80211_RADIOTAP_TSFT) | \
|
||||
(1 << IEEE80211_RADIOTAP_FLAGS) | \
|
||||
(1 << IEEE80211_RADIOTAP_RATE) | \
|
||||
(1 << IEEE80211_RADIOTAP_CHANNEL) | \
|
||||
(1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) | \
|
||||
(1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) | \
|
||||
(1 << IEEE80211_RADIOTAP_ANTENNA))
|
||||
|
||||
struct wpi_tx_radiotap_header {
|
||||
struct ieee80211_radiotap_header wt_ihdr;
|
||||
uint8_t wt_flags;
|
||||
uint8_t wt_rate;
|
||||
uint16_t wt_chan_freq;
|
||||
uint16_t wt_chan_flags;
|
||||
} __packed;
|
||||
|
||||
#define WPI_TX_RADIOTAP_PRESENT \
|
||||
((1 << IEEE80211_RADIOTAP_FLAGS) | \
|
||||
(1 << IEEE80211_RADIOTAP_RATE) | \
|
||||
(1 << IEEE80211_RADIOTAP_CHANNEL))
|
||||
|
||||
struct wpi_dma_info {
|
||||
bus_dma_tag_t tag;
|
||||
bus_dmamap_t map;
|
||||
bus_dma_segment_t seg;
|
||||
bus_addr_t paddr;
|
||||
caddr_t vaddr;
|
||||
bus_size_t size;
|
||||
};
|
||||
|
||||
struct wpi_tx_data {
|
||||
bus_dmamap_t map;
|
||||
bus_addr_t cmd_paddr;
|
||||
struct mbuf *m;
|
||||
struct ieee80211_node *ni;
|
||||
};
|
||||
|
||||
struct wpi_tx_ring {
|
||||
struct wpi_dma_info desc_dma;
|
||||
struct wpi_dma_info cmd_dma;
|
||||
struct wpi_tx_desc *desc;
|
||||
struct wpi_tx_cmd *cmd;
|
||||
struct wpi_tx_data data[WPI_TX_RING_COUNT];
|
||||
int qid;
|
||||
int queued;
|
||||
int cur;
|
||||
};
|
||||
|
||||
struct wpi_softc;
|
||||
|
||||
struct wpi_rx_data {
|
||||
struct mbuf *m;
|
||||
bus_dmamap_t map;
|
||||
};
|
||||
|
||||
struct wpi_rx_ring {
|
||||
struct wpi_dma_info desc_dma;
|
||||
uint32_t *desc;
|
||||
struct wpi_rx_data data[WPI_RX_RING_COUNT];
|
||||
int cur;
|
||||
};
|
||||
|
||||
struct wpi_node {
|
||||
struct ieee80211_node ni; /* must be the first */
|
||||
struct ieee80211_amrr_node amn;
|
||||
uint8_t id;
|
||||
uint8_t ridx[IEEE80211_RATE_MAXSIZE];
|
||||
};
|
||||
|
||||
struct wpi_power_sample {
|
||||
uint8_t index;
|
||||
int8_t power;
|
||||
};
|
||||
|
||||
struct wpi_power_group {
|
||||
#define WPI_SAMPLES_COUNT 5
|
||||
struct wpi_power_sample samples[WPI_SAMPLES_COUNT];
|
||||
uint8_t chan;
|
||||
int8_t maxpwr;
|
||||
int16_t temp;
|
||||
};
|
||||
|
||||
struct wpi_fw_part {
|
||||
const uint8_t *text;
|
||||
uint32_t textsz;
|
||||
const uint8_t *data;
|
||||
uint32_t datasz;
|
||||
};
|
||||
|
||||
struct wpi_fw_info {
|
||||
u_char *data;
|
||||
size_t datalen;
|
||||
struct wpi_fw_part init;
|
||||
struct wpi_fw_part main;
|
||||
struct wpi_fw_part boot;
|
||||
};
|
||||
|
||||
struct wpi_softc {
|
||||
#ifdef __FreeBSD_version
|
||||
struct device* sc_dev;
|
||||
#else
|
||||
struct device sc_dev;
|
||||
#endif
|
||||
|
||||
struct ieee80211com sc_ic;
|
||||
int (*sc_newstate)(struct ieee80211com *,
|
||||
enum ieee80211_state, int);
|
||||
|
||||
struct ieee80211_amrr amrr;
|
||||
uint8_t fixed_ridx;
|
||||
|
||||
bus_dma_tag_t sc_dmat;
|
||||
|
||||
struct rwlock sc_rwlock;
|
||||
u_int sc_flags;
|
||||
#define WPI_FLAG_HAS_5GHZ (1 << 0)
|
||||
|
||||
/* Shared area. */
|
||||
struct wpi_dma_info shared_dma;
|
||||
struct wpi_shared *shared;
|
||||
|
||||
/* Firmware DMA transfer. */
|
||||
struct wpi_dma_info fw_dma;
|
||||
|
||||
/* TX/RX rings. */
|
||||
struct wpi_tx_ring txq[WPI_NTXQUEUES];
|
||||
struct wpi_rx_ring rxq;
|
||||
|
||||
bus_space_tag_t sc_st;
|
||||
bus_space_handle_t sc_sh;
|
||||
void *sc_ih;
|
||||
#ifndef __FreeBSD_version
|
||||
pci_chipset_tag_t sc_pct;
|
||||
pcitag_t sc_pcitag;
|
||||
#endif
|
||||
bus_size_t sc_sz;
|
||||
int sc_cap_off; /* PCIe Capabilities. */
|
||||
|
||||
struct timeout calib_to;
|
||||
int calib_cnt;
|
||||
|
||||
struct task init_task;
|
||||
|
||||
struct wpi_fw_info fw;
|
||||
uint32_t errptr;
|
||||
|
||||
struct wpi_rxon rxon;
|
||||
int temp;
|
||||
uint32_t qfullmsk;
|
||||
|
||||
uint8_t cap;
|
||||
uint16_t rev;
|
||||
uint8_t type;
|
||||
struct wpi_power_group groups[WPI_POWER_GROUPS_COUNT];
|
||||
int8_t maxpwr[IEEE80211_CHAN_MAX];
|
||||
|
||||
int sc_tx_timer;
|
||||
|
||||
#if NBPFILTER > 0
|
||||
caddr_t sc_drvbpf;
|
||||
|
||||
union {
|
||||
struct wpi_rx_radiotap_header th;
|
||||
uint8_t pad[IEEE80211_RADIOTAP_HDRLEN];
|
||||
} sc_rxtapu;
|
||||
#define sc_rxtap sc_rxtapu.th
|
||||
int sc_rxtap_len;
|
||||
|
||||
union {
|
||||
struct wpi_tx_radiotap_header th;
|
||||
uint8_t pad[IEEE80211_RADIOTAP_HDRLEN];
|
||||
} sc_txtapu;
|
||||
#define sc_txtap sc_txtapu.th
|
||||
int sc_txtap_len;
|
||||
#endif
|
||||
};
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,142 +0,0 @@
|
||||
/*-
|
||||
* Copyright (c) 2006,2007
|
||||
* Damien Bergamini <damien.bergamini@free.fr>
|
||||
* Benjamin Close <Benjamin.Close@clearchain.com>
|
||||
* Copyright (c) 2015 Andriy Voskoboinyk <avos@FreeBSD.org>
|
||||
*
|
||||
* Permission to use, copy, modify, and distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef __IF_WPI_DEBUG_H__
|
||||
#define __IF_WPI_DEBUG_H__
|
||||
|
||||
#ifdef WPI_DEBUG
|
||||
enum {
|
||||
WPI_DEBUG_XMIT = 0x00000001, /* basic xmit operation */
|
||||
WPI_DEBUG_RECV = 0x00000002, /* basic recv operation */
|
||||
WPI_DEBUG_STATE = 0x00000004, /* 802.11 state transitions */
|
||||
WPI_DEBUG_HW = 0x00000008, /* Stage 1 (eeprom) debugging */
|
||||
WPI_DEBUG_RESET = 0x00000010, /* reset processing */
|
||||
WPI_DEBUG_FIRMWARE = 0x00000020, /* firmware(9) loading debug */
|
||||
WPI_DEBUG_BEACON = 0x00000040, /* beacon handling */
|
||||
WPI_DEBUG_WATCHDOG = 0x00000080, /* watchdog timeout */
|
||||
WPI_DEBUG_INTR = 0x00000100, /* ISR */
|
||||
WPI_DEBUG_SCAN = 0x00000200, /* Scan related operations */
|
||||
WPI_DEBUG_NOTIFY = 0x00000400, /* State 2 Notif intr debug */
|
||||
WPI_DEBUG_TEMP = 0x00000800, /* TXPower/Temp Calibration */
|
||||
WPI_DEBUG_CMD = 0x00001000, /* cmd submission */
|
||||
WPI_DEBUG_TRACE = 0x00002000, /* Print begin and start driver function */
|
||||
WPI_DEBUG_PWRSAVE = 0x00004000, /* Power save operations */
|
||||
WPI_DEBUG_EEPROM = 0x00008000, /* EEPROM info */
|
||||
WPI_DEBUG_NODE = 0x00010000, /* node addition/removal */
|
||||
WPI_DEBUG_KEY = 0x00020000, /* node key management */
|
||||
WPI_DEBUG_EDCA = 0x00040000, /* WME info */
|
||||
WPI_DEBUG_REGISTER = 0x00080000, /* print chipset register */
|
||||
WPI_DEBUG_BMISS = 0x00100000, /* print number of missed beacons */
|
||||
WPI_DEBUG_ANY = 0xffffffff
|
||||
};
|
||||
|
||||
#define DPRINTF(sc, m, ...) do { \
|
||||
if (sc->sc_debug & (m)) \
|
||||
printf(__VA_ARGS__); \
|
||||
} while (0)
|
||||
|
||||
#define TRACE_STR_BEGIN "->%s: begin\n"
|
||||
#define TRACE_STR_DOING "->Doing %s\n"
|
||||
#define TRACE_STR_END "->%s: end\n"
|
||||
#define TRACE_STR_END_ERR "->%s: end in error\n"
|
||||
|
||||
#define WPI_DESC(x) case x: return #x
|
||||
|
||||
static const char *wpi_cmd_str(int cmd)
|
||||
{
|
||||
switch (cmd) {
|
||||
/* Notifications. */
|
||||
WPI_DESC(WPI_UC_READY);
|
||||
WPI_DESC(WPI_RX_DONE);
|
||||
WPI_DESC(WPI_START_SCAN);
|
||||
WPI_DESC(WPI_SCAN_RESULTS);
|
||||
WPI_DESC(WPI_STOP_SCAN);
|
||||
WPI_DESC(WPI_BEACON_SENT);
|
||||
WPI_DESC(WPI_RX_STATISTICS);
|
||||
WPI_DESC(WPI_BEACON_STATISTICS);
|
||||
WPI_DESC(WPI_STATE_CHANGED);
|
||||
WPI_DESC(WPI_BEACON_MISSED);
|
||||
|
||||
/* Command notifications. */
|
||||
WPI_DESC(WPI_CMD_RXON);
|
||||
WPI_DESC(WPI_CMD_RXON_ASSOC);
|
||||
WPI_DESC(WPI_CMD_EDCA_PARAMS);
|
||||
WPI_DESC(WPI_CMD_TIMING);
|
||||
WPI_DESC(WPI_CMD_ADD_NODE);
|
||||
WPI_DESC(WPI_CMD_DEL_NODE);
|
||||
WPI_DESC(WPI_CMD_TX_DATA);
|
||||
WPI_DESC(WPI_CMD_MRR_SETUP);
|
||||
WPI_DESC(WPI_CMD_SET_LED);
|
||||
WPI_DESC(WPI_CMD_SET_POWER_MODE);
|
||||
WPI_DESC(WPI_CMD_SCAN);
|
||||
WPI_DESC(WPI_CMD_SCAN_ABORT);
|
||||
WPI_DESC(WPI_CMD_SET_BEACON);
|
||||
WPI_DESC(WPI_CMD_TXPOWER);
|
||||
WPI_DESC(WPI_CMD_BT_COEX);
|
||||
|
||||
default:
|
||||
return "UNKNOWN CMD";
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Translate CSR code to string
|
||||
*/
|
||||
static const char *wpi_get_csr_string(size_t csr)
|
||||
{
|
||||
switch (csr) {
|
||||
WPI_DESC(WPI_HW_IF_CONFIG);
|
||||
WPI_DESC(WPI_INT);
|
||||
WPI_DESC(WPI_INT_MASK);
|
||||
WPI_DESC(WPI_FH_INT);
|
||||
WPI_DESC(WPI_GPIO_IN);
|
||||
WPI_DESC(WPI_RESET);
|
||||
WPI_DESC(WPI_GP_CNTRL);
|
||||
WPI_DESC(WPI_EEPROM);
|
||||
WPI_DESC(WPI_EEPROM_GP);
|
||||
WPI_DESC(WPI_GIO);
|
||||
WPI_DESC(WPI_UCODE_GP1);
|
||||
WPI_DESC(WPI_UCODE_GP2);
|
||||
WPI_DESC(WPI_GIO_CHICKEN);
|
||||
WPI_DESC(WPI_ANA_PLL);
|
||||
WPI_DESC(WPI_DBG_HPET_MEM);
|
||||
default:
|
||||
KASSERT(0, ("Unknown CSR: %d\n", csr));
|
||||
return "UNKNOWN CSR";
|
||||
}
|
||||
}
|
||||
|
||||
static const char *wpi_get_prph_string(size_t prph)
|
||||
{
|
||||
switch (prph) {
|
||||
WPI_DESC(WPI_APMG_CLK_CTRL);
|
||||
WPI_DESC(WPI_APMG_PS);
|
||||
WPI_DESC(WPI_APMG_PCI_STT);
|
||||
WPI_DESC(WPI_APMG_RFKILL);
|
||||
default:
|
||||
KASSERT(0, ("Unknown register: %d\n", prph));
|
||||
return "UNKNOWN PRPH";
|
||||
}
|
||||
}
|
||||
|
||||
#else
|
||||
#define DPRINTF(sc, m, ...) do { (void) sc; } while (0)
|
||||
#endif
|
||||
|
||||
#endif /* __IF_WPI_DEBUG_H__ */
|
||||
@@ -1,298 +0,0 @@
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2006,2007
|
||||
* Damien Bergamini <damien.bergamini@free.fr>
|
||||
*
|
||||
* Permission to use, copy, modify, and distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
struct wpi_rx_radiotap_header {
|
||||
struct ieee80211_radiotap_header wr_ihdr;
|
||||
uint64_t wr_tsft;
|
||||
uint8_t wr_flags;
|
||||
uint8_t wr_rate;
|
||||
uint16_t wr_chan_freq;
|
||||
uint16_t wr_chan_flags;
|
||||
int8_t wr_dbm_antsignal;
|
||||
int8_t wr_dbm_antnoise;
|
||||
uint8_t wr_antenna;
|
||||
} __packed __aligned(8);
|
||||
|
||||
#define WPI_RX_RADIOTAP_PRESENT \
|
||||
((1 << IEEE80211_RADIOTAP_TSFT) | \
|
||||
(1 << IEEE80211_RADIOTAP_FLAGS) | \
|
||||
(1 << IEEE80211_RADIOTAP_RATE) | \
|
||||
(1 << IEEE80211_RADIOTAP_CHANNEL) | \
|
||||
(1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) | \
|
||||
(1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) | \
|
||||
(1 << IEEE80211_RADIOTAP_ANTENNA))
|
||||
|
||||
struct wpi_tx_radiotap_header {
|
||||
struct ieee80211_radiotap_header wt_ihdr;
|
||||
uint8_t wt_flags;
|
||||
uint8_t wt_rate;
|
||||
uint16_t wt_chan_freq;
|
||||
uint16_t wt_chan_flags;
|
||||
} __packed;
|
||||
|
||||
#define WPI_TX_RADIOTAP_PRESENT \
|
||||
((1 << IEEE80211_RADIOTAP_FLAGS) | \
|
||||
(1 << IEEE80211_RADIOTAP_RATE) | \
|
||||
(1 << IEEE80211_RADIOTAP_CHANNEL))
|
||||
|
||||
struct wpi_dma_info {
|
||||
bus_dma_tag_t tag;
|
||||
bus_dmamap_t map;
|
||||
bus_addr_t paddr;
|
||||
caddr_t vaddr;
|
||||
bus_size_t size;
|
||||
};
|
||||
|
||||
struct wpi_tx_data {
|
||||
bus_dmamap_t map;
|
||||
bus_addr_t cmd_paddr;
|
||||
struct mbuf *m;
|
||||
struct ieee80211_node *ni;
|
||||
int hdrlen;
|
||||
};
|
||||
|
||||
struct wpi_tx_ring {
|
||||
struct wpi_dma_info desc_dma;
|
||||
struct wpi_dma_info cmd_dma;
|
||||
struct wpi_tx_desc *desc;
|
||||
struct wpi_tx_cmd *cmd;
|
||||
struct wpi_tx_data data[WPI_TX_RING_COUNT];
|
||||
bus_dma_tag_t data_dmat;
|
||||
uint8_t qid;
|
||||
uint8_t cur;
|
||||
uint8_t pending;
|
||||
int16_t queued;
|
||||
bool update:1;
|
||||
};
|
||||
|
||||
struct wpi_rx_data {
|
||||
struct mbuf *m;
|
||||
bus_dmamap_t map;
|
||||
};
|
||||
|
||||
struct wpi_rx_ring {
|
||||
struct wpi_dma_info desc_dma;
|
||||
uint32_t *desc;
|
||||
struct wpi_rx_data data[WPI_RX_RING_COUNT];
|
||||
bus_dma_tag_t data_dmat;
|
||||
uint16_t cur;
|
||||
int update;
|
||||
};
|
||||
|
||||
struct wpi_node {
|
||||
struct ieee80211_node ni; /* must be the first */
|
||||
uint8_t id;
|
||||
};
|
||||
#define WPI_NODE(ni) ((struct wpi_node *)(ni))
|
||||
|
||||
struct wpi_power_sample {
|
||||
uint8_t index;
|
||||
int8_t power;
|
||||
};
|
||||
|
||||
struct wpi_power_group {
|
||||
#define WPI_SAMPLES_COUNT 5
|
||||
struct wpi_power_sample samples[WPI_SAMPLES_COUNT];
|
||||
uint8_t chan;
|
||||
int8_t maxpwr;
|
||||
int16_t temp;
|
||||
};
|
||||
|
||||
struct wpi_buf {
|
||||
uint8_t data[56]; /* sizeof(struct wpi_cmd_beacon) */
|
||||
struct ieee80211_node *ni;
|
||||
struct mbuf *m;
|
||||
size_t size;
|
||||
uint8_t code;
|
||||
uint16_t ac;
|
||||
};
|
||||
|
||||
struct wpi_vap {
|
||||
struct ieee80211vap wv_vap;
|
||||
|
||||
struct wpi_buf wv_bcbuf;
|
||||
struct mtx wv_mtx;
|
||||
|
||||
uint8_t wv_gtk;
|
||||
#define WPI_VAP_KEY(kid) (1 << kid)
|
||||
|
||||
int (*wv_newstate)(struct ieee80211vap *,
|
||||
enum ieee80211_state, int);
|
||||
void (*wv_recv_mgmt)(struct ieee80211_node *,
|
||||
struct mbuf *, int,
|
||||
const struct ieee80211_rx_stats *,
|
||||
int, int);
|
||||
};
|
||||
#define WPI_VAP(vap) ((struct wpi_vap *)(vap))
|
||||
|
||||
#define WPI_VAP_LOCK_INIT(_wvp) \
|
||||
mtx_init(&(_wvp)->wv_mtx, "lock for wv_bcbuf/wv_boff structures", \
|
||||
NULL, MTX_DEF)
|
||||
#define WPI_VAP_LOCK(_wvp) mtx_lock(&(_wvp)->wv_mtx)
|
||||
#define WPI_VAP_UNLOCK(_wvp) mtx_unlock(&(_wvp)->wv_mtx)
|
||||
#define WPI_VAP_LOCK_ASSERT(_wvp) mtx_assert(&(_wvp)->wv_mtx, MA_OWNED)
|
||||
#define WPI_VAP_LOCK_DESTROY(_wvp) mtx_destroy(&(_wvp)->wv_mtx)
|
||||
|
||||
struct wpi_fw_part {
|
||||
const uint8_t *text;
|
||||
uint32_t textsz;
|
||||
const uint8_t *data;
|
||||
uint32_t datasz;
|
||||
};
|
||||
|
||||
struct wpi_fw_info {
|
||||
const uint8_t *data;
|
||||
size_t size;
|
||||
struct wpi_fw_part init;
|
||||
struct wpi_fw_part main;
|
||||
struct wpi_fw_part boot;
|
||||
};
|
||||
|
||||
struct wpi_softc {
|
||||
device_t sc_dev;
|
||||
int sc_debug;
|
||||
|
||||
int sc_running;
|
||||
|
||||
struct mtx sc_mtx;
|
||||
struct ieee80211com sc_ic;
|
||||
struct ieee80211_ratectl_tx_status sc_txs;
|
||||
|
||||
struct mtx tx_mtx;
|
||||
|
||||
/* Shared area. */
|
||||
struct wpi_dma_info shared_dma;
|
||||
struct wpi_shared *shared;
|
||||
|
||||
struct wpi_tx_ring txq[WPI_DRV_NTXQUEUES];
|
||||
struct mtx txq_mtx;
|
||||
struct mtx txq_state_mtx;
|
||||
|
||||
struct wpi_rx_ring rxq;
|
||||
uint64_t rx_tstamp;
|
||||
|
||||
/* TX Thermal Callibration. */
|
||||
struct callout calib_to;
|
||||
|
||||
struct callout scan_timeout;
|
||||
struct callout tx_timeout;
|
||||
|
||||
/* Watch dog timer. */
|
||||
struct callout watchdog_rfkill;
|
||||
|
||||
/* Firmware image. */
|
||||
struct wpi_fw_info fw;
|
||||
uint32_t errptr;
|
||||
|
||||
struct resource *irq;
|
||||
struct resource *mem;
|
||||
bus_space_tag_t sc_st;
|
||||
bus_space_handle_t sc_sh;
|
||||
void *sc_ih;
|
||||
bus_size_t sc_sz;
|
||||
int sc_cap_off; /* PCIe Capabilities. */
|
||||
|
||||
struct wpi_rxon rxon;
|
||||
struct mtx rxon_mtx;
|
||||
|
||||
int temp;
|
||||
|
||||
uint32_t nodesmsk;
|
||||
struct mtx nt_mtx;
|
||||
|
||||
void (*sc_node_free)(struct ieee80211_node *);
|
||||
void (*sc_update_rx_ring)(struct wpi_softc *);
|
||||
void (*sc_update_tx_ring)(struct wpi_softc *,
|
||||
struct wpi_tx_ring *);
|
||||
|
||||
struct wpi_rx_radiotap_header sc_rxtap;
|
||||
struct wpi_tx_radiotap_header sc_txtap;
|
||||
|
||||
/* Firmware image. */
|
||||
const struct firmware *fw_fp;
|
||||
|
||||
/* Firmware DMA transfer. */
|
||||
struct wpi_dma_info fw_dma;
|
||||
|
||||
/* Tasks used by the driver. */
|
||||
struct task sc_radiooff_task;
|
||||
struct task sc_radioon_task;
|
||||
|
||||
/* Eeprom info. */
|
||||
uint8_t cap;
|
||||
uint16_t rev;
|
||||
uint8_t type;
|
||||
struct wpi_eeprom_chan
|
||||
eeprom_channels[WPI_CHAN_BANDS_COUNT][WPI_MAX_CHAN_PER_BAND];
|
||||
struct wpi_power_group groups[WPI_POWER_GROUPS_COUNT];
|
||||
int8_t maxpwr[IEEE80211_CHAN_MAX];
|
||||
char domain[4]; /* Regulatory domain. */
|
||||
|
||||
#if defined(__HAIKU__)
|
||||
uint32_t sc_intr_status_1;
|
||||
uint32_t sc_intr_status_2;
|
||||
#endif
|
||||
};
|
||||
|
||||
/*
|
||||
* Locking order:
|
||||
* 1. WPI_LOCK;
|
||||
* 2. WPI_RXON_LOCK;
|
||||
* 3. WPI_TX_LOCK;
|
||||
* 4. WPI_NT_LOCK / WPI_VAP_LOCK;
|
||||
* 5. WPI_TXQ_LOCK;
|
||||
* 6. WPI_TXQ_STATE_LOCK;
|
||||
*/
|
||||
|
||||
#define WPI_LOCK_INIT(_sc) \
|
||||
mtx_init(&(_sc)->sc_mtx, device_get_nameunit((_sc)->sc_dev), \
|
||||
MTX_NETWORK_LOCK, MTX_DEF)
|
||||
#define WPI_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
|
||||
#define WPI_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
|
||||
#define WPI_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED)
|
||||
#define WPI_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx)
|
||||
|
||||
#define WPI_RXON_LOCK_INIT(_sc) \
|
||||
mtx_init(&(_sc)->rxon_mtx, "lock for wpi_rxon structure", NULL, MTX_DEF)
|
||||
#define WPI_RXON_LOCK(_sc) mtx_lock(&(_sc)->rxon_mtx)
|
||||
#define WPI_RXON_UNLOCK(_sc) mtx_unlock(&(_sc)->rxon_mtx)
|
||||
#define WPI_RXON_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->rxon_mtx, MA_OWNED)
|
||||
#define WPI_RXON_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->rxon_mtx)
|
||||
|
||||
#define WPI_TX_LOCK_INIT(_sc) \
|
||||
mtx_init(&(_sc)->tx_mtx, "tx path lock", NULL, MTX_DEF)
|
||||
#define WPI_TX_LOCK(_sc) mtx_lock(&(_sc)->tx_mtx)
|
||||
#define WPI_TX_UNLOCK(_sc) mtx_unlock(&(_sc)->tx_mtx)
|
||||
#define WPI_TX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->tx_mtx)
|
||||
|
||||
#define WPI_NT_LOCK_INIT(_sc) \
|
||||
mtx_init(&(_sc)->nt_mtx, "node table lock", NULL, MTX_DEF)
|
||||
#define WPI_NT_LOCK(_sc) mtx_lock(&(_sc)->nt_mtx)
|
||||
#define WPI_NT_UNLOCK(_sc) mtx_unlock(&(_sc)->nt_mtx)
|
||||
#define WPI_NT_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->nt_mtx)
|
||||
|
||||
#define WPI_TXQ_LOCK_INIT(_sc) \
|
||||
mtx_init(&(_sc)->txq_mtx, "txq/cmdq lock", NULL, MTX_DEF)
|
||||
#define WPI_TXQ_LOCK(_sc) mtx_lock(&(_sc)->txq_mtx)
|
||||
#define WPI_TXQ_UNLOCK(_sc) mtx_unlock(&(_sc)->txq_mtx)
|
||||
#define WPI_TXQ_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->txq_mtx)
|
||||
|
||||
#define WPI_TXQ_STATE_LOCK_INIT(_sc) \
|
||||
mtx_init(&(_sc)->txq_state_mtx, "txq state lock", NULL, MTX_DEF)
|
||||
#define WPI_TXQ_STATE_LOCK(_sc) mtx_lock(&(_sc)->txq_state_mtx)
|
||||
#define WPI_TXQ_STATE_UNLOCK(_sc) mtx_unlock(&(_sc)->txq_state_mtx)
|
||||
#define WPI_TXQ_STATE_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->txq_state_mtx)
|
||||
@@ -1,57 +1,24 @@
|
||||
/*
|
||||
* Copyright 2009, Colin Günther, coling@gmx.de.
|
||||
* Copyright 2018, Haiku, Inc.
|
||||
* All rights reserved. Distributed under the terms of the MIT license.
|
||||
* Copyright 2025, Haiku, Inc. All rights reserved.
|
||||
* Distributed under the terms of the MIT License.
|
||||
*/
|
||||
|
||||
|
||||
#include <sys/bus.h>
|
||||
#include <sys/kernel.h>
|
||||
|
||||
#include <machine/bus.h>
|
||||
|
||||
#include <net/if.h>
|
||||
#include <net/if_media.h>
|
||||
|
||||
#include <net80211/ieee80211_var.h>
|
||||
#include <net80211/ieee80211_ratectl.h>
|
||||
|
||||
#include <dev/wpi/if_wpireg.h>
|
||||
#include <dev/wpi/if_wpivar.h>
|
||||
#include <sys/haiku-module.h>
|
||||
|
||||
|
||||
HAIKU_FBSD_WLAN_DRIVER_GLUE(iprowifi3945, wpi, pci)
|
||||
NO_HAIKU_FBSD_MII_DRIVER();
|
||||
NO_HAIKU_REENABLE_INTERRUPTS();
|
||||
HAIKU_DRIVER_REQUIREMENTS(FBSD_WLAN);
|
||||
HAIKU_FIRMWARE_VERSION(2144);
|
||||
HAIKU_DRIVER_REQUIREMENTS(OBSD_WLAN);
|
||||
HAIKU_FIRMWARE_VERSION(1);
|
||||
HAIKU_FIRMWARE_NAME_MAP({
|
||||
{"wpifw", "iwlwifi-3945-15.ucode"}
|
||||
{"wpi-3945abg", "iwlwifi-3945-15.ucode"}
|
||||
});
|
||||
|
||||
|
||||
int
|
||||
HAIKU_CHECK_DISABLE_INTERRUPTS(device_t dev)
|
||||
{
|
||||
struct wpi_softc* sc = (struct wpi_softc*)device_get_softc(dev);
|
||||
uint32 r1, r2;
|
||||
|
||||
r1 = WPI_READ(sc, WPI_INT);
|
||||
|
||||
if (__predict_false(r1 == 0xffffffff ||
|
||||
(r1 & 0xfffffff0) == 0xa5a5a5a0))
|
||||
return 0; /* Hardware gone! */
|
||||
|
||||
r2 = WPI_READ(sc, WPI_FH_INT);
|
||||
|
||||
if (r1 == 0 && r2 == 0)
|
||||
return 0; /* Interrupt not for us. */
|
||||
|
||||
/* Disable interrupts. */
|
||||
WPI_WRITE(sc, WPI_INT_MASK, 0);
|
||||
|
||||
atomic_set((int32*)&sc->sc_intr_status_1, r1);
|
||||
atomic_set((int32*)&sc->sc_intr_status_2, r2);
|
||||
|
||||
// We only support MSI, so we handle all interrupts.
|
||||
return 1;
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user