i2p/haiku-beta6
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

The intel_extreme driver now finally works with the i965 chipset;

Browse Source 
acceleration works fine, but overlay doesn't - that's next on my list.
Turns out the i965 differentiates between RGB-32 and RGB-32-alpha, and 
didn't like trying to use the latter as display mode (the i865 didn't 
care at all)... finding that took me *way* too long, though.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@22780 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Axel Dörfler
2007-10-31 19:23:59 +00:00
parent 3ca9267ce3
commit 61291964c3
2 changed files with 7 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files
headers/private/graphics/intel_extreme/intel_extreme.h
+1 -1
View File
@@ -204,7 +204,7 @@ struct intel_free_graphics_memory {
#define DISPLAY_CONTROL_CMAP8 (2UL << 26) #define DISPLAY_CONTROL_CMAP8 (2UL << 26)
#define DISPLAY_CONTROL_RGB15 (4UL << 26) #define DISPLAY_CONTROL_RGB15 (4UL << 26)
#define DISPLAY_CONTROL_RGB16 (5UL << 26) #define DISPLAY_CONTROL_RGB16 (5UL << 26)
#define DISPLAY_CONTROL_RGB32 (7UL << 26) #define DISPLAY_CONTROL_RGB32 (6UL << 26)
#define INTEL_VGA_DISPLAY_CONTROL 0x71400 #define INTEL_VGA_DISPLAY_CONTROL 0x71400
#define VGA_DISPLAY_DISABLED (1UL << 31) #define VGA_DISPLAY_DISABLED (1UL << 31)
src/add-ons/accelerants/intel_extreme/mode.cpp
+6 -6
View File
@@ -483,12 +483,7 @@ if (first) {
write32(INTEL_DISPLAY_A_PLL, pll); write32(INTEL_DISPLAY_A_PLL, pll);
read32(INTEL_DISPLAY_A_PLL); read32(INTEL_DISPLAY_A_PLL);
spin(150); spin(150);
#if 0
write32(INTEL_DISPLAY_A_PLL, DISPLAY_PLL_ENABLED | DISPLAY_PLL_2X_CLOCK
| DISPLAY_PLL_NO_VGA_CONTROL | DISPLAY_PLL_DIVIDE_4X
| (((divisors.post1 - 2) << DISPLAY_PLL_POST1_DIVISOR_SHIFT) & DISPLAY_PLL_POST1_DIVISOR_MASK)
| (divisorRegister == INTEL_DISPLAY_A_PLL_DIVISOR_1 ? DISPLAY_PLL_DIVISOR_1 : 0));
#endif
// update timing parameters // update timing parameters
write32(INTEL_DISPLAY_A_HTOTAL, ((uint32)(target.timing.h_total - 1) << 16) write32(INTEL_DISPLAY_A_HTOTAL, ((uint32)(target.timing.h_total - 1) << 16)
| ((uint32)target.timing.h_display - 1)); | ((uint32)target.timing.h_display - 1));
@@ -513,6 +508,9 @@ if (first) {
| ((target.timing.flags & B_POSITIVE_VSYNC) != 0 ? DISPLAY_MONITOR_POSITIVE_VSYNC : 0)); | ((target.timing.flags & B_POSITIVE_VSYNC) != 0 ? DISPLAY_MONITOR_POSITIVE_VSYNC : 0));
} }
// TODO: verify the two comments below: the X driver doesn't seem to
// care about both of them!
// These two have to be set for display B, too - this obviously means // These two have to be set for display B, too - this obviously means
// that the second head always must adopt the color space of the first // that the second head always must adopt the color space of the first
// head. // head.
@@ -650,6 +648,8 @@ intel_get_display_mode(display_mode *_currentMode)
status_t status_t
intel_get_edid_info(void* info, size_t size, uint32* _version) intel_get_edid_info(void* info, size_t size, uint32* _version)
{ {
TRACE(("intel_get_edid_info()\n"));
if (!gInfo->has_edid) if (!gInfo->has_edid)
return B_ERROR; return B_ERROR;
if (size < sizeof(struct edid1_info)) if (size < sizeof(struct edid1_info))