Merge branch 'master' into sam460ex

This commit is contained in:
François Revol
2012-09-15 19:43:11 +02:00
17 changed files with 292 additions and 115 deletions
+18 -18
View File
@@ -38,24 +38,24 @@ if [ IsOptionalHaikuImagePackageAdded AllegroLibs ] {
Echo "No optional package AllegroLibs available for $(TARGET_ARCH)" ;
} else if $(HAIKU_GCC_VERSION[1]) >= 4 {
InstallOptionalHaikuImagePackage
allegro-4.4.1.1-r1a3-x86-gcc4-2011-05-26.zip
: $(baseURL)/lib/allegro-4.4.1.1-r1a3-x86-gcc4-2011-05-26.zip ;
allegro-4.4.1.1-r1a4-x86-gcc4-2012-09-09.zip
: $(baseURL)/lib/allegro-4.4.1.1-r1a4-x86-gcc4-2012-09-09.zip ;
InstallOptionalHaikuImagePackage
dumb-0.9.3-r1a3-x86-gcc4-2011-05-26.zip
: $(baseURL)/lib/dumb-0.9.3-r1a3-x86-gcc4-2011-05-26.zip ;
dumb-0.9.3-r1a4-x86-gcc4-2012-09-09.zip
: $(baseURL)/lib/dumb-0.9.3-r1a4-x86-gcc4-2012-09-09.zip ;
InstallOptionalHaikuImagePackage
jgmod-0.99-r1a3-x86-gcc4-2011-05-26.zip
: $(baseURL)/lib/jgmod-0.99-r1a3-x86-gcc4-2011-05-26.zip ;
jgmod-0.99-r1a4-x86-gcc4-2012-09-09.zip
: $(baseURL)/lib/jgmod-0.99-r1a4-x86-gcc4-2012-09-09.zip ;
} else {
InstallOptionalHaikuImagePackage
allegro-4.4.1.1-r1a3-x86-gcc2-2011-05-19.zip
: $(baseURL)/lib/allegro-4.4.1.1-r1a3-x86-gcc2-2011-05-19.zip ;
allegro-4.4.1.1-r1a4-x86-gcc2-2012-08-30.zip
: $(baseURL)/lib/allegro-4.4.1.1-r1a4-x86-gcc2-2012-08-30.zip ;
InstallOptionalHaikuImagePackage
dumb-0.9.3-x86-r1a3-x86-gcc2-2011-05-19.zip
: $(baseURL)/lib/dumb-0.9.3-r1a3-x86-gcc2-2011-05-19.zip ;
dumb-0.9.3-r1a4-x86-gcc2-2012-08-30.zip
: $(baseURL)/lib/dumb-0.9.3-r1a4-x86-gcc2-2012-08-30.zip ;
InstallOptionalHaikuImagePackage
jgmod-0.99-x86-gcc2-2011-08-02.zip
: $(baseURL)/lib/jgmod-0.99-x86-gcc2-2011-08-02.zip ;
jgmod-0.99-r1a4-x86-gcc2-2012-08-30.zip
: $(baseURL)/lib/jgmod-0.99-r1a4-x86-gcc2-2012-08-30.zip ;
}
}
@@ -67,8 +67,8 @@ if [ IsOptionalHaikuImagePackageAdded box2d ] {
} else {
if $(HAIKU_GCC_VERSION[1]) >= 4 || $(isHybridBuild) {
InstallOptionalHaikuImagePackage
box2d-2.1.2-r1a3-r1a3-x86-gcc4-2011-05-26.zip
: $(baseURL)/lib/box2d-2.1.2-r1a3-x86-gcc4-2011-05-26.zip
box2d-2.1.2-r1a4-x86-gcc4-2012-09-09.zip
: $(baseURL)/lib/box2d-2.1.2-r1a4-x86-gcc4-2012-09-09.zip
: : true ;
} else {
Echo "No optional package box2d available for $(TARGET_ARCH)-gcc2" ;
@@ -209,13 +209,13 @@ if [ IsOptionalHaikuImagePackageAdded physfs ] {
Echo "No optional package physfs available for $(TARGET_ARCH)" ;
} else if $(HAIKU_GCC_VERSION[1]) >= 4 {
InstallOptionalHaikuImagePackage
physfs-2.0.1-r1a3-x86-gcc4-2011-05-26.zip
: $(baseURL)/lib/physfs-2.0.1-r1a3-x86-gcc4-2011-05-26.zip
physfs-2.0.1-r1a4-x86-gcc4-2012-09-09.zip
: $(baseURL)/lib/physfs-2.0.1-r1a4-x86-gcc4-2012-09-09.zip
: : true ;
} else {
InstallOptionalHaikuImagePackage
physfs-2.0.1-r1a3-x86-gcc2-2011-05-19.zip
: $(baseURL)/lib/physfs-2.0.1-r1a3-x86-gcc2-2011-05-19.zip
physfs-2.0.1-r1a4-x86-gcc2-2012-08-29.zip
: $(baseURL)/lib/physfs-2.0.1-r1a4-x86-gcc2-2012-08-29.zip
: : true ;
}
}
+55 -26
View File
@@ -45,6 +45,7 @@ if $(HAIKU_ADD_ALTERNATIVE_GCC_LIBS) = 1
# DevelopmentMin - development headers, libs, tools, from sources only
# DevelopmentPowerPC - Cross compiling environment for PowerPC
# Doxygen - Generate documentation from source code
# Droid - Font family from Google's Android project
# Expat - XML parsing libraries
# Fastdep - fast dependency generator for C/C++ files
# friss - RSS/ATOM/... feeds reader
@@ -68,6 +69,7 @@ if $(HAIKU_ADD_ALTERNATIVE_GCC_LIBS) = 1
# Man - standard commands to read man pages
# Mercurial - the distributed version control system
# Nano - the command line text editor
# Nanumfont - Korean monospace font
# Neon - support libraries used for example by SVN
# NetFS - the native networked file system components
# NetSurf - the web browser
@@ -213,8 +215,8 @@ if [ IsOptionalHaikuImagePackageAdded Beam ] {
} else {
if $(HAIKU_GCC_VERSION[1]) >= 4 {
InstallOptionalHaikuImagePackage
beam-1.2alpha-x86-gcc4-2012-08-11.zip
: $(baseURL)/beam-1.2alpha-x86-gcc4-2012-08-11.zip ;
beam-1.2alpha-r1a4-x86-gcc4-2012-09-12.zip
: $(baseURL)/beam-1.2alpha-r1a4-x86-gcc4-2012-09-12.zip ;
} else {
InstallOptionalHaikuImagePackage
beam-1.2alpha-r1a4-x86-gcc2-2012-08-29.zip
@@ -715,8 +717,8 @@ if [ IsOptionalHaikuImagePackageAdded DevelopmentBase ]
m4-1.4.16-r1a4-x86-gcc2-2012-08-26.zip
: $(baseURL)/m4-1.4.16-r1a4-x86-gcc2-2012-08-26.zip ;
InstallOptionalHaikuImagePackage
flex-2.5.35-r1a4-x86-gcc2-2012-08-26.zip
: $(baseURL)/flex-2.5.35-r1a4-x86-gcc2-2012-08-26.zip ;
flex-2.5.35-r1a4-x86-gcc2-2012-09-10.zip
: $(baseURL)/flex-2.5.35-r1a4-x86-gcc2-2012-09-10.zip ;
InstallOptionalHaikuImagePackage
jam-2.5-r1a4-x86-gcc2-2012-08-27.zip
: $(baseURL)/jam-2.5-r1a4-x86-gcc2-2012-08-27.zip ;
@@ -846,6 +848,13 @@ if [ IsOptionalHaikuImagePackageAdded DevelopmentMin ] && $(TARGET_ARCH) = x86 {
AddHeaderDirectoryToHaikuImage libs tiff : 3rdparty ;
AddHeaderDirectoryToHaikuImage libs zlib : 3rdparty ;
CopyDirectoryToHaikuImage develop headers :
[ FDirName $(HAIKU_FREETYPE_DIR) develop headers 3rdparty ] ;
CopyDirectoryToHaikuImage develop headers : $(HAIKU_JPEG_HEADERS)
: 3rdparty ;
CopyDirectoryToHaikuImage develop headers : $(HAIKU_LIBPNG_HEADERS)
: 3rdparty ;
# cpp headers
if $(HAIKU_GCC_VERSION[1]) = 2 {
# GCC 2 only -- for GCC 4 they come with the DevelopmentBase package
@@ -898,8 +907,8 @@ if [ IsOptionalHaikuImagePackageAdded Doxygen ] {
} else {
if $(HAIKU_GCC_VERSION[1]) >= 4 {
InstallOptionalHaikuImagePackage
doxygen-1.6.3-x86-gcc4-2010-05-17.zip
: $(baseURL)/doxygen-1.6.3-x86-gcc4-2010-05-17.zip
doxygen-1.6.3-r1a4-x86-gcc4-2012-09-04.zip
: $(baseURL)/doxygen-1.6.3-r1a4-x86-gcc4-2012-09-04.zip
: : true ;
} else {
InstallOptionalHaikuImagePackage
@@ -911,6 +920,14 @@ if [ IsOptionalHaikuImagePackageAdded Doxygen ] {
}
# Droid
if [ IsOptionalHaikuImagePackageAdded Droid ] {
InstallOptionalHaikuImagePackage
droid-113-r1a4-x86-gcc2-2012-08-27.zip
: $(baseURL)/droid-113-r1a4-x86-gcc2-2012-08-27.zip ;
}
# Expat
if [ IsOptionalHaikuImagePackageAdded Expat ] {
if $(TARGET_ARCH) != x86 {
@@ -954,8 +971,8 @@ if [ IsOptionalHaikuImagePackageAdded friss ] {
} else {
if $(HAIKU_GCC_VERSION[1]) >= 4 {
InstallOptionalHaikuImagePackage
friss-24-r1a3-x86-gcc4-2011-05-31.zip
: $(baseURL)/friss-24-r1a3-x86-gcc4-2011-05-31.zip ;
friss-29-r1a4-x86-gcc4-2012-09-09.zip
: $(baseURL)/friss-29-r1a4-x86-gcc4-2012-09-09.zip ;
} else {
InstallOptionalHaikuImagePackage
friss-29-r1a4-x86-gcc2-2012-08-28.zip
@@ -1141,12 +1158,12 @@ if [ IsOptionalHaikuImagePackageAdded KeymapSwitcher ] {
} else {
if $(HAIKU_GCC_VERSION[1]) >= 4 {
InstallOptionalHaikuImagePackage
KeymapSwitcher-1.2.7-x86-gcc4-2012-05-19.zip
: $(baseURL)/KeymapSwitcher-1.2.7-x86-gcc4-2012-05-19.zip ;
KeymapSwitcher-1.2.7-r1a4-x86-gcc4-2012-09-09.zip
: $(baseURL)/KeymapSwitcher-1.2.7-r1a4-x86-gcc4-2012-09-09.zip ;
} else {
InstallOptionalHaikuImagePackage
KeymapSwitcher-1.2.7-x86-gcc2-2012-05-19.zip
: $(baseURL)/KeymapSwitcher-1.2.7-x86-gcc2-2012-05-19.zip ;
KeymapSwitcher-1.2.7-r1a4-x86-gcc2-2012-08-31.zip
: $(baseURL)/KeymapSwitcher-1.2.7-r1a4-x86-gcc2-2012-08-31.zip ;
}
AddSymlinkToHaikuImage home config settings deskbar Preferences
: /boot/common/bin/KeymapSwitcher ;
@@ -1273,8 +1290,12 @@ if [ IsOptionalHaikuImagePackageAdded LibXSLT ] {
if [ IsOptionalHaikuImagePackageAdded Links ] {
if $(TARGET_ARCH) != x86 {
Echo "No optional package Links available for $(TARGET_ARCH)" ;
} else if $(HAIKU_GCC_VERSION[1]) >= 4 && ! $(isHybridBuild) {
Echo "No optional package Links available for gcc4" ;
} else if $(HAIKU_GCC_VERSION[1]) >= 4 {
InstallOptionalHaikuImagePackage
links-2.3pre2-r1a4-x86-gcc4-2012-09-09.zip
: $(baseURL)/links-2.3pre2-r1a4-x86-gcc4-2012-09-09.zip ;
AddSymlinkToHaikuImage home config settings deskbar Applications
: /boot/home/config/bin/links ;
} else {
InstallOptionalHaikuImagePackage
links-2.3pre2-r1a4-x86-gcc2-2012-08-30.zip
@@ -1365,6 +1386,14 @@ if [ IsOptionalHaikuImagePackageAdded Nano ] {
}
# Nanumfont
if [ IsOptionalHaikuImagePackageAdded Nanumfont ] {
InstallOptionalHaikuImagePackage
nanumfont-2.0-r1a4-x86-gcc2-2012-09-12.zip
: $(baseURL)/nanumfont-2.0-r1a4-x86-gcc2-2012-09-12.zip ;
}
# Neon
if [ IsOptionalHaikuImagePackageAdded Neon ] {
if $(TARGET_ARCH) != x86 {
@@ -1648,13 +1677,13 @@ if [ IsOptionalHaikuImagePackageAdded Rsync ] {
} else {
if $(HAIKU_GCC_VERSION[1]) >= 4 {
InstallOptionalHaikuImagePackage
rsync-3.0.7-r1a4-x86-gcc4-2012-08-31.zip
: $(baseURL)/rsync-3.0.7-r1a4-x86-gcc4-2012-08-31.zip
rsync-3.0.7-r1a4-x86-gcc4-2012-09-09.zip
: $(baseURL)/rsync-3.0.7-r1a4-x86-gcc4-2012-09-09.zip
: : true ;
} else {
InstallOptionalHaikuImagePackage
rsync-3.0.7-r1a4-x86-gcc2-2012-08-29.zip
: $(baseURL)/rsync-3.0.7-r1a4-x86-gcc2-2012-08-29.zip
rsync-3.0.7-r1a4-x86-gcc2-2012-09-12.zip
: $(baseURL)/rsync-3.0.7-r1a4-x86-gcc2-2012-09-12.zip
: : true ;
}
}
@@ -1667,12 +1696,12 @@ if [ IsOptionalHaikuImagePackageAdded Ruby ] {
Echo "No optional package Ruby available for $(TARGET_ARCH)" ;
} else if $(HAIKU_GCC_VERSION[1]) >= 4 {
InstallOptionalHaikuImagePackage
ruby-1.9.1-r1a4-x86-gcc4-2012-08-31.zip
: $(baseURL)/ruby-1.9.1-r1a4-x86-gcc4-2012-08-31.zip ;
ruby-1.9.1-r1a4-x86-gcc4-2012-09-10.zip
: $(baseURL)/ruby-1.9.1-r1a4-x86-gcc4-2012-09-10.zip ;
} else {
InstallOptionalHaikuImagePackage
ruby-1.9.1-r1a4-x86-gcc2-2012-08-29.zip
: $(baseURL)/ruby-1.9.1-r1a4-x86-gcc2-2012-08-29.zip ;
ruby-1.9.1-r1a4-x86-gcc2-2012-09-10.zip
: $(baseURL)/ruby-1.9.1-r1a4-x86-gcc2-2012-09-10.zip ;
}
}
@@ -1788,13 +1817,13 @@ if [ IsOptionalHaikuImagePackageAdded Transmission ] {
} else {
if $(HAIKU_GCC_VERSION[1]) >= 4 {
InstallOptionalHaikuImagePackage
transmission-2.21-r1a4-x86-gcc4-2012-09-03.zip
: $(baseURL)/transmission-2.21-r1a4-x86-gcc4-2012-09-03.zip
transmission-2.21-r1a4-x86-gcc4-2012-09-12.zip
: $(baseURL)/transmission-2.21-r1a4-x86-gcc4-2012-09-12.zip
: : true ;
} else {
InstallOptionalHaikuImagePackage
transmission-2.21-r1a4-x86-gcc2-2012-08-30.zip
: $(baseURL)/transmission-2.21-r1a4-x86-gcc2-2012-08-30.zip
transmission-2.21-r1a4-x86-gcc2-2012-09-05.zip
: $(baseURL)/transmission-2.21-r1a4-x86-gcc2-2012-09-05.zip
: : true ;
}
}
@@ -6,6 +6,7 @@
#include "ahci_controller.h"
#include "util.h"
#include <algorithm>
#include <KernelExport.h>
#include <stdio.h>
#include <string.h>
@@ -25,8 +26,7 @@ AHCIController::AHCIController(device_node *node,
fPCIDeviceID(0xffff),
fFlags(0),
fCommandSlotCount(0),
fPortCountMax(0),
fPortCountAvail(0),
fPortCount(0),
fPortImplementedMask(0),
fIRQ(0),
fInstanceCheck(-1)
@@ -122,26 +122,37 @@ AHCIController::Init()
return B_ERROR;
}
// make sure interrupts are disabled
fRegs->ghc &= ~GHC_IE;
FlushPostedWrites();
if (ResetController() < B_OK) {
TRACE("controller reset failed\n");
goto err;
}
fCommandSlotCount = 1 + ((fRegs->cap >> CAP_NCS_SHIFT) & CAP_NCS_MASK);
fPortCountMax = 1 + ((fRegs->cap >> CAP_NP_SHIFT) & CAP_NP_MASK);
fPortCount = 1 + ((fRegs->cap >> CAP_NP_SHIFT) & CAP_NP_MASK);
fPortImplementedMask = fRegs->pi;
// reported mask of implemented ports is sometimes empty
if (fPortImplementedMask == 0) {
fPortImplementedMask = 0xffffffff >> (32 - fPortCountMax);
fPortImplementedMask = 0xffffffff >> (32 - fPortCount);
TRACE("ports-implemented mask is zero, using 0x%" B_PRIx32 " instead.\n",
fPortImplementedMask);
}
fPortCountAvail = count_bits_set(fPortImplementedMask);
// reported number of ports is sometimes too small
int highestPort;
highestPort = fls(fPortImplementedMask); // 1-based, 1 to 32
if (fPortCount < highestPort) {
TRACE("reported number of ports is wrong, using %d instead.\n", highestPort);
fPortCount = highestPort;
}
TRACE("cap: Interface Speed Support: generation %" B_PRIu32 "\n", (fRegs->cap >> CAP_ISS_SHIFT) & CAP_ISS_MASK);
TRACE("cap: Number of Command Slots: %d (raw %#" B_PRIx32 ")\n", fCommandSlotCount, (fRegs->cap >> CAP_NCS_SHIFT) & CAP_NCS_MASK);
TRACE("cap: Number of Ports: %d (raw %#" B_PRIx32 ")\n", fPortCountMax, (fRegs->cap >> CAP_NP_SHIFT) & CAP_NP_MASK);
TRACE("cap: Number of Ports: %d (raw %#" B_PRIx32 ")\n", fPortCount, (fRegs->cap >> CAP_NP_SHIFT) & CAP_NP_MASK);
TRACE("cap: Supports Port Multiplier: %s\n", (fRegs->cap & CAP_SPM) ? "yes" : "no");
TRACE("cap: Supports External SATA: %s\n", (fRegs->cap & CAP_SXS) ? "yes" : "no");
TRACE("cap: Enclosure Management Supported: %s\n", (fRegs->cap & CAP_EMS) ? "yes" : "no");
@@ -159,7 +170,7 @@ AHCIController::Init()
TRACE("cap: Supports AHCI mode only: %s\n", (fRegs->cap & CAP_SAM) ? "yes" : "no");
TRACE("ghc: AHCI Enable: %s\n", (fRegs->ghc & GHC_AE) ? "yes" : "no");
TRACE("Ports Implemented Mask: %#08" B_PRIx32 "\n", fPortImplementedMask);
TRACE("Number of Available Ports: %d\n", fPortCountAvail);
TRACE("Number of Available Ports: %d\n", count_bits_set(fPortImplementedMask));
TRACE("AHCI Version %" B_PRIu32 ".%" B_PRIu32 "\n", fRegs->vs >> 16, fRegs->vs & 0xff);
TRACE("Interrupt %u\n", fIRQ);
@@ -169,31 +180,37 @@ AHCIController::Init()
goto err;
}
for (int i = 0; i <= fPortCountMax; i++) {
for (int i = 0; i < fPortCount; i++) {
if (fPortImplementedMask & (1 << i)) {
fPort[i] = new (std::nothrow)AHCIPort(this, i);
if (!fPort[i]) {
TRACE("out of memory creating port %d", i);
TRACE("out of memory creating port %d\n", i);
break;
}
status_t status = fPort[i]->Init1();
if (status < B_OK) {
TRACE("init-1 port %d failed", i);
TRACE("init-1 port %d failed\n", i);
delete fPort[i];
fPort[i] = NULL;
}
}
}
// clear any pending interrupts
uint32 interruptsPending;
interruptsPending = fRegs->is;
fRegs->is = interruptsPending;
FlushPostedWrites();
// enable interrupts
fRegs->ghc |= GHC_IE;
FlushPostedWrites();
for (int i = 0; i <= fPortCountMax; i++) {
for (int i = 0; i < fPortCount; i++) {
if (fPort[i]) {
status_t status = fPort[i]->Init2();
if (status < B_OK) {
TRACE("init-2 port %d failed", i);
TRACE("init-2 port %d failed\n", i);
fPort[i]->Uninit();
delete fPort[i];
fPort[i] = NULL;
@@ -215,7 +232,7 @@ AHCIController::Uninit()
{
TRACE("AHCIController::Uninit\n");
for (int i = 0; i <= fPortCountMax; i++) {
for (int i = 0; i < fPortCount; i++) {
if (fPort[i]) {
fPort[i]->Uninit();
delete fPort[i];
@@ -247,6 +264,10 @@ AHCIController::ResetController()
uint32 saveCaps = fRegs->cap & (CAP_SMPS | CAP_SSS | CAP_SPM | CAP_EMS | CAP_SXS);
uint32 savePI = fRegs->pi;
// AHCI 1.3: Software may perform an HBA reset prior to initializing the controller
// by setting GHC.AE to 1 and then setting GHC.HR to 1 if desired.
fRegs->ghc |= GHC_AE;
FlushPostedWrites();
fRegs->ghc |= GHC_HR;
FlushPostedWrites();
if (wait_until_clear(&fRegs->ghc, GHC_HR, 1000000) < B_OK)
@@ -261,9 +282,12 @@ AHCIController::ResetController()
if (fPCIVendorID == PCI_VENDOR_INTEL) {
// Intel PCS—Port Control and Status
// SATA port enable bits must be set
int portCount = 1 + ((fRegs->cap >> CAP_NP_SHIFT) & CAP_NP_MASK);
if (portCount > 8)
panic("Intel AHCI: too many SATA ports! Please report at http://dev.haiku-os.org");
int portCount = std::max(fls(fRegs->pi), 1 + (int)((fRegs->cap >> CAP_NP_SHIFT) & CAP_NP_MASK));
if (portCount > 8) {
// TODO: fix this when specification available
TRACE("don't know how to enable SATA ports 9 to %d\n", portCount);
portCount = 8;
}
uint16 pcs = fPCI->read_pci_config(fPCIDevice, 0x92, 2);
pcs |= (0xff >> (8 - portCount));
fPCI->write_pci_config(fPCIDevice, 0x92, 2, pcs);
@@ -281,7 +305,7 @@ AHCIController::Interrupt(void *data)
if (interruptPending == 0)
return B_UNHANDLED_INTERRUPT;
for (int i = 0; i < self->fPortCountMax; i++) {
for (int i = 0; i < self->fPortCount; i++) {
if (interruptPending & (1 << i)) {
if (self->fPort[i]) {
self->fPort[i]->Interrupt();
@@ -49,8 +49,7 @@ private:
volatile ahci_hba * fRegs;
area_id fRegsArea;
int fCommandSlotCount;
int fPortCountMax;
int fPortCountAvail;
int fPortCount;
uint32 fPortImplementedMask;
uint8 fIRQ;
AHCIPort * fPort[32];
@@ -398,12 +398,12 @@ AHCIPort::InterruptErrorHandler(uint32 is)
TRACE("Interface Non Fatal Error\n");
}
if (is & PORT_INT_OF) {
TRACE("Overflow");
TRACE("Overflow\n");
fResetPort = true;
fError = true;
}
if (is & PORT_INT_IPM) {
TRACE("Incorrect Port Multiplier Status");
TRACE("Incorrect Port Multiplier Status\n");
}
if (is & PORT_INT_PRC) {
TRACE("PhyReady Change\n");
@@ -548,7 +548,7 @@ AHCIPort::ScsiInquiry(scsi_ccb *request)
{
TRACE("AHCIPort::ScsiInquiry port %d\n", fIndex);
scsi_cmd_inquiry *cmd = (scsi_cmd_inquiry *)request->cdb;
const scsi_cmd_inquiry *cmd = (const scsi_cmd_inquiry *)request->cdb;
scsi_res_inquiry scsiData;
ata_device_infoblock ataData;
@@ -679,22 +679,50 @@ AHCIPort::ScsiReadCapacity(scsi_ccb *request)
{
TRACE("AHCIPort::ScsiReadCapacity port %d\n", fIndex);
scsi_cmd_read_capacity *cmd = (scsi_cmd_read_capacity *)request->cdb;
const scsi_cmd_read_capacity *cmd = (const scsi_cmd_read_capacity *)request->cdb;
scsi_res_read_capacity scsiData;
if (cmd->pmi || cmd->lba || request->data_length < sizeof(scsiData)) {
TRACE("invalid request\n");
request->subsys_status = SCSI_REQ_ABORTED;
gSCSI->finished(request, 1);
return;
}
TRACE("SectorSize %" B_PRIu32 ", SectorCount 0x%" B_PRIx64 "\n",
fSectorSize, fSectorCount);
if (fSectorCount > 0xffffffff)
panic("ahci: SCSI emulation doesn't support harddisks larger than 2TB");
scsiData.block_size = B_HOST_TO_BENDIAN_INT32(fSectorSize);
if (fSectorCount <= 0xffffffff)
scsiData.lba = B_HOST_TO_BENDIAN_INT32(fSectorCount - 1);
else
scsiData.lba = 0xffffffff;
if (sg_memcpy(request->sg_list, request->sg_count, &scsiData,
sizeof(scsiData)) < B_OK) {
request->subsys_status = SCSI_DATA_RUN_ERR;
} else {
request->subsys_status = SCSI_REQ_CMP;
request->data_resid = request->data_length - sizeof(scsiData);
}
gSCSI->finished(request, 1);
}
void
AHCIPort::ScsiReadCapacity16(scsi_ccb *request)
{
TRACE("AHCIPort::ScsiReadCapacity16 port %d\n", fIndex);
//const scsi_cmd_read_capacity_long *cmd = (const scsi_cmd_read_capacity_long *)request->cdb;
scsi_res_read_capacity_long scsiData;
TRACE("SectorSize %" B_PRIu32 ", SectorCount 0x%" B_PRIx64 "\n",
fSectorSize, fSectorCount);
scsiData.block_size = B_HOST_TO_BENDIAN_INT32(fSectorSize);
scsiData.lba = B_HOST_TO_BENDIAN_INT32(fSectorCount - 1);
scsiData.lba = B_HOST_TO_BENDIAN_INT64(fSectorCount - 1);
if (sg_memcpy(request->sg_list, request->sg_count, &scsiData,
sizeof(scsiData)) < B_OK) {
@@ -731,6 +759,7 @@ AHCIPort::ScsiReadWrite(scsi_ccb *request, uint64 lba, size_t sectorCount,
TRACE("out of memory when allocating read/write request\n");
request->subsys_status = SCSI_REQ_ABORTED;
gSCSI->finished(request, 1);
return;
}
if (fUse48BitCommands) {
@@ -914,13 +943,21 @@ AHCIPort::ScsiExecuteRequest(scsi_ccb *request)
case SCSI_OP_READ_CAPACITY:
ScsiReadCapacity(request);
break;
case SCSI_OP_SERVICE_ACTION_IN:
if ((request->cdb[1] & 0x1f) == SCSI_SAI_READ_CAPACITY_16)
ScsiReadCapacity16(request);
else {
request->subsys_status = SCSI_REQ_INVALID;
gSCSI->finished(request, 1);
}
break;
case SCSI_OP_SYNCHRONIZE_CACHE:
ScsiSynchronizeCache(request);
break;
case SCSI_OP_READ_6:
case SCSI_OP_WRITE_6:
{
scsi_cmd_rw_6 *cmd = (scsi_cmd_rw_6 *)request->cdb;
const scsi_cmd_rw_6 *cmd = (const scsi_cmd_rw_6 *)request->cdb;
uint32 position = ((uint32)cmd->high_lba << 16)
| ((uint32)cmd->mid_lba << 8) | (uint32)cmd->low_lba;
size_t length = cmd->length != 0 ? cmd->length : 256;
@@ -931,7 +968,7 @@ AHCIPort::ScsiExecuteRequest(scsi_ccb *request)
case SCSI_OP_READ_10:
case SCSI_OP_WRITE_10:
{
scsi_cmd_rw_10 *cmd = (scsi_cmd_rw_10 *)request->cdb;
const scsi_cmd_rw_10 *cmd = (const scsi_cmd_rw_10 *)request->cdb;
uint32 position = B_BENDIAN_TO_HOST_INT32(cmd->lba);
size_t length = B_BENDIAN_TO_HOST_INT16(cmd->length);
bool isWrite = request->cdb[0] == SCSI_OP_WRITE_10;
@@ -948,7 +985,7 @@ AHCIPort::ScsiExecuteRequest(scsi_ccb *request)
case SCSI_OP_READ_12:
case SCSI_OP_WRITE_12:
{
scsi_cmd_rw_12 *cmd = (scsi_cmd_rw_12 *)request->cdb;
const scsi_cmd_rw_12 *cmd = (const scsi_cmd_rw_12 *)request->cdb;
uint32 position = B_BENDIAN_TO_HOST_INT32(cmd->lba);
size_t length = B_BENDIAN_TO_HOST_INT32(cmd->length);
bool isWrite = request->cdb[0] == SCSI_OP_WRITE_12;
@@ -962,9 +999,26 @@ AHCIPort::ScsiExecuteRequest(scsi_ccb *request)
}
break;
}
case SCSI_OP_READ_16:
case SCSI_OP_WRITE_16:
{
const scsi_cmd_rw_16 *cmd = (const scsi_cmd_rw_16 *)request->cdb;
uint64 position = B_BENDIAN_TO_HOST_INT64(cmd->lba);
size_t length = B_BENDIAN_TO_HOST_INT32(cmd->length);
bool isWrite = request->cdb[0] == SCSI_OP_WRITE_16;
if (length) {
ScsiReadWrite(request, position, length, isWrite);
} else {
TRACE("AHCIPort::ScsiExecuteRequest error: transfer without "
"data!\n");
request->subsys_status = SCSI_REQ_INVALID;
gSCSI->finished(request, 1);
}
break;
}
case SCSI_OP_WRITE_SAME_16:
{
scsi_cmd_wsame_16 *cmd = (scsi_cmd_wsame_16 *)request->cdb;
const scsi_cmd_wsame_16 *cmd = (const scsi_cmd_wsame_16 *)request->cdb;
// SCSI unmap is used for trim, otherwise we don't support it
if (!cmd->unmap) {
@@ -33,6 +33,7 @@ private:
void ScsiTestUnitReady(scsi_ccb *request);
void ScsiInquiry(scsi_ccb *request);
void ScsiReadCapacity(scsi_ccb *request);
void ScsiReadCapacity16(scsi_ccb *request);
void ScsiReadWrite(scsi_ccb *request, uint64 lba, size_t sectorCount, bool isWrite);
void ScsiSynchronizeCache(scsi_ccb *request);
@@ -121,3 +121,17 @@ swap_words(void *data, size_t size)
word++;
}
}
int
fls(unsigned mask)
{
if (mask == 0)
return 0;
int pos = 1;
while (mask != 1) {
mask >>= 1;
pos++;
}
return pos;
}
@@ -20,6 +20,8 @@ status_t sg_memcpy(const physical_entry *sgTable, int sgCount, const void *data,
void swap_words(void *data, size_t size);
int fls(unsigned mask);
#ifdef __cplusplus
}
#endif
@@ -684,10 +684,20 @@ Journal::_TransactionWritten(int32 transactionID, int32 event, void* _logEntry)
/*static*/ void
Journal::_TransactionIdle(int32 transactionID, int32 event, void* _journal)
{
// The current transaction seems to be idle - flush it
// The current transaction seems to be idle - flush it. We can't do this
// in this thread, as flushing the log can produce new transaction events.
thread_id id = spawn_kernel_thread(&Journal::_FlushLog, "bfs log flusher",
B_NORMAL_PRIORITY, _journal);
if (id > 0)
resume_thread(id);
}
/*static*/ status_t
Journal::_FlushLog(void* _journal)
{
Journal* journal = (Journal*)_journal;
journal->_FlushLog(false, false);
return journal->_FlushLog(false, false);
}
@@ -60,7 +60,9 @@ private:
int32 event, void* _logEntry);
static void _TransactionIdle(int32 transactionID, int32 event,
void* _journal);
static status_t _FlushLog(void* _journal);
private:
Volume* fVolume;
recursive_lock fLock;
Transaction* fOwner;
@@ -405,15 +405,15 @@ aiffReader::GetNextChunk(void *cookie,
}
uint32
aiffReader::DecodeFrameRate(void *_80bit_float)
aiffReader::DecodeFrameRate(const void *_80bit_float)
{
// algorithm from http://www.borg.com/~jglatt/tech/aiff.htm
uint32 mantissa;
uint32 last;
uint32 exp;
mantissa = (uint32)B_BENDIAN_TO_HOST_INT32(*(uint32 *)((char *)_80bit_float + 2));
exp = 30 - *(uint8 *)((char *)_80bit_float + 1);
mantissa = (uint32)B_BENDIAN_TO_HOST_INT32(*(const uint32 *)((const char *)_80bit_float + 2));
exp = 30 - *(const uint8 *)((const char *)_80bit_float + 1);
if (exp > 32)
return 0;
last = 0;
@@ -33,16 +33,16 @@ class aiffReader : public Reader
public:
aiffReader();
~aiffReader();
const char *Copyright();
status_t Sniff(int32 *streamCount);
void GetFileFormatInfo(media_file_format *mff);
status_t AllocateCookie(int32 streamNumber, void **cookie);
status_t FreeCookie(void *cookie);
status_t GetStreamInfo(void *cookie, int64 *frameCount, bigtime_t *duration,
media_format *format, const void **infoBuffer, size_t *infoSize);
@@ -54,20 +54,20 @@ public:
const void **chunkBuffer, size_t *chunkSize,
media_header *mediaHeader);
private:
uint32 DecodeFrameRate(void *_80bit_float);
uint32 DecodeFrameRate(const void *_80bit_float);
BPositionIO *Source() { return fSource; }
private:
BPositionIO * fSource;
media_format fFormat;
int64 fDataStart;
int64 fDataSize;
int64 fFrameCount;
bigtime_t fDuration;
bool fRaw;
int64 fPosition;
+25 -5
View File
@@ -13,7 +13,6 @@ static void dump_dev_size(int dev)
return;
}
printf("size: %ld bytes\n", sz);
puts("");
}
static void dump_bios_id(int dev)
@@ -24,7 +23,6 @@ static void dump_bios_id(int dev)
return;
}
printf("bios id: %d, 0x%x\n", id, id);
puts("");
}
static void dump_media_status(int dev)
@@ -35,7 +33,6 @@ static void dump_media_status(int dev)
return;
}
printf("media status: %s\n", strerror(st));
puts("");
}
static const char *device_type(uint32 type)
@@ -70,7 +67,23 @@ static void dump_geom(int dev, bool bios)
printf("%sremovable.\n", geom.removable?"":"not ");
printf("%sread_only.\n", geom.read_only?"":"not ");
printf("%swrite_once.\n", geom.write_once?"":"not ");
puts("");
}
static void dump_partition(int dev)
{
partition_info partition;
if (ioctl(dev, B_GET_PARTITION_INFO, &partition, sizeof(partition)) < 0) {
perror("ioctl(B_GET_PARTITION_INFO)");
return;
}
printf("partition:\n");
printf("offset:\t%lld\n", partition.offset);
printf("size:\t%lld\n", partition.size);
printf("logical_block_size:\t%ld\n", partition.logical_block_size);
printf("session:\t%ld\n", partition.session);
printf("partition:\t%ld\n", partition.partition);
printf("device:\t%s\n", partition.device);
}
static void dump_misc(int dev)
@@ -88,7 +101,6 @@ static void dump_misc(int dev)
printf("device path:\t%s\n", path);
}
#endif
puts("");
}
int main(int argc, char **argv)
@@ -104,10 +116,18 @@ int main(int argc, char **argv)
return 1;
}
dump_dev_size(dev);
puts("");
dump_bios_id(dev);
puts("");
dump_media_status(dev);
puts("");
dump_geom(dev, false);
puts("");
dump_geom(dev, true);
puts("");
dump_partition(dev);
puts("");
dump_misc(dev);
puts("");
return 0;
}
+11 -8
View File
@@ -164,11 +164,11 @@ status_t Initialize(int fatbits, const char *device, const char *label, bool nop
device_geometry biosGeometry;
device_geometry deviceGeometry;
partition_info partitionInfo;
isRawDevice = 0 != strstr(device, "/raw");
hasBiosGeometry = B_OK == ioctl(fd, B_GET_BIOS_GEOMETRY, &biosGeometry);
hasDeviceGeometry = B_OK == ioctl(fd, B_GET_GEOMETRY, &deviceGeometry);
hasPartitionInfo = B_OK == ioctl(fd, B_GET_PARTITION_INFO, &partitionInfo);
hasBiosGeometry = B_OK == ioctl(fd, B_GET_BIOS_GEOMETRY, &biosGeometry, sizeof(biosGeometry));
hasDeviceGeometry = B_OK == ioctl(fd, B_GET_GEOMETRY, &deviceGeometry, sizeof(deviceGeometry));
hasPartitionInfo = B_OK == ioctl(fd, B_GET_PARTITION_INFO, &partitionInfo, sizeof(partitionInfo));
if (!isRawDevice && !hasBiosGeometry && !hasDeviceGeometry && !hasPartitionInfo)
isRawDevice = true;
@@ -198,13 +198,16 @@ status_t Initialize(int fatbits, const char *device, const char *label, bool nop
if (!isRawDevice && !hasPartitionInfo) {
fprintf(stderr,"Warning: couldn't get partition information\n");
}
if ( (hasPartitionInfo && partitionInfo.logical_block_size != 512)
|| (hasBiosGeometry && biosGeometry.bytes_per_sector != 512)
if ((hasBiosGeometry && biosGeometry.bytes_per_sector != 512)
|| (hasDeviceGeometry && deviceGeometry.bytes_per_sector != 512)) {
fprintf(stderr,"Error: block size not 512 bytes\n");
fprintf(stderr,"Error: geometry block size not 512 bytes\n");
close(fd);
return B_ERROR;
} else if (hasPartitionInfo && partitionInfo.logical_block_size != 512) {
printf("partition logical block size is not 512, it's %ld bytes\n",
partitionInfo.logical_block_size);
}
if (hasDeviceGeometry && deviceGeometry.read_only) {
fprintf(stderr,"Error: this is a read-only device\n");
close(fd);
@@ -321,7 +324,7 @@ status_t Initialize(int fatbits, const char *device, const char *label, bool nop
uint8 biosDriveId;
// get bios drive-id, or use 0x80
if (B_OK != ioctl(fd, B_GET_BIOS_DRIVE_ID, &biosDriveId)) {
if (B_OK != ioctl(fd, B_GET_BIOS_DRIVE_ID, &biosDriveId, sizeof(biosDriveId))) {
biosDriveId = 0x80;
} else {
printf("bios drive id: 0x%02x\n", (int)biosDriveId);
+3 -1
View File
@@ -17,6 +17,7 @@
#include <stdlib.h>
#include <string.h>
#include <AutoDeleter.h>
#include <File.h>
#include <FindDirectory.h>
#include <Path.h>
@@ -138,6 +139,8 @@ Settings::ReadSwapSettings()
void* settings = load_driver_settings(kVirtualMemorySettings);
if (settings == NULL)
return kErrorSettingsNotFound;
CObjectDeleter<void, status_t> settingDeleter(settings,
&unload_driver_settings);
const char* enabled = get_driver_parameter(settings, "vm", NULL, NULL);
const char* automatic = get_driver_parameter(settings, "swap_auto",
@@ -163,7 +166,6 @@ Settings::ReadSwapSettings()
SetSwapAutomatic(get_driver_boolean_parameter(settings,
"swap_auto", true, false));
SetSwapSize(atoll(size));
unload_driver_settings(settings);
int32 bestScore = -1;
dev_t bestVol = -1;
+7 -13
View File
@@ -22,7 +22,6 @@
#include "kernel_debug_config.h"
#include "ObjectCache.h"
#include "slab_private.h"
//#define TRACE_MEMORY_MANAGER
@@ -849,15 +848,13 @@ MemoryManager::PerformMaintenance()
if (_AllocateArea(0, area) != B_OK)
return;
_push(sFreeAreas, area);
if (++sFreeAreaCount > 2)
_PushFreeArea(area);
if (sFreeAreaCount > 2)
sMaintenanceNeeded = true;
} else {
// free until we only have two free ones
while (sFreeAreaCount > 2) {
Area* area = _pop(sFreeAreas);
_FreeArea(area, true, 0);
}
while (sFreeAreaCount > 2)
_FreeArea(_PopFreeArea(), true, 0);
if (sFreeAreaCount == 0)
sMaintenanceNeeded = true;
@@ -956,8 +953,7 @@ MemoryManager::_AllocateChunks(size_t chunkSize, uint32 chunkCount,
return B_OK;
if (sFreeAreas != NULL) {
_AddArea(_pop(sFreeAreas));
sFreeAreaCount--;
_AddArea(_PopFreeArea());
_RequestMaintenance();
_GetChunks(metaChunkList, chunkSize, chunkCount, _metaChunk, _chunk);
@@ -1409,16 +1405,14 @@ MemoryManager::_FreeArea(Area* area, bool areaRemoved, uint32 flags)
// We want to keep one or two free areas as a reserve.
if (sFreeAreaCount <= 1) {
_push(sFreeAreas, area);
sFreeAreaCount++;
_PushFreeArea(area);
return;
}
if (area->vmArea == NULL || (flags & CACHE_DONT_LOCK_KERNEL_SPACE) != 0) {
// This is either early in the boot process or we aren't allowed to
// delete the area now.
_push(sFreeAreas, area);
sFreeAreaCount++;
_PushFreeArea(area);
_RequestMaintenance();
return;
}
+23
View File
@@ -15,6 +15,7 @@
#include <util/OpenHashTable.h>
#include "slab_debug.h"
#include "slab_private.h"
class AbstractTraceEntryWithStackTrace;
@@ -161,6 +162,9 @@ private:
static void _PrepareMetaChunk(MetaChunk* metaChunk,
size_t chunkSize);
static void _PushFreeArea(Area* area);
static Area* _PopFreeArea();
static void _AddArea(Area* area);
static status_t _AllocateArea(uint32 flags, Area*& _area);
static void _FreeArea(Area* area, bool areaRemoved,
@@ -235,6 +239,25 @@ MemoryManager::MaintenanceNeeded()
}
/*static*/ inline void
MemoryManager::_PushFreeArea(Area* area)
{
_push(sFreeAreas, area);
sFreeAreaCount++;
}
/*static*/ inline MemoryManager::Area*
MemoryManager::_PopFreeArea()
{
if (sFreeAreaCount == 0)
return NULL;
sFreeAreaCount--;
return _pop(sFreeAreas);
}
/*static*/ inline addr_t
MemoryManager::_AreaBaseAddressForAddress(addr_t address)
{